Objective data sheet 2004 Objective data sheet I2C-bus repea
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PCA9515A I2C-bus repeater
Objective data sheet 2004
Objective data sheet
I2C-bus repeater
PCA9515A
DESCRIPTION
PCA9515A CMOS integrated circuit intended application SMBus systems. While retaining operating modes features system permits extension I2C-bus buffering both data (SDA) clock (SCL) lines, thus enabling buses I2C-bus capacitance limit restricts number devices length. Using PCA9515A enables system designer isolate halves bus, thus more devices longer length accommodated. also used buses, other bus, where isolated when operation other required. more PCA9515As cannot series. PCA9515A design does allow this configuration. Since there direction pin, slightly different "legal" voltage levels used avoid lock-up conditions between input output. "regular LOW" applied input PCA9515A will propagated "buffered LOW" with slightly higher value. When this "buffered LOW" applied another PCA9515A, PCA9516A, PCA9518 series, second PCA9515A, PCA9516A, PCA9518 will recognize "regular LOW" will propagate "buffered LOW" again. PCA9510/9511/9513/9514 PCA9512 cannot used series with PCA9515A, PCA9516A, PCA9518 used series with themselves since they shifting instead static offsets avoid lock-up conditions.
CONFIGURATION
n.c. SCL0 SDA0 SCL1 SDA1
SU01322
Figure configuration
DESCRIPTION
SYMBOL n.c. SCL0 SDA0 SDA1 SCL1 FUNCTION connection Serial clock Serial data Supply ground Active-HIGH repeater enable input Serial data Serial clock Supply power
FEATURES
channel, bi-directional buffer I2C-bus SMBus compatible Active-HIGH repeater enable input Open-drain input/outputs Lock-up free operation Supports arbitration clock stretching across repeater Accommodates standard mode fast mode devices Powered-off high-impedance pins Operating supply voltage range tolerant enable pins clock frequency1 protection exceeds 2000 JESD22-A114, Latch-up testing done JEDEC Standard JESD78 which Package offerings: TSSOP
ORDERING INFORMATION
PACKAGES 8-pin plastic 8-pin plastic TSSOP TEMPERATURE RANGE exceeds JESD22-A115, 1000 JESD22-C101. multiple masters
ORDER CODE PCA9515AD PCA9515ADP
TOPSIDE MARK PA9515A 9515A
DRAWING NUMBER SOT96-1 SOT505-1
Standard packing quantities other packaging data available www.philipslogic.com/packaging.
maximum system operating frequency less than because delays added repeater.
2004
Objective data sheet
I2C-bus repeater
PCA9515A
PCA9515A
SDA0 SDA1
SCL0
SCL1
PULL-UP RESISTOR
SW02244
Figure PCA9515A block diagram output pull-down each internal buffer approximately while input threshold each internal buffer about 0.07 lower, when output internally driven LOW. This prevents lock-up condition from occurring.
Systems
with standard system, pull-up resistors required provide logic HIGH levels Buffered bus. (Standard open-collector configuration I2C-bus). size these pull-up resistors depends system, each side repeater must have pull-up resistor. This part designed work with standard mode fast mode devices addition SMBus devices. Standard mode devices only specify output drive, this limits termination current generic system where standard mode devices multiple masters possible. Under certain conditions higher termination currents used. Please Application Note AN255 SMBus Repeaters, Hubs Expanders" additional information sizing resistors precautions when using more than PCA9515A/PCA9516A system using PCA9515A/16A conjunction with P82B96.
FUNCTIONAL DESCRIPTION
PCA9515A integrated circuit contains identical buffer circuits which enable similar systems extended without degradation system performance. PCA9515A contains bi-directional, open drain buffers specifically designed support standard LOW-level-contention arbitration I2C-bus. Except during arbitration clock stretching, PCA9515A acts like pair non-inverting, open drain buffers, SCL.
Enable
active HIGH with internal pull allows user select when repeater active. This used isolate badly behaved slave power until after system power reset. should never change state during operation because disabling during operation will hang enabling part through cycle could confuse parts being enabled. enable should only change state when global repeater port idle state prevent system failures.
2004
Objective data sheet
I2C-bus repeater
PCA9515A
APPLICATION INFORMATION
typical application shown Figure this example, system master running I2C-bus while slave connected bus. Both buses unless slave isolated then master kHz. Master devices placed either bus.
PCA9515A tolerant does require additional circuitry translate between different voltages. When side PCA9515A pulled device I2C-bus, CMOS hysteresis type input detects falling edge causes internal driver other side turn thus causing other side also LOW. side driven PCA9515A will typically order illustrate what would seen typical application, refer Figures master Figure were write slave through PCA9515A, would waveform shown Figure This looks like normal transmission until falling edge clock pulse. that point, master releases data line (SDA) while slave pulls through PCA9515A. Because PCA9515A typically around step will seen. After master transmitted clock pulse, slave releases data line.
MASTER
SDA0 SCL0
SDA1 SCL1
SLAVE
PCA9515A
BUS0
BUS1
SW02245
Figure Typical application
V/DIV CLOCK PULSE
PCA9515A
MASTER
SW02247
Figure waveform
2004
Objective data sheet
I2C-bus repeater
PCA9515A
side PCA9515A, clock data lines would have positive offset from ground equal PCA9515A. After clock pulse, data line will pulled slave device that very close ground example.
important note that arbitration clock stretching events require that devices below PCA9515A (see Vilc Characteristics section) recognized PCA9515A then transmitted
CLOCK PULSE
V/DIV
PCA9515A
SLAVE
SW02246
Figure waveform
2004
Objective data sheet
I2C-bus repeater
PCA9515A
ABSOLUTE MAXIMUM RATINGS
Limiting values accordance with Absolute Maximum System (IEC 134). Voltages with respect GND. SYMBOL Vbus Ptot Tstg Tamb Supply voltage range Voltage range I2C-bus, current (any pin) Power dissipation Storage temperature range Operating ambient temperature range PARAMETER LIMITS MIN. -0.5 -0.5 MAX. +125 UNIT
ELECTRICAL CHARACTERISTICS
Tamb unless otherwise specified. SYMBOL Supplies ICCH ICCL supply voltage Quiescent supply current, both channels HIGH Quiescent supply current, both channels Quiescent supply current contention SDAn SCLn GND, other open SDAn SCLn PARAMETER TEST CONDITIONS LIMITS MIN. TYP.2 MAX. UNIT
ICCLc
Input SCL; input/output VILc VOL-VILc Enable LOW-level input voltage HIGH-level input voltage Input current LOW, Input leakage current Input capacitance -0.5 HIGH-level input voltage LOW-level input voltage (Note LOW-level input voltage contention (Note Input clamp voltage Input leakage current Input current LOW, SDA, LOW-level output voltage LOW-level input voltage below output level voltage Input capacitance SDA, Guaranteed design -0.5 -0.5 0.47 0.52 -1.2
NOTES: specification first level seen SDAx/SCLx lines. VILc second subsequent levels seen SDAx/SCLx lines. Typical value taken operation between published voltage ranges, refer worst case parameter both ranges.
2004
Objective data sheet
I2C-bus repeater
PCA9515A
ELECTRICAL CHARACTERISTICS
Tamb unless otherwise specified. SYMBOL Supplies ICCH ICCL supply voltage Quiescent supply current, both channels HIGH Quiescent supply current, both channels Quiescent supply current contention SDAn SCLn GND, other open SDAn SCLn PARAMETER TEST CONDITIONS LIMITS MIN. TYP.2 MAX. UNIT
ICCLc
Input SCL; input/output VILc VOL-VILc Enable LOW-level input voltage HIGH-level input voltage Input current LOW, Input leakage current Input capacitance -0.5 HIGH-level input voltage LOW-level input voltage (Note LOW-level input voltage contention (Note Input clamp voltage Input leakage current Input current LOW, SDA, LOW-level output voltage LOW-level input voltage below output level voltage Input capacitance SDA, Guaranteed design -0.5 -0.5 0.47 0.52 -1.2
NOTES: specification first level seen SDAx/SCLx lines. VILc second subsequent levels seen SDAx/SCLx lines. Typical value taken
2004
Objective data sheet
I2C-bus repeater
PCA9515A
ELECTRICAL CHARACTERISTICS
SYMBOL tPHL tPLH tTHL tTLH tSET tHOLD PARAMETER Propagation delay Propagation delay Transition time Transition time Enable Start condition Enable after Stop condition TEST CONDITIONS Waveform Waveform Note Waveform Waveform Note LIMITS MIN. TYP.2 MAX. UNIT
NOTES: Different load resistance capacitance will alter time constant, thereby changing propagation delay transition times. Typical value taken
ELECTRICAL CHARACTERISTICS
SYMBOL tPHL tPLH tTHL tTLH tSET tHOLD PARAMETER Propagation delay Propagation delay Transition time Transition time Enable Start condition Enable after Stop condition TEST CONDITIONS Waveform Waveform Note Waveform Waveform Note LIMITS MIN. TYP.2 MAX. UNIT
NOTES: Different load resistance capacitance will alter time constant, thereby changing propagation delay transition times. Typical value taken
WAVEFORMS
INPUT tPHL OUTPUT tTHL tTLH tPLH
TEST CIRCUIT
PULSE GENERATOR D.U.T. VOUT
Test Circuit Open Drain Outputs
SW00646
DEFINITIONS
Load resistor; 1.35 Load capacitance includes probe capacitance; Termination resistance should equal ZOUT pulse generators.
SW02280
Waveform
2004
Objective data sheet
I2C-bus repeater
PCA9515A
SO8: plastic small outline package; leads; body width
SOT96-1
2004
Objective data sheet
I2C-bus repeater
PCA9515A
TSSOP8: plastic thin shrink small outline package; leads; body width
SOT505-1
2004
Objective data sheet
I2C-bus repeater
PCA9515A
REVISION HISTORY
Date 20040617 Description Objective data sheet (9397 13237).
2004
Objective data sheet
I2C-bus repeater
PCA9515A
Purchase Philips components conveys license under Philips' patent components system provided system conforms specifications defined Philips. This specification ordered using code 9398 40011.
Data sheet status
Level
Data sheet status
Objective data
Product status
Development
Definitions
This data sheet contains data from objective specification product development. Philips Semiconductors reserves right change specification manner without notice. This data sheet contains data from preliminary specification. Supplementary data will published later date. Philips Semiconductors reserves right change specification without notice, order improve design supply best possible product. This data sheet contains data from product specification. Philips Semiconductors reserves right make changes time order improve design, manufacturing supply. Relevant changes will communicated Customer Product/Process Change Notification (CPCN).
Preliminary data
Qualification
Product data
Production
Please consult most recently issued data sheet before initiating completing design. product status device(s) described this data sheet have changed since this data sheet published. latest information available Internet data sheets describing multiple type numbers, highest-level product status determines data sheet status.
Definitions
Short-form specification data short-form specification extracted from full data sheet with same type number title. detailed information relevant data sheet data handbook. Limiting values definition Limiting values given accordance with Absolute Maximum Rating System (IEC 60134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Applications that described herein these products illustrative purposes only. Philips Semiconductors make representation warranty that such applications will suitable specified without further testing modification.
Disclaimers
Life support These products designed life support appliances, devices, systems where malfunction these products reasonably expected result personal injury. Philips Semiconductors customers using selling these products such applications their risk agree fully indemnify Philips Semiconductors damages resulting from such application. Right make changes Philips Semiconductors reserves right make changes products-including circuits, standard cells, and/or software-described contained herein order improve design and/or performance. When product full production (status `Production'), relevant changes will communicated Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes responsibility liability these products, conveys license title under patent, copyright, mask work right these products, makes representations warranties that these products free from patent, copyright, mask work right infringement, unless otherwise specified.
Contact information
additional information please visit Fax: 24825
Koninklijke Philips Electronics N.V. 2004 rights reserved. Printed U.S.A. Date release: 06-04
sales offices addresses send e-mail
Document order number:
9397 13237
2004
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