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µPD789304, 789306, 789314, 789316 8-BIT SINGLE-CHIP MICROCONTROLL


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INTEGRATED CIRCUIT
µPD789304, 789306, 789314, 789316
8-BIT SINGLE-CHIP MICROCONTROLLER
µPD789304, 789306, 789314, 789316 belong µPD789306, 789316 Subseries (for drivers) 78K/0S Series. Flash memory versions (µPD78F9306, 78F9316) that operated using same power supply voltage mask versions available, along with various development tools. Detailed function descriptions provided following user's manuals. sure read them before designing. µPD789306, 789316 Subseries User's Manual: U14800E 78K/0S Series User's Manual Instructions: U11047E
FEATURES
capacities
Item Part Number Program Memory (ROM) Data Memory Internal High-Speed bytes Display bytes
µPD789304, 789314 µPD789306, 789316
Main system clock Ceramic/crystal oscillation: µPD789304, 789306 oscillation:
µPD789314, 789316
ports: Serial interface: channels Switchable between 3-wire serial mode UART mode: channel 3-wire serial mode: channel
controller/driver Segment signals: common signals: Timer: channels Power supply voltage:
APPLICATIONS
Remote control devices, healthcare equipment, etc.
information this document subject change without notice. Before using this document, please confirm that this latest version.
devices/types available every country. Please check with local representative availability additional information.
Document U14384EJ1V0DS00 (1st edition) Date Published March 2001 CP(K) Printed Japan
mark
shows major revised points.
1999 1996, 1999
µPD789304, 789306, 789314, 789316
ORDERING INFORMATION
Part Number Package 64-pin plastic 64-pin plastic TQFP 64-pin plastic 64-pin plastic TQFP 64-pin plastic 64-pin plastic TQFP 64-pin plastic 64-pin plastic TQFP
Remark
indicates code suffix.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
78K/0S SERIES LINEUP products 78K/0S Series listed below. names enclosed boxes subseries names.
Products mass production Products under development subseries products support SMB. Small-scale package, general-purpose applications 44-pin 42-/44-pin 30-pin 28-pin
PD789046 PD789026 µPD789074 PD789014
PD789074 with added subsystem clock PD789014 with enhanced timer increased ROM, capacity PD789026 with enhanced timer
On-chip UART capable voltage (1.8 operation
Small-scale package, general-purpose applications converter 44-pin 44-pin 30-pin 30-pin 30-pin 30-pin 30-pin 30-pin
PD789177 PD789167 PD789156 PD789146 PD789134A PD789124A PD789114A PD789104A
Inverter control
PD789177Y PD789167Y
PD789167 with enhanced converter PD789104A with enhanced timer PD789146 with enhanced converter PD789104A with added EEPROMµ PD789124A with enhanced converter oscillation version PD789104A PD789104A with enhanced converter PD789026 with added converter multiplier
44-pin
PD789842
On-chip inverter controller UART
drive 78K/0S Series 52-pin
PD789871
Total display outputs:
drive 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 64-pin 64-pin
PD789488 PD789417A PD789407A PD789456 PD789446 PD789436 PD789426 PD789316 PD789306
drive
converter on-chip voltage booster type PD789407A with enhanced converter converter resistance division type PD789446 with enhanced converter converter on-chip voltage booster type µPD789426 with enhanced converter on-chip voltage booster type oscillation version µPD789306 On-chip voltage booster type
144-pin 88-pin
PD789835 PD789830
Segment/common outputs: Segments: commons:
ASSP 80-pin 52-pin 52-pin 64-pin 44-pin 44-pin 20-pin 20-pin
PD789477 PD789467 PD789327 PD789803 µPD789800 PD789840 PD789861 PD789860
PD789488 with added remote control receiver resistance division type remote controller, with converter on-chip voltage booster type remote controller, with resistance division type
keyboard, on-chip function keyboard, on-chip function keypad, on-chip oscillation version µPD789860 keyless entry, on-chip return circuit
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
major functional differences among subseries listed below.
Function Capacity Subseries Name Small-scale package, generalpurpose applications Smallscale package, generalpurpose applications converter 8-Bit 16-Bit Watch 8-Bit 10-Bit Serial Interface (UART: MIN. Value Remarks
µPD789046 µPD789026 µPD789074 µPD789014 µPD789177 µPD789167 µPD789156 µPD789146 µPD789134A µPD789124A µPD789114A µPD789104A
Note (UART: RC-oscillation version (UART: (UART: (UART: (UART:
On-chip EEPROM RC-oscillation version
Inverter control drive drive
µPD789842 µPD789871 µPD789488 µPD789417A µPD789407A µPD789456 µPD789446 µPD789436 µPD789426 µPD789316 µPD789306
drive
µPD789835 µPD789830
(UART:
ASSP
µPD789477 µPD789467 µPD789327 µPD789803 µPD789800 µPD789840 µPD789861
(UART: (USB:
On-chip
RC-oscillation version, on-chip EEPROM On-chip EEPROM
µPD789860
Note 10-bit timer: channel
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
OVERVIEW FUNCTIONS
Item Internal memory High-speed display Main system clock (oscillation frequency) Subsystem clock (oscillation frequency) Minimum instruction execution time
µPD789304
bytes bytes
µPD789306
µPD789314
µPD789316
Ceramic/crystal oscillation (1.0 MHz) Crystal oscillation (32.768 kHz) µs/1.6 operation with main system clock)
oscillation (2.0 MHz)
µs/2.0 operation with main system clock)
32.768 operation with subsystem clock) General-purpose registers Instruction ports bits registers 16-bit operation manipulation (set, reset, test) Total: CMOS I/O: N-ch open drain: 16-bit timer: 8-bit timer/event counter: Watch timer: Watchdog timer: channel channels channel channel
Timers
Serial interface controller/driver Vectored interrupt Maskable sources Non-maskable Power supply voltage Operating ambient temperature Package
Switchable between 3-wire serial mode UART mode: channel 3-wire serial mode: channel Segment signal outputs: (Max.) Common signal outputs: (Max.) Internal: External: Internal: +85°C 64-pin plastic 64-pin plastic TQFP
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
CONTENTS
CONFIGURATION (TOP VIEW) BLOCK DIAGRAM FUNCTIONS Port Pins Non-Port Pins Circuits Recommended Connection Unused Pins
MEMORY SPACE. PERIPHERAL HARDWARE FUNCTIONS Ports Clock Generator. Timer. Serial Interface. Controller/Driver.
INTERRUPT FUNCTIONS. STANDBY FUNCTION RESET FUNCTION. MASK OPTIONS
OVERVIEW INSTRUCTION 10.1 10.2 Conventions. List Operations.
ELECTRICAL SPECIFICATIONS CHARACTERISTICS CURVES CONTROLLER/DRIVER (REFERENCE VALUES). PACKAGE DRAWINGS RECOMMENDED SOLDERING CONDITIONS. APPENDIX DEVELOPMENT TOOLS APPENDIX RELATED DOCUMENTS.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
CONFIGURATION (TOP VIEW)
64-pin plastic 64-pin plastic TQFP
(CL1) (CL2) RESET P00/KR0 P01/KR1 P02/KR2 P03/KR3
P20/SCK10 P21/SO10 P22/SI10 P23/SCK20/ASCK20 P24/SO20/TxD20 P25/SI20/RxD20 P26/TO20 P30/INTP0/CPT20 P31/INTP1/TO30/TMI40 P32/INTP2/TO40 P33/INTP3
Caution Remark
Connect (Internally Connected) directly pin. names enclosed parentheses when using µPD789314, 789316.
CAPH CAPL VLC0 VLC1 VLC2 COM0 COM1 COM2 COM3
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
ASCK20: CAPH, CAPL: CL1, CL2: COM0 COM3: CPT20: INTP0 INTP3: KR3: P03: P13: P26: P33: P53: Asynchronous serial input power supply capacitance control oscillator Common output Capture trigger input Internally connected External interrupt input return Port Port Port Port Port RESET: RxD20: S23: SCK10, SCK20: SI10, SI20: SO10, SO20: TMI40: TO20, TO30, TO40: TxD20: VDD: VLC0 VSS: XT1, XT2: VLC2: Reset Receive data Segment output Serial clock Serial input Serial output Timer input Timer output Transmit data Power supply power supply Ground Crystal/ceramic oscillator Crystal oscillator
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
BLOCK DIAGRAM
TO30/TMI40/P31 TO40/P32 TMI40/TO30/P31
Cascaded 16-bit timer/event counter
8-bit timer 8-bit timer/event counter
Port
Port
TO20/P26 CPT20/P30
16-bit timer
Port 78K/0S core
Watch timer
Port
Port Watchdog timer
SCK10/P20 SO10/P21 SI10/P22
Serial interface
space data
System control
RESET (CL1) (CL2) INTP0/P30 INTP1/P31
SCK20/ASCK20/P23 SO20/TxD20/P24 SI20/RxD20/P25
Serial interface
Interrupt control COM0 COM3 VLC0 VLC2 CAPH CAPL controller driver
INTP2/P32 INTP3/P33 KR0/P00 KR3/P03
Remark
names enclosed parentheses when using µPD789314, 789316.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
FUNCTIONS
Port Pins
Name Function Port 4-bit port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified port units software. Port 4-bit port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified port units software. Port 7-bit port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified 1-bit units software. After Reset Input Alternate Function
Input
Input
SCK10 SO10 SI10 SCK20/ASCK20 SO20/TxD20 SI20/RxD20 TO20
Port 4-bit port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified 1-bit units software. Port 4-bit port. Input/output specified 1-bit units. on-chip pull-up resistor specified units mask option.
Input
INTP0/CPT20 INTP1/TO30/TMI40 INTP2/TO40 INTP3
Input
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Non-Port Pins
Name INTP0 INTP1 INTP2 INTP3 SCK10 SCK20 SI10 SI20 SO10 SO20 ASCK20 RxD20 TxD20 TO20 CPT20 TO30 TO40 TMI40 Input Input Output Output Input Output Output Input Output Output Input Input return signal detection Serial clock input/output serial interface (SIO10) Serial clock input/output serial interface (SIO20) Serial data input SIO10 serial interface Serial data input SIO20 serial interface Serial data output SIO10 serial interface Serial data output SIO20 serial interface Serial clock input asynchronous serial interface Serial data input asynchronous serial interface Serial data output asynchronous serial interface 16-bit timer (TM20) output Capture edge input 8-bit timer (TM30) output 8-bit timer (TM40) output External count clock input 8-bit timer (TM40) Segment signal output controller/driver Common signal output controller/driver drive voltage Connection driver's capacitor Input Input Input Input Input Input Input Input Output Output Connecting crystal resonator main system clock oscillation Connections resistor capacitor main system clock oscillation Connecting crystal resonator subsystem clock oscillation System reset input Positive power supply Ground potential Internally connected. Connect directly VSS. Input Input Input Input Input Input Function External interrupt input which valid edge (rising edge, falling edge, both rising falling edges) specified After Reset Input Alternate Function P30/CPT20 P31/TO30/TMI40 P32/TO40 P23/ASCK20 P25/RxD20 P24/TxD20 P23/SCK20 P25/SI20 P24/SO20 P30/INTP0 P31/INTP1/TMI40 P32/INTP2 P31/INTP1/TO30
COM0 COM3 Output VLC0 VLC2 CAPH CAPL
Note Note Note Note
Input Input Input Input
RESET
Notes
µPD789304, 789306 only µPD789314, 789316 only
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Circuits Recommended Connection Unused Pins circuit type each recommended connection unused pins shown Table 3-1. circuit configuration each type, refer Figure 3-1. Table 3-1. Types Circuits Recommended Connection Unused Pins
Name Circuit Type Recommended Connection Unused Pins
P00/KR0 P03/KR3 P20/SCK10 P21/SO10 P22/SI10 P23/SCK20/ASCK20 P24/SO20/TxD20 P25/SI20/RxD20 P26/TO20 P30/INTP0/CPT20 P31/INTP1/TO30/ TMI40 P32/INTP2/TO40 P33/INTP3 COM0 COM3 VLC0 VLC2 CAPH, CAPL RESET
Input: Independently connect resistor. Output: Leave open.
Input: Independently connect resistor. Output: Leave open.
13-W Input Input Output
Input: Independently connect resistor. Output: Leave open. Leave open.
Connect VSS. Leave open. Directly connect VSS.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Figure 3-1. Circuits Type Type 13-W
Pull-up resistor (mask option)
IN/OUT Output data Output disable N-ch
Schmitt-triggered input with hysteresis characteristics
Input enable Middle-voltage input buffer
Type
Type
VLC0
Pull-up enable Data P-ch
P-ch
P-ch
VLC1
P-ch N-ch P-ch
IN/OUT Output disable N-ch
data
N-ch P-ch N-ch N-ch
VLC2
Input enable
Type
Type
VLC0
P-ch P-ch N-ch P-ch N-ch
Pull-up enable Data P-ch
P-ch
VLC1
IN/OUT Output disable N-ch
data VLC2
N-ch P-ch N-ch
N-ch P-ch
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
MEMORY SPACE
Figure shows memory µPD789304, 789306, 789314, 789316. Figure 4-1. Memory
FFFFH Special function registers (SFR) bits FF00H FEFFH Internal high-speed bits FD00H FCFFH Reserved FA18H FA17H Data memory space display bits FA00H F9FFH nnnnH+1 nnnnH Reserved nnnnH
Program area
Program memory space
Internal ROMNote
0080H 007FH CALLT table area 0040H 003FH Program area 0022H 0021H
0000H
0000H
Vector table area
Note internal capacity depends product (see following table).
Part Number Last Address Internal nnnnH 1FFFH 3FFFH
µPD789304, 789314 µPD789306, 789316
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
PERIPHERAL HARDWARE FUNCTIONS
Ports ports listed below. CMOS I/O: N-ch open-drain I/O: Table 5-1. Port Functions
Port Name Port Port Port Port Port Name Function port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified software. port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified software. port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified software. port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified software. port. Input/output specified 1-bit units. on-chip pull-up resistor specified mask option.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Clock Generator specifications main system clock generator differ depending product shown below. Main system clock generator Ceramic/crystal oscillation: µPD789304, 789306 This generator's oscillation frequency range MHz. minimum instruction execution time changed from operation). oscillation: µPD789314, 789316 This generator's oscillation frequency range MHz. minimum instruction execution time changed from operation). Subsystem clock generator (crystal oscillation) This generator's oscillation frequency 32.768 kHz. minimum instruction execution time 32.768 operation). Figure 5-1. Block Diagram Clock Generator
Internal
oscillation mode register (SCKM)
Subsystem clock oscillator Prescaler
Watch timer controller/driver
(CL1) (CL2)
Main system clock oscillator
Prescaler (fcc)
Clock peripheral hardware
Selector
Standby controller
Wait controller
clock (fCPU)
STOP
PCC1 Processor clock control register (PCC)
CSS0 Subsystem clock control register (CSS)
Internal
Remark
Pins names enclosed parentheses when using oscillation (µPD789314, 789316).
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Timer Five timer channels incorporated. 16-bit timer (TM20): 8-bit timer (TM30, TM40): Watch timer (WT): Watchdog timer (WTM): channel channels channel channel Table 5-2. Timer Operation
TM20 Operation Interval time mode External event counter Function Timer output Square wave output Interrupt request channel output TM30 channel channel output output TM40 channel channel output output channel channel
Figure 5-2. Block Diagram 16-Bit Timer (TM20)
Internal 16-bit timer mode control register (TMC20)
TOF20 CPT201 CPT200 TOC20 TCL201 TCL200 TOE20
output latch
PM26
TO20/P26 16-bit compare register (CR20) Match
Selector
TOD20
16-bit timer mode control register (TMC20)
fCLK fCLK/22 fCLK/25 fCLK/27 CPT20/P30 /INTP0
INTTM20
16-bit timer counter (TM20)
Edge detector
16-bit capture register (TCP20)
16-bit counter read buffer
Internal
Remark
fCLK:
Data Sheet U14384EJ1V0DS
Selector
Carrier clock (during carrier generator mode) timer output signal (during mode other than carrier generator mode) (from Figure (C))
Selector
TM40 (from Figure (A))
Data Sheet U14384EJ1V0DS
Figure 5-3. Block Diagram Timer (TM30)
Internal 8-bit timer mode control register (TMC30) TCE30 TCL301 TCL300 TMD300 TOE30
output latch
PM30
Decoder Selector
8-bit compare register (CR30) Match TO30/P31/ INTP1/TMI40
fCLK/24 fCLK/28 Timer interrupt request signal (from Figure (B))
8-bit timer counter (TM30) Clear
µPD789304, 789306, 789314, 789316
Internal reset signal
From Figure Count operation start signal (during cascade connection mode)
Selector Cascade connection mode INTTM30
From Figure Timer match signal (during cascade connection mode) Figure Timer match signal (during carrier generator mode)
Figure Timer match signal (during cascade connection mode)
Remark
fCLK:
Figure 5-4. Block Diagram Timer (TM40)
Internal 8-bit timer mode control register (TMC40) TCE40 TCL402 TCL401 TCL400 TMD401 TMD400 TOE40
8-bit compare register (CRH40) 8-bit compare register (CR40)
Carrier generator output control register (TCA40) RMC40 NRZB40 NRZ40
Decoder Selector
From Figure Timer counter match signal from timer (during carrier generator mode)
Match fCLK/23 fCLK/27
Selector
Output control circuitNote
TO40/P32/INTP2 Figure Carrier clock (during carrier generator mode) timer output signal (during mode other than carrier generator mode)
Data Sheet U14384EJ1V0DS
8-bit timer counter (TM40) Clear Carrier generator mode mode Reset Cascade connection mode
µPD789304, 789306, 789314, 789316
TMI40/P31/ INTP1/TO30
Prescaler
TMI/2 TMI/22 TMI/23
Figure TM40 (during cascade connection mode)
Internal reset signal Figure Count operation start signal timer (during cascade connection mode) Figure TM40 timer counter match signal (during cascade connection mode) INTTM40 Figure Timer interrupt request signal count clock input signal TM30
From Figure TM30 match signal (during cascade connection mode)
Note details, Figure 5-5. Remark fCLK:
µPD789304, 789306, 789314, 789316
Figure 5-5. Block Diagram Output Controller (Timer
TOE40 RMC40 NRZ40 output latch
PM32
Selector
TO40/P32/ INTP2 Carrier clock (during carrier generator mode) timer output signal (during mode other than carrier generator mode)
Carrier generator mode
Figure 5-6. Block Diagram Watch Timer (WT)
Clear
Selector
fCLK/27
9-bit prescaler
5-bit counter Clear
INTWT
Selector
INTWTI
WTM7 WTM6 WTM5 WTM4 WTM1 WTM0 Watch timer mode control register (WTM) Internal
Remark
fCLK:
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Figure 5-7. Block Diagram Watchdog Timer (WTM)
Internal
fCLK fCLK
Prescaler fCLK fCLK
WDTMK
WDTIF 7-bit counter Clear
Controller
Selector
INTWDT maskable interrupt request RESET INTWDT non-maskable interrupt request
WDCS2 WDCS1 WDCS0 Watchdog timer clock select register (WDCS)
WDTM4 WDTM3 Watchdog timer mode register (WDTM) Internal
Remark
fCLK:
Data Sheet U14384EJ1V0DS
Selector
Selector
Figure 5-8. Block Diagram Serial Interface
Internal Serial operation mode register (CSIM10) CSIE10 TPS101 TPS100 DIR10 CSCK10
Serial Interface
Operation stop mode
5.4.1 Serial interface (SIO10)
3-wire serial mode
SI10/P22
Serial shift register (SIO10)
SO10/P21
PM21
Serial interface (SIO10) following types modes.
Data Sheet U14384EJ1V0DS
Serial clock counter
Interrupt request generator
INTCSI10
PM20 Clock controller
SCK10/P20
fCLK/22 fCLK/23 fCLK/24 fCLK/25
TPS101 TPS100
µPD789304, 789306, 789314, 789316
Remark
fCLK:
Figure 5-9. Block Diagram Serial Interface
Internal Asynchronous serial interface status register (ASIS20) Receive buffer register (RXB20/SIO20) PE20 FE20 OVE20 Direction controller TXE20 RXE20 PS201 PS200 CL20 Asynchronous serial interface mode register (ASIM20) SL20
5.4.2 Serial interface (SIO20)
Direction controller
Transmit shift register (TXS20/SIO20)
Operation stop mode Asynchronous serial interface (UART) mode 3-wire serial mode
RxD20/SI20/
Receive shift register (RXS20)
TxD20/SO20/
PM24 Reception controller INTSR20/INTCSI20 Transmission controller SCK20 output controller INTST20
Serial interface (SIO20) following three types modes.
Data Sheet U14384EJ1V0DS
CSIE20 TXE20 RXE20 CSIE20 DIR20 CSCK20 Serial interface mode register (CSIM20) Internal
PM23
ASCK20/SCK20/ Baud rate generator
Note
fX/2 fX/28 CSCK20
TPS203 TPS202 TPS201 TPS200 Baud rate generator control register (BRGC20)
µPD789304, 789306, 789314, 789316
Note Figure 5-10 configuration baud rate generator.
Selector
Receive clock counter
Selector
Receive shift clock
Selector
Figure 5-10. Block Diagram Baud Rate Generator
Clock receive detection Transmit shift clock Transmit clock counter fXX/2 fXX/22 fXX/23 fXX/24 fXX/25 fXX/26 fXX/27 fXX/28
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
TXE20 RXE20 CSIE20 Receive detection
SCK20/ASCK20/P20
TPS203 TPS202 TPS201 TPS200 Baud rate generator control register (BRGC20) Internal
µPD789304, 789306, 789314, 789316
Controller/Driver controller/driver following functions. Enables automatic output segment signals common signals automatically reading from display data memory. types display modes selected: duty (1/3 bias) duty (1/3 bias) four frame frequency settings selected each display mode. There segment signal outputs S23) four common signal outputs (COM0 COM3). Operation using subsystem clock also supported.
Data Sheet U14384EJ1V0DS
Selector
Figure 5-11. Block Diagram Controller/Driver
clock control register (LCDC0)
LCDC03 LCDC02 LCDC01 LCDC00
Internal voltage amplifier control register (LCDVA0) FA00H LCDON0 VAON0 LIPS0 LCDM02 LCDM01 LCDM00 GAIN 76543210 display mode register (LCDM0)
Display data memory FA17H 76543210
fCLK/25 fCLK/26 fCLK/27
Prescaler fLCD fLCD fLCD fLCD fLCD clock selector Voltage amplifier circuit 3210 Selector LCDON0 LCDON0 3210 Selector
Data Sheet U14384EJ1V0DS
Timing controller
µPD789304, 789306, 789314, 789316
drive voltage controller
Common driver
Segment driver
Segment driver
CAPH CAPL VLC2 VLC1 VLC0 COM0 COM1 COM2 COM3
Remark
fCLK:
µPD789304, 789306, 789314, 789316
INTERRUPT FUNCTIONS
total interrupt sources divided into following types provided. Non-maskable: Maskable: Table 6-1. Interrupt Source List
Interrupt Type Priority
Note
Interrupt Source
Internal/ External
Vector Table Address
Name Nonmaskable Maskable INTWDT INTWDT INTP0 INTP1 INTP2 INTP3 INTSR20 INTCSI20 INTCSI10 INTST20 INTWTI INTTM20 INTTM30 INTTM40 INTWT INTKR00
Trigger Watchdog timer overflow (with watchdog timer mode selected) Watchdog timer overflow (with interval timer mode selected) input edge detection External 0006H 0008H 000AH 000CH serial interface UART reception serial interface 3-wire transfer reception serial interface 3-wire transfer reception serial interface UART transmission Watch timer interval timer interrupt Generation match signal 16-bit timer Generation match signal 8-bit timer Generation match signal 8-bit timer/event counter Watch timer interrupt return signal detection External 0010H 0012H 0014H 0016H 0018H 001AH 001EH 0020H Internal 000EH Internal 0004H
Basic Configuration Note Type
Notes Remark
Default priority priority order when several maskable interrupt requests generated same time. highest order lowest order. Basic configuration types correspond Figure 6-1. watchdog timer interrupt sources (INTWDT): non-maskable interrupt maskable interrupt (internal), available, either which selected.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Figure 6-1. Basic Configuration Interrupt Function Internal non-maskable interrupt
Internal
Interrupt request
Vector table address generator
Standby release signal
Internal maskable interrupt
Internal
Interrupt request
Vector table address generator
Standby release signal
External maskable interrupt
Internal
INTM0, INTM1, KRM00
Interrupt request
Edge detector
Vector table address generator
Standby release signal
INTM0: External interrupt mode register INTM1: External interrupt mode register KRM00: return mode register Interrupt request flag Interrupt enable flag Interrupt mask flag
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
STANDBY FUNCTION
following standby modes available further reduction system current consumption. HALT mode: this mode, operation clock stopped. average current consumption reduced intermittent operation combining this mode with normal operation. STOP mode: this mode, oscillation main system clock stopped. operations performed main system clock suspended resulting extremely small power consumption. Figure 7-1. Standby Function
System clock operation STOP instruction Interrupt request HALT instruction
Interrupt request
RESET FUNCTION
STOP mode Main system clock oscillation stopped
HALT mode Clock supply halted, oscillation maintained
following reset methods available. External reset RESET Internal reset watchdog timer program loop time detection
MASK OPTIONS
µPD789304, 789306, 789314, 789316 have following mask options. Mask options on-chip pull-up resistor selected. Specifies on-chip pull-up resistor 1-bit units. Does specify on-chip pull-up resistor.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
OVERVIEW INSTRUCTION
This section lists instruction µPD789304, 789306, 789314, 789316. 10.1 Conventions 10.1.1 Operand expressions description methods Operands described "Operand" column each instruction accordance with description method instruction operand expression (see assembler specifications details). When there more description methods, select them. Uppercase letters symbols, words described they are. meaning each symbol described below. Immediate data specification Absolute address specification Relative address specification Indirect address specification
immediate data, enter appropriate numeric value label. When using label, sure enter symbols. operand register expressions, either function names etc.) absolute names (names parenthesis table below, etc.) used description. Table 10-1. Operand Expressions Description Methods
Expression saddr saddrp addr16 addr5 word byte Description Method (R0), (R1), (R2), (R3), (R4), (R5), (R6), (R7) (RP0), (RP1), (RP2), (RP3) Special function register symbol FE20H FF1FH: immediate data label FE20H FF1FH: immediate data label (even addresses only) 0000H FFFFH: immediate data label (even addresses only 16-bit data transfer instruction) 0040H 007FH: immediate data label (even addresses only) 16-bit immediate data label 8-bit immediate data label 3-bit immediate data label
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
10.1.2 Description "Operation" column PSW: NMIS:
register; 8-bit accumulator register register register register register register register register pair; 16-bit accumulator register pair register pair register pair Program counter Stack pointer Program status word Carry flag Auxiliary carry flag Zero flag Interrupt request enable flag Flag indicating non-maskable interrupt servicing progress Memory contents indicated address register contents parenthesis Higher bits lower bits 16-bit register Logical product (AND) Logical (OR) Exclusive logical (exclusive Inverted data 16-bit immediate data label Signed 8-bit data (displacement value)
addr16: jdisp8:
10.1.3 Description "Flag" column (Blank): Unchanged Cleared Set/cleared according result Previously saved value restored
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
10.2 List Operations
Mnemonic Operand Bytes Clocks Operation #byte saddr, #byte sfr, #byte saddr saddr, sfr, !addr16 !addr16, PSW, #byte PSW, [DE] [DE], [HL] [HL], byte] byte], saddr [DE] [HL] byte] MOVW #word saddrp saddrp, XCHW
Note Note Note Note Note Note
Flags
byte (saddr) byte byte (saddr) (saddr) (addr16) (addr16) byte (DE) (DE) (HL) (HL) byte) byte) (saddr) (sfr) (DE) (HL) byte) word (saddrp) (saddrp)
Notes Remark
Except Except only instruction clock cycle clock cycle (fCPU) selected processor clock control register (PCC).
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Mnemonic Operand Bytes Clocks Operation #byte saddr, #byte saddr !addr16 [HL] byte] ADDC #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] SUBC #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr) (saddr) byte (saddr) (addr16) (HL) byte) Flags
Remark
instruction clock cycle clock cycle (fCPU) selected processor clock control register (PCC).
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Mnemonic Operand Bytes Clocks Operation #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] ADDW SUBW CMPW #word #word #word saddr saddr INCW DECW RORC ROLC byte (saddr) (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr) (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr) byte (saddr) (addr16) (HL) byte) word word word rr+1 (saddr) (saddr) rr-1 (saddr) (saddr) (CY, time (CY, time time time Flags
Remark
instruction clock cycle clock cycle (fCPU) selected processor clock control register (PCC).
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Mnemonic Operand Bytes Clocks Operation SET1 saddr. sfr. PSW. [HL]. CLR1 saddr. sfr. PSW. [HL]. SET1 CLR1 NOT1 CALL CALLT !addr16 [addr5] (saddr. bit) sfr. PSW. (HL). (saddr. bit) sfr. PSW. (HL). 3)H, 3)L, addr16, 1)H, 1)L, (00000000, addr5 (00000000, addr5), (SP), (SP), NMIS PSW, rpH, rpL, (SP), (SP), addr16 jdisp8 Flags
RETI
PUSH
MOVW
!addr16 $addr16
Remark
instruction clock cycle clock cycle (fCPU) selected processor clock control register (PCC).
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Mnemonic Operand Bytes Clocks Operation $addr16 $addr16 $addr16 $addr16 saddr. bit, $addr16 sfr. bit, $addr16 bit, $addr16 PSW. bit, $addr16 saddr. bit, $addr16 sfr. bit, $addr16 bit, $addr16 PSW. bit, $addr16 DBNZ $addr16 $addr16 saddr, $addr16 HALT STOP jdisp8 jdisp8 jdisp8 jdisp8 jdisp8 (saddr. bit) jdisp8 sfr. jdisp8 jdisp8 PSW. jdisp8 (saddr. bit) jdisp8 sfr. jdisp8 jdisp8 PSW. then jdisp8 then jdisp8 (saddr) (saddr) then jdisp8 (saddr) Operation (Enable Interrupt) (Disable Interrupt) HALT Mode STOP Mode Flags
Remark
instruction clock cycle clock cycle (fCPU) selected processor clock control register (PCC).
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings 25°C)
Parameter Power supply voltage Input voltage Symbol P03, P13, P26, P33, (CL1), (CL2), XT1, XT2, RESET N-ch open drain On-chip pull-up resistor Output voltage Output current, high Total pins Output current, Total pins Operating ambient temperature Storage temperature Tstg Conditions Ratings -0.3 +6.5 -0.3 -0.3 -0.3 -0.3 +150
Note Note Note
Unit
Note less Caution Product quality suffer absolute maximum rating exceeded even momentarily parameter. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions that ensure that absolute maximum ratings exceeded. Remarks names enclosed parentheses when using µPD789304, 789306. Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Main System Clock Oscillator Characteristics Ceramic/crystal oscillation (µPD789304, 789306) +85°C,
Resonator Ceramic resonator Recommended Circuit
Parameter Oscillation frequency (fX) Oscillation stabilization Note time Oscillation frequency
Note Note
Conditions
MIN.
TYP.
MAX.
Unit
After reaches oscillation voltage range MIN.
Crystal resonator
Oscillation stabilization Note time
External clock
input frequency (fX)
Note
input high-/low-level width (tXH, tXL)
input frequency (fX)
Note
input high-/low-level width (tXH, tXL)
OPEN
Notes
Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reset STOP mode release. resonator whose oscillation stabilizes within oscillation stabilization wait time.
Cautions When using main system clock oscillator, wire follows area enclosed broken lines above figures avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. When main system clock stopped device operating subsystem clock, wait until oscillation stabilization time been secured program before switching back main system clock. Remark resonator selection oscillator constant, customers requested either evaluate oscillation themselves apply resonator manufacturer evaluation.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
oscillation (µPD789314, 789316) +85°C,
Resonator resonator Recommended Circuit
Parameter Oscillation frequency Note (fCC) Oscillation stabilization Note time
Conditions
MIN.
TYP.
MAX.
Unit
External clock
input frequency Note (fCC) input high-/low-level width (tXH, tXL) input frequency Note (fCC) input high-/low-level width (tXH, tXL)
OPEN
Notes
Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reset STOP mode release.
Cautions When using main system clock oscillator, wire follows area enclosed broken lines above figure avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. When main system clock stopped device operating subsystem clock, wait until oscillation stabilization time been secured program before switching back main system clock.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Oscillation Frequency Characteristics +85°C)
Parameter Oscillation frequency Symbol fCC1 fCC2 fCC3 fCC4 fCC5 fCC6 fCC7 fCC8 fCC9 Target: Target: Conditions 11.0 Target: MIN. 0.75 0.75 TYP. MAX. Unit
Remarks above nine values that typical value oscillation frequency within MHz. resistor capacitor error included.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Subsystem Clock Oscillator Characteristics +85°C,
Resonator Crystal resonator Recommended Circuit
Parameter Oscillation frequency Note (fXT) Oscillation stabilization Note time input frequency Note (fXT) input high-/low-level width (tXTH, tXTL)
Conditions
MIN.
TYP. 32.768
MAX.
Unit
External clock
14.3
15.6
Notes
Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reaches oscillation voltage range MIN.
Cautions When using subsystem clock oscillator, wire follows area enclosed broken lines above figure avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. subsystem clock oscillator designed low-amplitude circuit reducing current consumption, more prone malfunction noise than main system clock oscillator. Particular care therefore required with wiring method when subsystem clock used. Remark resonator selection oscillator constant, customers requested either evaluate oscillation themselves apply resonator manufacturer evaluation.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Characteristics +85°C, (1/4)
Parameter Output current, Symbol pins Output current, high pins Input voltage, high VIH1 0.7VDD 0.9VDD VIH2 N-ch open drain On-chip pullup resistor VIH3 RESET, P03, P26, (CL1), (CL2), XT1, 0.7VDD 0.9VDD 0.7VDD 0.9VDD 0.8VDD 0.9VDD VIL2 VIL3 RESET, P03, P26, (CL1), (CL2), XT1, Conditions MIN. TYP. MAX. 0.3VDD 0.1VDD 0.3VDD 0.1VDD 0.2VDD 0.1VDD Unit
VIH4
Input voltage,
VIL1
VIL4
Output voltage, high
-100
Output voltage,
VOL1
P03, P13, P26,
VOL2
Remarks names enclosed parentheses when using µPD789314, 789316. Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Characteristics +85°C, (2/4)
Parameter Input leakage current, high Symbol ILIH1 Conditions P03, P13, P26, P33, RESET (CL1), (CL2), XT1, (N-ch open drain) P03, P13, P26, P33, RESET (CL1), (CL2), XT1, (N-ch open drain) VOUT VOUT P03, P13, P26, MIN. TYP. MAX. Unit
ILIH2 ILIH3 Input leakage current, ILIL1
ILIL2 ILIL3 Output leakage current, ILOH high Output leakage current, ILOL Software pull-up resistor Mask option pull-up resistor
Note
Note there on-chip pull-up resistor (specified mask option), have been input mode when read instruction executed read from P53, low-level input leakage current flows during only cycle. other times, maximum leakage current Remarks names enclosed parentheses when using µPD789314, 789316. Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Characteristics +85°C, (3/4)
Parameter Power supply Note current (Ceramic/crystal oscillation) IDD2 Symbol IDD1 Conditions crystal oscillation operation mode crystal oscillation HALT mode 32.768 crystal oscillation operation Note mode IDD4 32.768 crystal oscillation HALT Note mode IDD5 STOP mode ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10%
Note Note Note
MIN.
TYP. 0.36 0.16 0.96 0.26
MAX. 0.45 1.92 0.76 0.34
Unit
Note Note Note
IDD3
±10% ±10% operating ±10% ±10% operating ±10% Note ±10% ±10% ±10% ±10%
0.05 0.05
27.8
Note
Notes
port current (including current that flows on-chip pull-up resistor) included. High-speed mode operation (when processor clock control register (PCC) 00H) Low-speed mode operation (when 02H) When main system clock stopped This total current that flows when controller/driver operating (LCDON0 VAON0 LIPS0 power supply current when operating (LCDON0 VAON0 LIPS0 included IDD2.
Remark
This current when voltage booster circuit stopped (LCDON0 VAON0 Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Characteristics +85°C, (4/4)
Parameter Power supply Note current oscillation) IDD2 Symbol IDD1 Conditions oscillation operation mode oscillation HALT mode 32.768 crystal oscillation operation Note mode IDD4 32.768 crystal oscillation HALT Note mode IDD5 STOP mode ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10%
Note Note Note Note Note Note
MIN.
TYP. 1.65 0.65 0.38 0.35
MAX. 1.44 1.05 2.29 1.28 0.82
Unit
IDD3
±10% ±10% operating ±10% ±10% operating ±10% Note ±10% ±10% ±10% ±10%
0.05 0.05
27.8
Note
Notes
port current (including current that flows on-chip pull-up resistor) included. High-speed mode operation (when processor clock control register (PCC) 00H) Low-speed mode operation (when 02H) When main system clock stopped This total current that flows when controller/driver operating (LCDON0 VAON0 LIPS0 power supply current when operating (LCDON0 VAON0 LIPS0 included IDD2.
Remark
This current when voltage booster circuit stopped (LCDON0 VAON0 Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Characteristics Basic operation +85°C,
Parameter Cycle time (minimum instruction execution time) TMI40 input frequency Symbol TCY1 Conditions Operating with main system clock MIN. TMI40 input high-/lowlevel width Interrupt input high/low-level width return input lowlevel width RESET low-level width tTIMH, tTIML tINTH, tINTL tKRL tRSL KR00 KR03 INTP0 INTP3 TYP. MAX. Unit
Operating with subsystem clock fTMI
(main system clock)
Cycle time
Guaranteed operation range
Power supply voltage
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Serial interface (SIO10, SIO20) +85°C, 3-wire serial mode (internal clock output)
Parameter SCKn0 cycle time Symbol tKCY1 Conditions MIN. 3200 SCKn0 high-/low-level width SIn0 setup time SCKn0) SIn0 hold time (from SCKn0) Delay time from SCKn0 SOn0 output tKH1, tKL1 tSIK1
tKCY1/2-50 tKCY1/2-150
TYP.
MAX.
Unit
tSI1
tSO1
Note
1000
Note load resistance load capacitance SOn0 output lines. Remark
3-wire serial mode (external clock input)
Parameter SCKn0 cycle time Symbol tKCY2 Conditions MIN. 3200 SCKn0 high-/low-level width SIn0 setup time SCKn0) SIn0 hold time (from SCKn0) Delay time from SCKn0 SOn0 output tKH2, tKL2 tSIK2 1600 tSI2 tSO2
Note
TYP.
MAX.
Unit
1000
Note load resistance load capacitance SOn0 output lines. Remark
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
UART mode (SIO20 only) (dedicated baud rate generator output)
Parameter Transfer rate Symbol Conditions MIN. TYP. MAX. 78125 19531 Unit
UART mode (SIO20 only) (external clock input)
Parameter ASCK20 cycle time Symbol tKCY3 Conditions MIN. 3200 ASCK20 high-/lowlevel width Transfer rate tKH3, tKL3 1600 39063 9766 ASCK20 rise/fall time TYP. MAX. Unit
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Timing Test Points (excluding (CL1) inputs)
0.8VDD 0.2VDD 0.8VDD 0.2VDD
Test points
Clock Timing
1/fCLK VIH4 (MIN.) VIL4 (MAX.)
(CL1) input
1/fXT tXTL tXTH VIH5 (MIN.) VIL5 (MAX.)
input
Remark
fCLK:
Timing
1/fTMI tTIL tTIH
TMI40 input
Interrupt Input Timing
tINTL tINTH
INTP0 INTP3
Return Input Timing
tKRL
KR00 KR03
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
RESET Input Timing
tRSL
RESET
Serial Transfer Timing 3-wire serial mode:
tKCYm tKLm tKHm
SCKn0
tSIKm SIn0
tKSIm
Input data
tKSOm
SOn0
Output data
Remark
UART mode (external clock input):
tKCY3 tKL3 ASCK20 tKH3
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Characteristics +85°C,
Parameter output voltage variation range Doubler output Tripler output Voltage boost wait Note time Symbol VLCD2 Conditions 0.47 GAIN GAIN VLCD1 VLCD0 tVAWAIT 0.47 0.47 GAIN GAIN output voltage Note differential (common) output voltage Note (segment) differential VODC VODS MIN. 0.84 1.26 2VLCD2 3VLCD2 0.15 ±0.2 ±0.2 TYP. 2.0VLCD2 3.0VLCD2 MAX. 1.165 1.74 2.0VLCD2 3.0VLCD2 Unit
Notes
This wait time from when voltage boosting started (VAON0 until display enabled (LCDON0 voltage differential difference between segment common signal output's actual ideal output voltages.
Remark
Capacitor connected between CAPH CAPL Capacitor connected between VLC0 ground Capacitor connected between VLC1 ground Capacitor connected between VLC2 ground
Data Memory STOP Mode Supply Voltage Data Retention Characteristics +85°C)
Parameter Data retention power supply voltage Release signal time Symbol VDDDR tSREL Conditions MIN. TYP. MAX. Unit
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Data Retention Timing
Internal reset operation HALT mode STOP mode Data retention mode Operation mode
VDDDR STOP instruction execution
tSREL
RESET
tWAIT
HALT mode STOP mode Data retention mode Operation mode
VDDDR STOP instruction execution
tSREL
Standby release signal (interrupt request) tWAIT
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Oscillation Stabilization Wait Time +85°C,
Parameter Oscillation stabilization wait Note time (ceramic/crystal oscillation) Oscillation stabilization wait time oscillation) tWAIT Symbol tWAIT Conditions Release RESET Release interrupt Release RESET Release interrupt MIN. TYP. Note /fCC /fCC
MAX.
Unit
Notes
resonator whose oscillation stabilizes within oscillation stabilization wait time. Selection /fX, /fX, possible with bits (OSTS0 OSTS2) oscillation stabilization time select register (OSTS).
Remarks Main system clock oscillation frequency (ceramic/crystal oscillation) fCC: Main system clock oscillation frequency oscillation)
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
CHARACTERISTICS CURVES CONTROLLER/DRIVER (REFERENCE VALUES)
Characteristics curves voltage boost stabilization time following shows characteristics curves time from start voltage boost (VAON0 changes output voltage (when GAIN (using display panel))
Output Voltage/Voltage Boost Time
output voltage
VLCD0 VLCD1 VLCD2 1000 1500 2000 Voltage boost time [ms] 2500 3000 3500 4000
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Temperature characteristics output voltage following shows temperature characteristics curves output voltage.
Output Voltage/Temperature (When GAIN
VLCD2
VLCD1
VLCD0
output voltage
Temperature [°C]
Output Voltage/Temperature (When GAIN
VLCD2
VLCD1
VLCD0
output voltage
Temperature [°C]
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
PACKAGE DRAWINGS
64-PIN PLASTIC (14x14)
detail lead
NOTE Each lead centerline located within 0.15 true position (T.P.) maximum material condition.
ITEM
MILLIMETERS 17.6±0.4 14.0±0.2 14.0±0.2 17.6±0.4 0.37 +0.08 -0.07 0.15 (T.P.) 1.8±0.2 0.8±0.2 0.17 +0.08 -0.07 0.10 2.55±0.1 0.1±0.1 5°±5° 2.85 MAX. P64GC-80-AB8-5
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
64-PIN PLASTIC TQFP (12x12)
detail lead
ITEM MILLIMETERS 14.0±0.2 12.0±0.2 12.0±0.2 14.0±0.2 1.125 1.125 0.32 +0.06 -0.10 0.13 0.65 (T.P.) 1.0±0.2 0.17 +0.03 -0.07 0.10 0.1±0.05 1.1±0.1 0.25 0.6±0.15 P64GK-65-9ET-2
NOTE
Each lead centerline located within 0.13 true position (T.P.) maximum material condition.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
RECOMMENDED SOLDERING CONDITIONS
µPD789304, 789306, 789314, µPD789316 should soldered mounted under following recommended conditions. details recommended soldering conditions, refer document Semiconductor Device Mounting Technology Manual (C10535E). soldering methods conditions other than those recommended below, contact sales representative. Table 14-1. Surface Mounting Type Soldering Conditions 64-pin plastic 64-pin plastic 64-pin plastic 64-pin plastic
Soldering Method Infrared reflow Wave soldering Partial heating Soldering Conditions Package peak temperature: 235°C, Time: seconds max. 210°C higher), Count: three times less Package peak temperature: 215°C, Time: seconds max. 200°C higher), Count: three times less Solder bath temperature: 260°C max., Time: seconds max., Count: Once, Preheating temperature: 120°C max. (package surface temperature) temperature: 300°C max. Time: seconds max. (per row) Recommended Condition Symbol IR35-00-3 VP15-00-3 WS60-00-1
Caution different soldering method together (except partial heating). 64-pin plastic TQFP (fine pitch) 64-pin plastic TQFP (fine pitch) 64-pin plastic TQFP (fine pitch) 64-pin plastic TQFP (fine pitch)
Soldering Method Infrared reflow Soldering Conditions Package peak temperature: 235°C, Time: seconds max. 210°C Note higher), Count: times less, Exposure limit: days (after that, prebake 125°C hours) Package peak temperature: 215°C, Time: seconds max. 200°C Note (after that, higher), Count: times less, Exposure limit: days prebake 125°C hours) temperature: 300°C max. Time: seconds max. (per row) Recommended Condition Symbol IR35-107-2
VP15-107-2
Partial heating
Note After opening pack, store 25°C less less allowable storage period. Caution different soldering method together (except partial heating).
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
APPENDIX DEVELOPMENT TOOLS
following development tools available system development using µPD789304, 789306, 789314, 789316. Language Processing Software
RA78K0S
Notes Notes Notes Notes
Assembler package common 78K/0S Series compiler package common 78K/0S Series Device file µPD789306, 789316 Subseries compiler library source file common 78K/0S Series
CC78K0S
DF789306
CC78K0S-L
Flash Memory Writing Tools
Flashpro Note (Part FL-PR3 PG-FP3) FA-64GC FA-64GK
Note
Flash programmer dedicated on-chip flash memory microcontroller Flash memory writing adapter 64-pin plastic (GC-AB8 type) Flash memory writing adapter 64-pin plastic TQFP (fine pitch) (GK-9ET type)
Note
Debugging Tools
IE-78K0S-NS In-circuit emulator IE-70000-MC-PS-B adapter IE-70000-98-IF-C Interface adapter IE-70000-CD-IF-A card interface IE-70000-PC-IF-C Interface adapter IE-70000-PCI-IF-A Interface adapter IE-789306-NS-EM1 Emulation board NP-64GC NP-64GK
Note
This in-circuit emulator debugging hardware software application system using 78K/0S Series. supports integrated debugger (ID78K0S-NS). used with adapter, emulation probe, interface adapter connecting host machine. This adapter supplying power from AC-100 outlet. This adapter needed when PC-9800 series (except notebook type) used host machine IE-78K0S-NS (supports bus). This card interface cable needed when PC-9800 series notebook-type used host machine IE-78K0S-NS (supports PCMCIA socket). This adapter needed when PC/ATor compatible used host machine IE-78K0S-NS (supports bus). This adapter needed when that includes used host machine IE-78K0S-NS. This emulation board emulating peripheral hardware inherent device. used with in-circuit emulator. This board that used connect in-circuit emulator target system. 64-pin plastic (GC-AB8 type). This board that used connect in-circuit emulator target system. 64-pin plastic TQFP (GK-9ET type). System simulator common 78K/0S Series Integrated debugger common 78K/0S Series Device file µPD789306, 789316 Subseries
Note
SM78K0S
Notes Notes
ID78K0S-NS DF789306
Notes
Real-Time
MX78K0S
Notes
78K/0S Series
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Notes Remark Based PC-9800 series (Japanese Windows) Based PC/AT compatible (Japanese/English Windows) Based HP9000 series 700(HP-UXTM), SPARCstation(SunOSTM, SolarisTM), NEWS(NEWS-OSTM) This product manufactured Naito Densei Machida Mfg. Co., Ltd. (TEL +81-44-822-3813). RA78K0S, CC78K0S, SM78K0S used combination with DF789306.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
APPENDIX RELATED DOCUMENTS
Documents Related Devices
Document Name Document This manual prepared U14800E U11047E
µPD789304, 789306, 789314, 789316 Data Sheet µPD78F9306, 78F9316 Data Sheet µPD789306, 789316 Subseries User's Manual
78K/0S Series User's Manual Instructions
Documents Related Development Tools (User's Manuals)
Document Name RA78K0S Assembler Package Operation Language Structured Assembly Language CC78K0S Compiler Operation Language SM78K0S, SM78K0 System Simulator Ver. 2.10 Later Windows Based SM78K Series System Simulator Ver. 2.10 Later ID-78K0-NS, ID78K0S-NS Integrated Debugger Ver. 2.20 Later Windows Based IE-78K0S-NS In-Circuit Emulator IE-789306-NS-EM1 Emulation Board Operation External Part User Open Interface Specifications Operation Document U11622E U11599E U11623E U11816E U11817E U14611E U15006E U14910E U13549E prepared
Documents Related Embedded Software (User's Manual)
Document Name 78K/0S Series MX78K0S Fundamental Document U12938E
Other Related Documents
Document Name SEMICONDUCTOR SELECTION GUIDE Products Packages (CD-ROM) Semiconductor Device Mounting Technology Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System Guide Prevent Damage Semiconductor Devices Electrostatic Discharge (ESD) Document X13769X C10535E C11531E C10983E C11892E
Caution related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
EEPROM trademark Corporation. Windows either registered trademark trademark Microsoft Corporation United States and/or other countries. PC/AT trademark International Business Machines Corporation. HP9000 series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. Solaris SunOS trademarks Microsystems, Inc. NEWS NEWS-OS trademarks Sony Corporation.
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
Regional Information
Some information contained this document vary from country country. Before using product your application, pIease contact office your country obtain list authorized representatives distributors. They will verify:
Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements
addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
Electronics (Germany) GmbH
Benelux Office Eindhoven, Netherlands Tel: 040-2445845 Fax: 040-2444580
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics Hong Kong Ltd. Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-3067-5800 Fax: 01-3067-5899 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Electronics (France) S.A. Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290 Madrid Office Madrid, Spain Tel: 091-504-2787 Fax: 091-504-2860
Electronics Singapore Pte. Ltd.
Novena Square, Singapore Tel: 253-8311 Fax: 250-3583
Electronics Taiwan Ltd. Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 Fax: 02-66
Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 Fax: 08-63
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
Brasil S.A.
Electron Devices Division Guarulhos-SP, Brasil Tel: 11-6462-6810 Fax: 11-6462-6829
J01.2
Data Sheet U14384EJ1V0DS
µPD789304, 789306, 789314, 789316
export this product from Japan regulated Japanese government. export this product prohibited without governmental license, need which must judged customer. export re-export this product from country other than Japan also prohibited without license from that country. Please call sales representative.
information this document current December, 2000. information subject change without notice. actual design-in, refer latest publications NEC's data sheets data books, etc., most up-to-date specifications semiconductor products. products and/or types available every country. Please check with sales representative availability additional information. part this document copied reproduced form means without prior written consent NEC. assumes responsibility errors that appear this document. does assume liability infringement patents, copyrights other intellectual property rights third parties arising from semiconductor products listed this document other liability arising from such products. license, express, implied otherwise, granted under patents, copyrights other intellectual property rights others. Descriptions circuits, software other related information this document provided illustrative purposes semiconductor product operation application examples. incorporation these circuits, software information design customer's equipment shall done under full responsibility customer. assumes responsibility losses incurred customers third parties arising from these circuits, software information. While endeavours enhance quality, reliability safety semiconductor products, customers agree acknowledge that possibility defects thereof cannot eliminated entirely. minimize risks damage property injury (including death) persons arising from defects semiconductor products, customers must incorporate sufficient safety measures their design, such redundancy, fire-containment, anti-failure features. semiconductor products classified into following three quality grades: "Standard", "Special" "Specific". "Specific" quality grade applies only semiconductor products developed based customer-designated "quality assurance program" specific application. recommended applications semiconductor product depend quality grade, indicated below. Customers must check quality grade each semiconductor product before using particular application. "Standard": Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade semiconductor products "Standard" unless otherwise expressly specified NEC's data sheets data books, etc. customers wish semiconductor products applications intended NEC, they must contact sales representative advance determine NEC's willingness support given application. (Note) "NEC" used this statement means Corporation also includes majority-owned subsidiaries. "NEC semiconductor products" means semiconductor product developed manufactured defined above).
00.4

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