SINGLE 2-INPUT GATE HIGH SPEED: (TYP.) POWER DISSIPATION: (MAX.)
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74V1T08
SINGLE 2-INPUT GATE
HIGH SPEED: (TYP.) POWER DISSIPATION: (MAX.) COMPATIBLE WITH OUTPUTS: (MIN), 0.8V (MAX) POWER DOWN PROTECTION INPUTS OUTPUT SYMMETRICAL OUTPUT IMPEDANCE: |IOH| (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: (OPR) 4.5V 5.5V IMPROVED LATCH-UP IMMUNITY
(SOT23-5L)
(SC-70)
ORDER CODE: 74V1T08S 74V1T08C internal circuit composed stages including buffer output, which provide high noise immunity stable output. Power down protection provided inputs accepted inputs with regard supply voltage. This device used interface
DESCRIPTION 74V1T08 advanced high-speed CMOS SINGLE 2-INPUT GATE fabricated with sub-micron silicon gate double-layer metal wiring C2MOS technology.
CONNECTION LOGIC SYMBOLS
October 1999
74V1T08
INPUT EQUIVALENT CIRCUIT DESCRIPTION
SYMBOL NAME FUNCT Data Input Data Input Data Output Ground (0V) Positive Supply Voltage
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS
Symbol Tstg Supply Voltage Input Voltage Output Voltage (see note Output Voltage (see note Input Diode Current Output Diode Current Output Current Storage Temperature Lead Temperature sec) Parameter Value -0.5 +7.0 -0.5 +7.0 -0.5 +7.0 -0.5 +150 Unit
IGND Ground Current
Absolute Maximum Ratings those values beyond which damage device occur. Functional operation under these condition implied. High State
RECOMMENDED OPERATING CONDITIONS
Symbol dt/dv Supply Voltage Input Voltage Output Voltage (see note Output Voltage (see note Operating Temperature Input Rise Fall Time (see note 0.5V) Parameter Valu Unit
ns/V
High State 3)VIN from0.8V
74V1T08
SPECIFICATIONS
Symb Parameter Cond ition High Level Input Voltage Level Input Voltage High Level Output Voltage Level Output Voltage Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current Output Leakage Current =-50 IO=-8 O=50 IO=8 5.5V Input 3.4V, other input VOUT 5.5V 3.94 0.36 ±0.1 1.35
Value Min. 0.44 ±1.0 Max. Max.
IOPD
ELECTRICAL CHARACTERISTICS (Input
Symb Parameter Test ndition Value Min. Max. Max.
tPLH tPHL
Propagation Delay Time
Voltage range 0.5V
CAPACITIVE CHARACTERISTICS
Symb Parameter Cond ition
Value Min. Max. Max.
Input Capacitance Power Dissipation Capacitance (note
isdefined value IC'sinternal equivalent capacitance which calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current obtained following equation. ICC(opr)
74V1T08
TEST CIRCUIT
15/50 equivalent (includes probe capacitance) ZOUT pulse generator (typically
WAVEFORM: PROPAGATION DELAYS (f=1MHz; duty cycle)
74V1T08
SOT23-5L MECHANICAL DATA
MIN. 0.90 0.00 0.90 0.35 0.09 2.80 2.60 1.50 0.35 0.95 TYP. MAX. 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.75 0.55 MIN. 35.4 35.4 13.7 110.2 102.3 59.0 13.7 37.4 74.8 mils TYP. MAX. 57.1 51.2 19.7 118.1 118.1 68.8 21.6
DIM.
74V1T08
SC-70 MECHANICAL DATA
MIN. 0.80 0.00 0.80 0.15 0.10 1.80 1.80 1.15 0.10 0.65 TYP. MAX. 1.10 0.10 1.00 0.30 0.18 2.20 2.40 1.35 0.30 MIN. 31.5 31.5 70.9 70.9 45.3 25.6 51.2 mils TYP. MAX. 43.3 39.4 11.8 86.6 94.5 53.1 11.8
DIM.
74V1T08
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