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Gain Control Amplifier Description CXA3201AN gain control amplifi


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CXA3201AN
Gain Control Amplifier
Description CXA3201AN gain control amplifier suitable CDMA cellular/PCS phone. Features Wide gain control range Linear gain slope Wideband operation (50MHz 300MHz) Very small package SSOP) voltage operation input ports Power save function included Absolute Maximum Ratings Supply voltage Operating temperature Topr +125 Storage temperature Tstg +150 Allowable Power dissipation Supply voltage range -0.3 Logic input voltage -0.3 Signal input voltage -0.3 Differential signal input voltage Operating Condition Supply voltage Applications CDMA cellular/PCS phone Structure Bipolar silicon monolithic SSOP (Plastic)
Sony reserves right change products specifications without prior notice. This information does convey license implication otherwise under patents other right. Application circuits shown, any, typical examples illustrating operation devices. Sony cannot assume responsibility problems arising these circuits.
E98909A8Y
CXA3201AN
Block Diagram
Input CDMA
CDMA CDMA SWITCH OUTX
Output
Input
Input Select
MODE
Gain control
GCTL
Supply Voltage
VCC1, Bias Driver
Ground
Power Save
Configuration
CDMA CDMA MODE
GCTL VCC1 VCC1 VCC2 OUTX
CXA3201AN
Description Symbol voltage Equivalent circuit Description
VCC1
CDMA
1.15
Differential input pins received CDMA signal.
CDMA
1.15
Ground.
VCC1
1.15
Differential input pins received signal.
1.15
VCC1
MODE
Input select pin. CDMA High Low.
VCC1
135k
Power save function pin. High: Active Low: Power save
CXA3201AN
Symbol
voltage
Equivalent circuit
Description
VCC2 12.3k
12.3k
Differential output pins received CDMA signal. Open collector output. OUTX
VCC2 VCC1
Positive power supply output stage. Positive power supply.
VCC1
GCTL
Gain control pin.
CXA3201AN
Electrical Characteristics Characteristics Parameter Current consumption Current consumption Input current Input current Input current Input current Input current Input current MODE high voltage MODE voltage high voltage voltage Symbol ICC1 ICC2 ImodeH ImodeL IpsvH IpsvL IgctlH IgctlL VpsH VpsL Conditions Vpsv 3.0V, Vgctl 1.5V, Vpsv Vgctl 1.5V, Vmode 3.0V Vmode 0.5V Vpsv 3.0V Vpsv Vgctl 3.0V Vgctl 0.5V (VCC 3.0V, 27°C) Min. Typ. Max. Unit 10.2
Characteristics Parameter Operating frequency range Gain CDMA2.4 Gain CDMA1.5 Gain CDMA0.6 CDMA Gain slope Gain FM2.4 Gain FM1.5 Gain FM0.6 Gain slope Input level order intercept point Noise Figure Symbol GCDMA2.4 GCDMA1.5 GCDMA0.6 GCLIN GFM2.4 GFM1.5 GFM0.6 GFMLIN Vmode "H", 210.38MHz, Vgctl 2.4V Vmode "H", Vgctl 1.5V Vmode "H", Vgctl 0.6V Vmode "H", Gain CDMA Vgctl 2.0V Gain CDMA Vgctl 1.0V Vmode "L", 85.38MHz, Vgctl 2.4V Vmode "L", Vgctl 1.5V Vmode "L", Vgctl 0.6V Vmode "L", Gain Vgctl 2.0V Gain Vgctl 1.0V Vmode "H", GCDMA 40dB1 209.38MHz, 211.38MHz Measure 210.38MHz Vmode "H", GCDMA 40dB1 Measure 210.38MHz Conditions
(VCC 3.0V, 27°C) Min. Typ. Max. Unit dB/V dB/V
IIP3
Adjust GCTL voltage, overall gain 40dB.
CXA3201AN
Measurement Circuit
1000p CDMA INPUT 1000p2 180n
CDMA GCTL
CDMA
VCC1
0.01µ
1000p INPUT 1000p 1.5µ MODE OUTX OUTPUT VCC1
VCC2
0.01µ
TOKO, Inc. B5FL 616DS-1135 Coilcraft, Inc. 0805HS-181TKBC Coilcraft, Inc. 1008CS-152XKBC
CXA3201AN
Application Circuit
Gain Control Voltage
1000p CDMA CDMA INPUT CDMA 1000p 1000p INPUT 1000p CDMA Active Sleep MODE OUTX VCC2 VCC1 VCC1 GCTL
0.01µ 100p
0.01µ
1000p OUTPUT 1000p
Must adjusting values result best impedance matching between filter this
Application circuits shown typical examples illustrating operation devices. Sony cannot assume responsibility problems arising these circuits infringement third party patent other right same.
CXA3201AN
Design Reference Values Single ended measurement Item Input resistance Input capacitance Output resistance Output capacitance Symbol Rout Cout 210.38MHz, Vgctl 1.5V Conditions (VCC 3.0V, 27°C) Typ. 0.85 Unit
Notes Operation This wideband amplifier with wide gain control range. decouping capacitors between should close possible. resistors connected Pins should close possible. This assumes excellent characteristics when differential input impedance between Pins Pins 500. Refer Measurement Circuit external element settings, etc. attention handling this because electrostatic discharge strength weak.
CXA3201AN
Sensitivity
3.0V
IIP3
3.0V
Power gain [dB]
Vgctl
IIP3 [dBm]
-40°C 27°C 85°C -40°C 27°C 85°C
Power gain [dB]
Noise Figure
3.0V
Gain Error from Room Temp
3.0V
Noise figure [dB]
Gain error [dB]
-40°C 85°C
-40°C 27°C 85°C
Power gain [dB]
Power gain [dB]
CXA3201AN
Package Outline
Unit:
16PIN SSOP (PLASTIC)
1.25
0.65 0.05 0.15 0.02
0.22 0.05
0.13
DETAIL NOTE: Dimension does include mold protrusion.
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-16P-L01 SSOP016-P-0044 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PALLADIUM PLATING 42/COPPER ALLOY 0.1g
NOTE PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).

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