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CD40181BMS

CMOS 4 Bit Arithmetic Logic Unit

CD40181BMS
December 1992
CMOS 4 Bit Arithmetic Logic Unit
Description
CD40181BMS ACTIVE-LOW DATA TOP VIEW
Features
Applications
· Parallel Arithmetic Units · Process Controllers · Low Power Minicomputers
Pinout
The CD40181BMS is supplied in these 24-lead outline packages: Braze Seal DIP Ceramic Flatpack HNZ H4P
F1 10 F2 11 VSS 12
File Number
CD40181BMS Functional Diagrams
FUNCTION SELECT INPUTS S0 S1 S2 S3 6 A0 WORD A A1 A2 A3 B0 WORD B B1 B2 B3 Cn CARRY IN MODE M CONTROL 2 23 21 19 1 22 20 18 7 8 5 4 3 9 10 11 13 F0 F1 F2 F3 OUTPUT FUNCTION
ACTIVE-LOW DATA
FUNCTION SELECT INPUTS S0 S1 S2 S3 6 A0 WORD A A1 A2 A3 B0 WORD B B1 B2 B3 Cn CARRY IN MODE M CONTROL 2 23 21 19 1 22 20 18 7 8 5 4 3 9 10 11 13 F0 F1 F2 F3 OUTPUT FUNCTION
ACTIVE-HIGH DATA
Specifications CD40181BMS
Absolute Maximum Ratings
Reliability Information
PARAMETER Supply Current
SYMBOL IDD
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.
Specifications CD40181BMS
SYMBOL TPHL1 TPLH1 TPHL2 TPLH2 TPHL3 TPLH3 TPHL4 TPLH4 TTHL TTLH
MAX 800 1080 1000 1350 640 864 400 540 200 270
UNITS ns ns ns ns ns ns ns ns ns ns
+25oC +125 C, -55 C +25oC +125oC, -55oC
+25oC +125oC, -55oC
MIN 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 -
MAX 5 150 10 300 10 600 50 50 -0.36 -0.64 -1.15 -2.0 -0.9 -1.6 -2.4 -4.2
UNITS µA µA µA µA µA µA mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA mA mA
Specifications CD40181BMS
MAX 3 320 240 400 280 270 200 200 140 100 80 7.5
UNITS V V ns ns ns ns ns ns ns ns ns ns pF
3. See Table 2 for +25oC limit. 4. Read and Record
Specifications CD40181BMS
TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4
CONFORMANCE GROUPS Group E Subgroup 2
CD40181BMS Logic Diagram
ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK
FIGURE 1. ACTIVE LOW DATA
CD40181BMS
TRUTH TABLE
Typical Performance Characteristics
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
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CD40181BMS Typical Performance Characteristics
(Continued)
0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
PROPAGATION DELAY TIME (tPHL, tPLH) (ns)
100 10V 50 15V
10V 15V
60 80 40 LOAD CAPACITANCE (CL) (pF)
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
FIGURE 6. TYPICAL PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE (FOR A OR B TO F, LOGIC MODE
106 POWER DISSIPATION PER (PD) (µW)
FIGURE 7. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE
5V 10V
102 103 104 INPUT FREQUENCY (fIN) (kHz)
FIGURE 8. TYPICAL DYNAMIC DISSIPATION AS A FUNCTION OF INPUT FREQUENCY
CD40181BMS
Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch).
0.004 inches X 0.004 inches MIN 0.0198 inches - 0.0218 inches
DIE THICKNESS: