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8-bit Microcontroller with Bytes In-System Programmable Flash ATmega85
Top Searches for this datasheet8-bit Microcontroller with Bytes In-System Programmable Flash ATmega8535 ATmega8535L Summary 2502KS-AVR-10/06 Note: This summary document. complete document available site www.atmel.com. Configurations Figure Pinout ATmega8535 (XCK/T0) (T1) (INT2/AIN0) (OC0/AIN1) (SS) (MOSI) (MISO) (SCK) RESET XTAL2 XTAL1 (RXD) (TXD) (INT0) (INT1) (OC1B) (OC1A) (ICP1) (ADC0) (ADC1) (ADC2) (ADC3) (ADC4) (ADC5) (ADC6) (ADC7) AREF AVCC (TOSC2) (TOSC1) (SDA) (SCL) (OC2) PLCC (SS) (AIN1/OC0) (AIN0/INT2) (T1) (XCK/T0) (ADC0) (ADC1) (ADC2) (ADC3) (SS) (AIN1/OC0) (AIN0/INT2) (T1) (XCK/T0) (ADC0) (ADC1) (ADC2) (ADC3) (ADC4) (ADC5) (ADC6) (ADC7) AREF AVCC (TOSC2) (TOSC1) (MOSI) (MISO) (SCK) RESET XTAL2 XTAL1 (RXD) (TXD) (INT0) (SCL) (SDA) (INT1) (OC1B) (OC1A) (ICP1) (OC2) NOTE: Bottom should soldered ground. Disclaimer Typical values contained this data sheet based simulations characterization other microcontrollers manufactured same process technology. values will available after device characterized. ATmega8535(L) 2502KS-AVR-10/06 (INT1) (OC1B) (OC1A) (ICP1) (OC2) (SCL) (SDA) (MOSI) (MISO) (SCK) RESET XTAL2 XTAL1 (RXD) (TXD) (INT0) (ADC4) (ADC5) (ADC6) (ADC7) AREF AVCC (TOSC2) (TOSC1) ATmega8535(L) Overview ATmega8535 low-power CMOS 8-bit microcontroller based enhanced RISC architecture. executing instructions single clock cycle, ATmega8535 achieves throughputs approaching MIPS allowing system designer optimize power consumption versus processing speed. Figure Block Diagram Block Diagram PORTA DRIVERS/BUFFERS PORTC DRIVERS/BUFFERS PORTA DIGITAL INTERFACE PORTC DIGITAL INTERFACE AVCC AREF PROGRAM COUNTER INTERFACE STACK POINTER TIMERS/ COUNTERS OSCILLATOR PROGRAM FLASH SRAM INTERNAL OSCILLATOR XTAL1 INSTRUCTION REGISTER GENERAL PURPOSE REGISTERS WATCHDOG TIMER OSCILLATOR XTAL2 CTRL. TIMING RESET INSTRUCTION DECODER CONTROL LINES INTERRUPT UNIT INTERNAL CALIBRATED OSCILLATOR STATUS REGISTER EEPROM PROGRAMMING LOGIC USART COMP. INTERFACE PORTB DIGITAL INTERFACE PORTD DIGITAL INTERFACE PORTB DRIVERS/BUFFERS PORTD DRIVERS/BUFFERS 2502KS-AVR-10/06 core combines rich instruction with general purpose working registers. registers directly connected Arithmetic Logic Unit (ALU), allowing independent registers accessed single instruction executed clock cycle. resulting architecture more code efficient while achieving throughputs times faster than conventional CISC microcontrollers. ATmega8535 provides following features: bytes In-System Programmable Flash with Read-While-Write capabilities, bytes EEPROM, bytes SRAM, general purpose lines, general purpose working registers, three flexible Timer/Counters with compare modes, internal external interrupts, serial programmable USART, byte oriented Two-wire Serial Interface, 8-channel, 10-bit with optional differential input stage with programmable gain TQFP package, programmable Watchdog Timer with Internal Oscillator, serial port, software selectable power saving modes. Idle mode stops while allowing SRAM, Timer/Counters, port, interrupt system continue functioning. Power-down mode saves register contents freezes Oscillator, disabling other chip functions until next interrupt Hardware Reset. Power-save mode, asynchronous timer continues run, allowing user maintain timer base while rest device sleeping. Noise Reduction mode stops modules except asynchronous timer ADC, minimize switching noise during conversions. Standby mode, crystal/resonator Oscillator running while rest device sleeping. This allows very fast start-up combined with low-power consumption. Extended Standby mode, both main Oscillator asynchronous timer continue run. device manufactured using Atmel's high density nonvolatile memory technology. On-chip Flash allows program memory reprogrammed In-System through serial interface, conventional nonvolatile memory programmer, On-chip Boot program running core. boot program interface download application program Application Flash memory. Software Boot Flash section will continue while Application Flash section updated, providing true Read-While-Write operation. combining 8-bit RISC with In-System Self-Programmable Flash monolithic chip, Atmel ATmega8535 powerful microcontroller that provides highly flexible cost effective solution many embedded control applications. ATmega8535 supported with full suite program system development tools including: compilers, macro assemblers, program debugger/simulators, InCircuit Emulators, evaluation kits. AT90S8535 Compatibility ATmega8535 provides features AT90S8535. addition, several features added. ATmega8535 backward compatible with AT90S8535 most cases. However, some incompatibilities between microcontrollers exist. solve this problem, AT90S8535 compatibility mode selected programming S8535C fuse. ATmega8535 compatible with AT90S8535, replace AT90S8535 current Printed Circuit Boards. However, location fuse bits electrical characteristics differs between devices. AT90S8535 Compatibility Mode Programming S8535C fuse will change following functionality: timed sequence changing Watchdog Time-out period disabled. "Timed Sequences Changing Configuration Watchdog Timer" page details. double buffering USART Receive Register disabled. "AVR USART UART Compatibility" page details. ATmega8535(L) 2502KS-AVR-10/06 ATmega8535(L) Descriptions Port (PA7.PA0) Digital supply voltage. Ground. Port serves analog inputs Converter. Port also serves 8-bit bi-directional port, Converter used. Port pins provide internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. When pins used inputs externally pulled low, they will source current internal pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Port (PB7.PB0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Port also serves functions various special features ATmega8535 listed page Port (PC7.PC0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Port also serves functions various special features ATmega8535 listed page RESET Reset input. level this longer than minimum pulse length will generate reset, even clock running. minimum pulse length given Table page Shorter pulses guaranteed generate reset. Input inverting Oscillator amplifier input internal clock operating circuit. Output from inverting Oscillator amplifier. AVCC supply voltage Port Converter. should externally connected VCC, even used. used, should connected through low-pass filter. AREF analog reference Converter. Port (PD7.PD0) XTAL1 XTAL2 AVCC AREF 2502KS-AVR-10/06 Resources comprehensive development tools, application notes datasheets available download http://www.atmel.com/avr. ATmega8535(L) 2502KS-AVR-10/06 ATmega8535(L) About Code Examples This documentation contains simple code examples that briefly show various parts device. These code examples assume that part specific header file included before compilation. aware that compiler vendors include definitions header files interrupt handling compiler dependent. Please confirm with Compiler documentation more details. 2502KS-AVR-10/06 Register Summary Address 0x3F (0x5F) 0x3E (0x5E) 0x3D (0x5D) 0x3C (0x5C) 0x3B (0x5B) 0x3A (0x5A) 0x39 (0x59) 0x38 (0x58) 0x37 (0x57) 0x36 (0x56) 0x35 (0x55) 0x34 (0x54) 0x33 (0x53) 0x32 (0x52) 0x31 (0x51) 0x30 (0x50) 0x2F (0x4F) 0x2E (0x4E) 0x2D (0x4D) 0x2C (0x4C) 0x2B (0x4B) 0x2A (0x4A) 0x29 (0x49) 0x28 (0x48) 0x27 (0x47) 0x26 (0x46) 0x25 (0x45) 0x24 (0x44) 0x23 (0x43) 0x22 (0x42) 0x21 (0x41) 0x20(1) (0x40)(1) 0x1F (0x3F) 0x1E (0x3E) 0x1D (0x3D) 0x1C (0x3C) 0x1B (0x3B) 0x1A (0x3A) 0x19 (0x39) 0x18 (0x38) 0x17 (0x37) 0x16 (0x36) 0x15 (0x35) 0x14 (0x34) 0x13 (0x33) 0x12 (0x32) 0x11 (0x31) 0x10 (0x30) 0x0F (0x2F) 0x0E (0x2E) 0x0D (0x2D) 0x0C (0x2C) 0x0B (0x2B) 0x0A (0x2A) 0x09 (0x29) 0x08 (0x28) 0x07 (0x27) 0x06 (0x26) 0x05 (0x25) 0x04 (0x24) 0x03 (0x23) 0x02 (0x22) 0x01 (0x21) Name SREG OCR0 GICR GIFR TIMSK TIFR SPMCR TWCR MCUCR MCUCSR TCCR0 TCNT0 OSCCAL SFIOR TCCR1A TCCR1B TCNT1H TCNT1L OCR1AH OCR1AL OCR1BH OCR1BL ICR1H ICR1L TCCR2 TCNT2 OCR2 ASSR WDTCR UBRRH UCSRC EEARH EEARL EEDR EECR PORTA DDRA PINA PORTB DDRB PINB PORTC DDRC PINC PORTD DDRD PIND SPDR SPSR SPCR UCSRA UCSRB UBRRL ACSR ADMUX ADCSRA ADCH ADCL TWDR TWAR TWSR INT1 INTF1 OCIE2 OCF2 SPMIE TWINT FOC0 INT0 INTF0 TOIE2 TOV2 RWWSB TWEA ISC2 WGM00 INT2 INTF2 TICIE1 ICF1 TWSTA COM01 IVSEL OCIE0 OCF0 PGERS ISC01 EXTRF CS01 IVCE TOIE0 TOV0 SPMEN TWIE ISC00 PORF CS00 Page 115, 116, Timer/Counter0 Output Compare Register OCIE1A OCF1A RWWSRE TWSTO COM00 OCIE1B OCF1B BLBSET TWWC ISC11 WDRF WGM01 TOIE1 TOV1 PGWRT TWEN ISC10 BORF CS02 Timer/Counter0 Bits) Oscillator Calibration Register ADTS2 COM1A1 ICNC1 ADTS1 COM1A0 ICES1 ADTS0 COM1B1 COM1B0 WGM13 ACME FOC1A WGM12 FOC1B CS12 PSR2 WGM11 CS11 PSR10 WGM10 CS10 59,88,135,203,223 Timer/Counter1 Counter Register High Byte Timer/Counter1 Counter Register Byte Timer/Counter1 Output Compare Register High Byte Timer/Counter1 Output Compare Register Byte Timer/Counter1 Output Compare Register High Byte Timer/Counter1 Output Compare Register Byte Timer/Counter1 Input Capture Register High Byte Timer/Counter1 Input Capture Register Byte FOC2 WGM20 COM21 COM20 WGM21 CS22 CS21 CS20 Timer/Counter2 Bits) Timer/Counter2 Output Compare Register URSEL URSEL UMSEL UPM1 WDCE UPM0 USBS TCN2UB WDP2 UCSZ1 OCR2UB WDP1 UBRR[11:8] UCSZ0 UCPOL EEAR8 TCR2UB WDP0 EEPROM Address Register Byte EEPROM Data Register PORTA7 DDA7 PINA7 PORTB7 DDB7 PINB7 PORTC7 DDC7 PINC7 PORTD7 DDD7 PIND7 SPIF SPIE RXCIE REFS1 ADEN PORTA6 DDA6 PINA6 PORTB6 DDB6 PINB6 PORTC6 DDC6 PINC6 PORTD6 DDD6 PIND6 WCOL TXCIE ACBG REFS0 ADSC PORTA5 DDA5 PINA5 PORTB5 DDB5 PINB5 PORTC5 DDC5 PINC5 PORTD5 DDD5 PIND5 DORD UDRE UDRIE ADLAR ADATE PORTA4 DDA4 PINA4 PORTB4 DDB4 PINB4 PORTC4 DDC4 PINC4 PORTD4 DDD4 PIND4 MSTR RXEN MUX4 ADIF EERIE PORTA3 DDA3 PINA3 PORTB3 DDB3 PINB3 PORTC3 DDC3 PINC3 PORTD3 DDD3 PIND3 CPOL TXEN ACIE MUX3 ADIE EEMWE PORTA2 DDA2 PINA2 PORTB2 DDB2 PINB2 PORTC2 DDC2 PINC2 PORTD2 DDD2 PIND2 CPHA UCSZ2 ACIC MUX2 ADPS2 EEWE PORTA1 DDA1 PINA1 PORTB1 DDB1 PINB1 PORTC1 DDC1 PINC1 PORTD1 DDD1 PIND1 SPR1 RXB8 ACIS1 MUX1 ADPS1 EERE PORTA0 DDA0 PINA0 PORTB0 DDB0 PINB0 PORTC0 DDC0 PINC0 PORTD0 DDD0 PIND0 SPI2X SPR0 MPCM TXB8 ACIS0 MUX0 ADPS0 Data Register USART Data Register USART Baud Rate Register Byte Data Register High Byte Data Register Byte Two-wire Serial Interface Data Register TWA6 TWS7 TWA5 TWS6 TWA4 TWS5 TWA3 TWS4 TWA2 TWS3 TWA1 TWA0 TWPS1 TWGCE TWPS0 ATmega8535(L) 2502KS-AVR-10/06 ATmega8535(L) Register Summary (Continued) Address 0x00 (0x20) Name TWBR Page Two-wire Serial Interface Rate Register Notes: Refer USART description details access UBRRH UCSRC. compatibility with future devices, reserved bits should written zero accessed. Reserved memory addresses should never written. Some status flags cleared writing logical them. Note that instructions will operate bits Register, writing back into flag read set, thus clearing flag. instructions work with registers 0x00 0x1F only. 2502KS-AVR-10/06 Instruction Summary Mnemonics ADIW SUBI SBCI SBIW ANDI MULS MULSU FMUL FMULS FMULSU RJMP IJMP RCALL ICALL RETI CPSE SBRC SBRS SBIC SBIS BRBS BRBC BREQ BRNE BRCS BRCC BRSH BRLO BRMI BRPL BRGE BRLT BRHS BRHC BRTS BRTC BRVS BRVC BRIE BRID Rd,Rr Rd,Rr Rd,Rr Rd,K Operands Rdl,K Rdl,K Rd,K Rd,K Description Registers with Carry Registers Immediate Word Subtract Registers Subtract Constant from Register Subtract with Carry Registers Subtract with Carry Constant from Reg. Subtract Immediate from Word Logical Registers Logical Register Constant Logical Registers Logical Register Constant Exclusive Registers One's Complement Two's Complement Bit(s) Register Clear Bit(s) Register Increment Decrement Test Zero Minus Clear Register Register Multiply Unsigned Multiply Signed Multiply Signed with Unsigned Fractional Multiply Unsigned Fractional Multiply Signed Fractional Multiply Signed with Unsigned Relative Jump Indirect Jump Relative Subroutine Call Indirect Call Subroutine Return Interrupt Return Compare, Skip Equal Compare Compare with Carry Compare Register with Immediate Skip Register Cleared Skip Register Skip Register Cleared Skip Register Branch Status Flag Branch Status Flag Cleared Branch Equal Branch Equal Branch Carry Branch Carry Cleared Branch Same Higher Branch Lower Branch Minus Branch Plus Branch Greater Equal, Signed Branch Less Than Zero, Signed Branch Half Carry Flag Branch Half Carry Flag Cleared Branch Flag Branch Flag Cleared Branch Overflow Flag Branch Overflow Flag Cleared Branch Interrupt Enabled Branch Interrupt Disabled Operation Rdh:Rdl Rdh:Rdl Rdh:Rdl Rdh:Rdl 0xFF 0x00 (0xFF 0xFF R1:R0 R1:R0 R1:R0 Flags Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V Z,C,N,V Z,C,N,V,H Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V None None None None None None None N,V,C,H N,V,C,H N,V,C,H None None None None None None None None None None None None None None None None None None None None None None None None #Clocks 1/2/3 1/2/3 1/2/3 1/2/3 1/2/3 ARITHMETIC LOGIC INSTRUCTIONS R1:R0 R1:R0 STACK STACK (Rr(b)=0) (Rr(b)=1) (P(b)=0) (P(b)=1) (SREG(s) then PCPC+k (SREG(s) then PCPC+k then then then then then then then then then then then then then then then then then then R1:R0 BRANCH INSTRUCTIONS DATA TRANSFER INSTRUCTIONS ATmega8535(L) 2502KS-AVR-10/06 ATmega8535(L) Mnemonics MOVW PUSH SWAP BSET BCLR CONTROL INSTRUCTIONS Operation None Operands Rd,Y+q Y+q,Rr Z+q,Rr Description Move Between Registers Copy Register Word Load Immediate Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect with Displacement Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect with Displacement Load Direct from SRAM Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect with Displacement Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect with Displacement Store Direct SRAM Load Program Memory Load Program Memory Load Program Memory Post-Inc Store Program Memory Port Port Push Register Stack Register from Stack Register Clear Register Logical Shift Left Logical Shift Right Rotate Left Through Carry Rotate Right Through Carry Arithmetic Shift Right Swap Nibbles Flag Flag Clear Store from Register load from Register Carry Clear Carry Negative Flag Clear Negative Flag Zero Flag Clear Zero Flag Global Interrupt Enable Global Interrupt Disable Signed Test Flag Clear Signed Test Flag Twos Complement Overflow. Clear Twos Complement Overflow SREG Clear SREG Half Carry Flag SREG Clear Half Carry Flag SREG Operation Rd+1:Rd Rr+1:Rr (X), (Y), (Z), (Z), R1:R0 STACK STACK I/O(P,b) I/O(P,b) Rd(n+1) Rd(n), Rd(0) Rd(n) Rd(n+1), Rd(7) Rd(0)C,Rd(n+1) Rd(n),CRd(7) Rd(7)C,Rd(n) Rd(n+1),CRd(0) Rd(n) Rd(n+1), n=0.6 Rd(3.0)Rd(7.4),Rd(7.4)Rd(3.0) SREG(s) SREG(s) Rr(b) Rd(b) Flags None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V None SREG(s) SREG(s) None #Clocks BIT-TEST INSTRUCTIONS 2502KS-AVR-10/06 Mnemonics SLEEP BREAK Operands Description Sleep Watchdog Reset Break Operation (see specific descr. Sleep function) (see specific descr. WDR/Timer) On-chip Debug Only Flags None None None #Clocks ATmega8535(L) 2502KS-AVR-10/06 ATmega8535(L) Ordering Information Speed (MHz) Power Supply Ordering Code ATmega8535L-8AC ATmega8535L-8PC ATmega8535L-8JC ATmega8535L-8MC ATmega8535L-8AI ATmega8535L-8PI ATmega8535L-8JI ATmega8535L-8MI ATmega8535L-8AU(2) ATmega8535L-8PU(2) ATmega8535L-8JU(2) ATmega8535L-8MU(2) ATmega8535-16AC ATmega8535-16PC ATmega8535-16JC ATmega8535-16MC ATmega8535-16AI ATmega8535-16PI ATmega8535-16JI ATmega8535-16MI ATmega8535-16AU(2) ATmega8535-16PU(2) ATmega8535-16JU(2) ATmega8535-16MU(2) Package(1) 40P6 44M1 40P6 44M1 40P6 44M1 40P6 44M1 40P6 44M1 40P6 44M1 Operation Range Commercial (0°C 70°C) 5.5V Industrial (-40°C 85°C) Commercial (0°C 70°C) 5.5V Industrial (-40°C 85°C) Note: This device also supplied wafer form. Please contact your local Atmel sales office detailed ordering information minimum quantities. Pb-free packaging alternative, complies European Directive Restriction Hazardous Substances (RoHS directive).Also Halide free fully Green. Package Type 40P6 44M1-A 44-lead, Thin (1.0 Plastic Gull Wing Quad Flat Package (TQFP) 40-pin, 0.600" Wide, Plastic Dual Inline Package (PDIP) 44-lead, Plastic J-leaded Chip Carrier (PLCC) 44-pad, body, lead pitch 0.50 Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 2502KS-AVR-10/06 Packaging Information IDENTIFIER 0°~7° COMMON DIMENSIONS (Unit Measure SYMBOL 0.05 0.95 11.75 9.90 11.75 9.90 0.30 0.09 0.45 1.00 12.00 10.00 12.00 10.00 0.80 1.20 0.15 1.05 12.25 10.10 12.25 10.10 0.45 0.20 0.75 Note Note NOTE Notes: This package conforms JEDEC reference MS-026, Variation ACB. Dimensions include mold protrusion. Allowable protrusion 0.25 side. Dimensions maximum plastic body size dimensions including mold mismatch. Lead coplanarity 0.10 maximum. 10/5/2001 2325 Orchard Parkway Jose, 95131 TITLE 44A, 44-lead, Body Size, Body Thickness, Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) DRAWING REV. ATmega8535(L) 2502KS-AVR-10/06 ATmega8535(L) 40P6 SEATING PLANE SYMBOL COMMON DIMENSIONS (Unit Measure 0.381 52.070 15.240 13.462 0.356 1.041 3.048 0.203 15.494 2.540 4.826 52.578 15.875 13.970 0.559 1.651 3.556 0.381 17.526 Note Note NOTE Notes: This package conforms JEDEC reference MS-011, Variation Dimensions include mold Flash Protrusion. Mold Flash Protrusion shall exceed 0.25 (0.010"). 09/28/01 2325 Orchard Parkway Jose, 95131 TITLE 40P6, 40-lead (0.600"/15.24 Wide) Plastic Dual Inline Package (PDIP) DRAWING 40P6 REV. 2502KS-AVR-10/06 1.14(0.045) IDENTIFIER 1.14(0.045) 0.318(0.0125) 0.191(0.0075) D2/E2 0.51(0.020)MAX (3X) COMMON DIMENSIONS (Unit Measure SYMBOL Notes: This package conforms JEDEC reference MS-018, Variation Dimensions include mold protrusion. Allowable protrusion .010"(0.254 side. Dimension include mold mismatch measured extreme material condition upper lower parting line. Lead coplanarity 0.004" (0.102 maximum. D2/E2 4.191 2.286 0.508 17.399 16.510 17.399 16.510 14.986 0.660 0.330 1.270 4.572 3.048 17.653 16.662 17.653 16.662 16.002 0.813 0.533 Note Note NOTE 10/04/01 2325 Orchard Parkway Jose, 95131 TITLE 44J, 44-lead, Plastic J-leaded Chip Carrier (PLCC) DRAWING REV. ATmega8535(L) 2502KS-AVR-10/06 ATmega8535(L) 44M1-A Marked Pin# SEATING PLANE VIEW Corner SIDE VIEW Option Triangle COMMON DIMENSIONS (Unit Measure SYMBOL Option Chamfer 0.30) 0.80 0.90 0.02 0.25 1.00 0.05 NOTE 0.18 6.90 5.00 6.90 5.00 0.23 7.00 5.20 7.00 5.20 0.50 0.30 7.10 5.40 7.10 5.40 Option Notch (0.20 BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. (SAW Singulation) VKKD-3. 0.59 0.20 0.64 0.26 0.69 0.41 5/27/06 2325 Orchard Parkway Jose, 95131 TITLE 44M1, 44-pad, Body, Lead Pitch 0.50 5.20 Exposed Pad, Micro Lead Frame Package (MLF) DRAWING 44M1 REV. 2502KS-AVR-10/06 Errata ATmega8535 Rev. revision letter refer device revision. First Analog Comparator conversion delayed Asynchronous Oscillator does stop Power-down First Analog Comparator conversion delayed device powered slow rising VCC, first Analog Comparator conversion will take longer than expected some devices. Problem Fix/Workaround When device been powered reset, disable then enable Analog Comparator before first conversion. Asynchronous Oscillator does stop Power-down asynchronous oscillator does stop when entering Power-down mode. This leads higher power consumption than expected. Problem Fix/Workaround Manually disable asynchronous timer before entering Power-down. ATmega8535(L) 2502KS-AVR-10/06 ATmega8535(L) Datasheet Revision History Changes from Rev. 2502J- 08/06 Rev. 2502K- 10/06 Please note that referring page numbers this section referring this document. referring revision this section referring document revision. Updated TOP/BOTTOM description Timer/Counters Fast mode. Updated "Errata" page Changes from Rev. 2502I- 06/06 Rev. 2502J- 08/06 Changes from Rev. 2502H- 04/06 Rev. 2502I- 06/06 Changes from Rev. 2502G- 04/05 Rev. 2502H- 04/06 Updated "Ordering Information" page Updated code example "USART Initialization" page 150. Added "Resources" page Updated Table page Table page Table page 258. Updated "Serial Peripheral Interface SPI" page 136. Updated note "Bit Rate Generator Unit" page 180. Changes from Rev. 2502F- 06/04 Rev. 2502G- 04/05 Removed "Preliminary" TBD's. Updated Table page Table page 261. Updated "Electrical Characteristics" page 255. Updated "Ordering Information" page Changes from Rev. 2502E-12/03 Rev. 2502G-06/04 Changes from Rev. 2502E-12/03 Rev. 2502F-06/04 MLF-package alternative changed "Quad Flat No-Lead/Micro Lead Frame Package QFN/MLF". Updated "Reset Characteristics" page Updated "Stack Pointer" page Updated code "USART Initialization" page 150. Updated "Errata" page Changes from Rev. 2502D-09/03 Rev. 2502E-12/03 Updated "Calibrated Internal Oscillator" page Added section "Errata" page 2502KS-AVR-10/06 Changes from Rev. 2502C-04/03 Rev. 2502D-09/03 Removed "Advance Information" some TBD's from datasheet. Added note "Pinout ATmega8535" page Updated "Reset Characteristics" page Updated "Absolute Maximum Ratings" Characteristics" "Electrical Characteristics" page 255. Updated Table page 258. Updated "ADC Characteristics" page 263. Updated "ATmega8535 Typical Characteristics" page 266. Removed CALL instructions from code examples "Instruction Summary" page Changes from Rev. 2502B-09/02 Rev. 2502C-04/03 Updated "Packaging Information" page Updated Figure page Figure page 179, Figure page 185, Figure page 191, Figure page 207. Added section "EEPROM Write During Power-down Sleep Mode" page Removed references application notes "Multi-purpose Oscillator" Crystal Oscillator", which exist. Updated code examples page Removed ADHSM bit. Renamed Port ICP1. "Alternate Functions Port page Added information about symmetry Timer page Timer page 126. Updated Table page 169, Table page 190, Table page 193, Table page 196, Table page 253, Table page 261. Updated description "Bit TWSTA: START Condition Bit" page 182. Updated description "Filling Temporary Buffer (Page Loading)" "Performing Page Write" page 231. Removed section description "SPI Serial Programming Characteristics" page 254. Updated "Electrical Characteristics" page 255. ATmega8535(L) 2502KS-AVR-10/06 ATmega8535(L) Updated "ADC Characteristics" page 263. Updated "Register Summary" page Various Timer corrections. Added WD_FUSE period Table page 253. Changes from Rev. 2502A-06/02 Rev. 2502B-09/02 Canged Endurance Flash 10,000 Write/Erase Cycles. 2502KS-AVR-10/06 Atmel Corporation 2325 Orchard Parkway Jose, 95131, Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway Jose, 95131, Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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