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DUAL SUPPLY LATCHUP PROTECTOR LPT001RP ASIC TIMER
Top Searches for this datasheetPACE PRODUCTS DUAL SUPPLY LATCHUP PROTECTOR LPT001RP ASIC TIMER POWER CROWBAR POWER SUPPLY CURRENT SENSE CONTROL LOGIC CROWBAR PROTECTED DEVICE Memory FEATURES Triple positive supply protection Integrated PMOS-FET pass transistors Integrated NMOS-FET crowbar transistors loads line series protection (High-Z) Additional protection drive additional HC4016 compatible switches Optional crowbar defeat operation dissipation sensor drop trip point Flexible interface simple timing applications trigger status output Built-in-test (logic functions) DESCRIPTION: Space Electronics LPT001RP Rad-Pak®) radiation hard, upset latchup immune application specific integrated circuit (ASIC) that performs number functions required protect recover integrated circuits that known exhibit single event induced latchup. exhibits following features: 1.Provides current limiting protected device. 2.Detects increase current during even above preset threshold. 3.Forces shutdown protected device when threshold exceeded. 4.Holds device shut down mode preset time interval. 5.Returns device supply voltage original operating level. active functions integrated onto ASIC protect three (analog digital) supply devices. small number external discrete passive components required establish custom trip point threshold offtime adjustment. 0510.00Rev0 data sheets subject change without notice (858) 452-4167 Fax: (858) 452-5499 www.spaceelectronics.com ©2000 Space Electronics Inc. rights reserved. LPT001RP PARAMETER Supply Voltage Protected load capacitance (supplies only) PMOSFET1 PMOSFET2,3 Operating temperature Storage temperature Power Dissipation TOPR TSTG SYMBOL DUAL SUPPLY LATCHUP PROTECTOR ABLE BSOLUTE MAXIMUM RATINGS -MAX 1000 TABLE LECTRICAL PECIFICATIONS EXCEPT WHERE NOTED. PARAMETER Supply current Supply PMOSFET Resistance" 0.2V, High current current IN2,3 current Current IN2,3 Comparator Sensor offset voltage Matching offset Trigger delay overdrive series switches, state Series resistance matching Switch leakage current Capacitance ground Series Switches, state Switch leakage current Leakage capacitance tested. SYMBOL RSUPPLY RSUPPLY IMAX PMOS1 IMAXPMOS2,3 VOFFSET VOFFSETMATCH 1.33 ohms ohms nsec ohms ohms RSWMATCH CPAR CLEAK 0510.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. LPT001RP TABLE ESCRIPTION NAME PWR0 GND0 VREF REF1 SNS1 OUT1 GND1 REF2 SNS2 OUT2 GND2 REF3 SNS3 OUT3 GND3 RSET IOCRBR IOP1 0510.00Rev0 DUAL SUPPLY LATCHUP PROTECTOR NUMBER a,b,c,d,e a,b,c,d,e TYPE Power Power Input Input Input Input Output Power Input Input Input Output Power Input Input Input Output Power Input Input Input Input Output Output Input Input Output Input ESCRIPTION Input power internal circuitry: most positive potential applied device. Ground internal circuitry: most negative potential applied device. Should volts. This voltage used device operating current associated PASS CRWBR times. Approximately PWR1 (external supply) volts. SNS1. Sense input from resistor divider connected IN1. Over-current event detected when SNS1 drops below REF1. Source PMOS1 switch. Connect external sense resistor this point. This point cannot positive with respect PWR0. opening five bond wires, five probe pins. Drain PMOS1 switch. Connect external load this point. opening five bond wires, five probe pins. Ground return line PWR1 OUT1. This point cannot negative with respect GND0. Approximately PWR2 (external supply) volts. SNS2. Sense input from resistor divider connected IN2. Over-current event detected when SNS2 drops below REF2. Source PMOS2 switch. Connect sense resistor this point. This point cannot positive with respect PWR0. opening bond wires, probe pins. Drain PMOS2 switch. Connect external load this point. opening bond wires, probe pins. Ground return line PWR2 OUT2. This point cannot negative with respect GND0. Approxiately PWR3 (external supply) volts. SNS3. Sense input from resistor divider connected IN3. Over-current detected when SNS3 drops below REF3. Source PMOS3 switch. Connect sense resistor this point. This point cannot positive with respect PWR0. opening bond wires, probe pins. Drain PMOS3 switch. Connect external load this point. opening bond wires, probe pins. Ground return line PWR3 OUT3. This point cannot negative with respect GND0. Logic high enables built-in test mode. External timing capacitor overload pass time. Time usec/pF. External timing capacitor crowbard time. Time usec/pF. Connect external resistor bias currents device. Recommended value ohms REF1 voltage. This value effects PASS CRWBR time values. Indicates device opened power switches. Indicates device detected overload condition started timing cycle. Crowbar signal lines. Normally connected EXT. This signal will crowbar lines GND0 when switches open. left open, lines will float when High. switch input signal switch output signal Protected side with Crowbar. switch input signal data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. LPT001RP TABLE ESCRIPTION NAME IO2P IO3P IO4P IO5P IO6P IO7P IO8P IO9P IO10 IO10P IO11 IO11P IO12 IO12P IO13 IO13P IO14 IO14P NUMBER TYPE Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output ESCRIPTION DUAL SUPPLY LATCHUP PROTECTOR switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. switch input signal switch output signal Protected side with Crowbar. Unused SNSx inputs should connected PWR0. Unused REFx should connected GND0. 0510.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. LPT001RP WAVEFORM DUAL SUPPLY LATCHUP PROTECTOR WAVEFORM 0510.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. LPT001RP Sense Resistor Requirements DUAL SUPPLY LATCHUP PROTECTOR external resistor must placed series with supply protected part generate voltage drop when load current reaches intended trigger point. resistor placed from supply resistor value usually around ohms. trigg current left user, should less than offset voltages expected sensor typical range. Supply Voltage Drop Supply switch resistances (PMOS FET) have been minimized prevent excessive voltage drops higher currents. ensure receives adequate voltage, drops across sense resistor switch must analyzed expected load current. example, consider high current protection switch used load fault limit. Since nominal current trip current, nominal drop acros sense resistor characteristics trip point, With maximum switch resistance ohms, switch drop total supply drop nominal load. Selection Power Supply Supplies protected parts come into LPT-001 passed protected parts through three series interruptor switches. interruptor switch protects loads interruptor switches protect loads each. LPT-001 uses supply connected switch control logic. Sequence Timing Definition LPT-001 protects load sensing overcurrent condition. When this trigger occurs, LPT-001 opens supply line. After first time constant, I/Os disabled crowbarring protected supplies occurs. Coincident with this event, protected I/Os also crowbarred with option externally disabling this feature. time constant associated with latter controlled second time constant. Both time constants realized with external networks. LPT-001 Timing Programming LPT-001 output just provides indication protector circuit status. This output indicates logic level unde normal operating conditions. Upon detecting latchup event, indicates logic level high protection period. LPT-001 External Crowbar Disable Input LPT-001 input IOCRBR provides external control crowbars. Normally connected EXT, high will crowbar I/O. 0510.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. LPT001RP DUAL SUPPLY LATCHUP PROTECTOR PACKAGE YMBOL D1/E1 0.400 0.108 0.145 0.016 0.008 0.926 1.640 0.540 DIMENSION 0.160 0.018 0.010 0.950 1.800 0.550 0.050 0.425 0.123 0.450 0.138 0.175 0.021 0.012 0.970 1.870 0.560 Q68-02 Note: dimensions inches 0510.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. LPT001RP Important Notice: DUAL SUPPLY LATCHUP PROTECTOR These data sheets created using chip manufacturers published specifications. Space Electronics verifies functionality testing parameters either 100% testing, sample testing characterization. specifications presented within these data sheets represent latest most accurate information available date. Howe ver, these specifications subject change without notice Space Electronics assumes responsibility this information. Space Electronics' products authorized critical components life support devices systems without express written approval from Space Electronics. claim against Space Electronics Inc. must made within days from date shipment from Space Electronics. Space Electronics' liability shall limited replacement defective parts. 0510.00Rev0 data sheets subject change without notice ©2000 Space Electronics Inc. rights reserved. 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