CMOS Gate Pinouts CD4000BMS VIEW H=A+B+C CONNECTION
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CD4000BMS, CD4001BMS CD4002BMS, CD4025BMS
CMOS Gate
Pinouts
CD4000BMS VIEW
H=A+B+C CONNECTION
Features
High-Voltage Types (20V Rating) Propagation Delay Time 60ns (typ.) 50pF, Buffered Inputs Outputs Standard Symmetrical Output Characteristics 100% Tested Maximum Quiescent Current Parametric Ratings Maximum Input Current Over Full Package-Temperature Range; 100nA +25oC Noise Margin (Over Full Package Temperature Range): 2.5V Meets Requirements JEDEC Tentative Standards 13B, "Standard Specifications Description Series CMOS Device's
CD4001BMS VIEW
J=A+B K=C+D CONNECTION
Description
CD4000BMS CD4001BMS CD4002BMS CD4025BMS Dual Plus Inverter Quad Input Dual Input Triple Input
CD4002BMS VIEW
J=A+B+C+D CONNECTION
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS gates provide system designer with direct implementation function supplement existing family CMOS gates. inputs outputs buffered. CD4000BMS, CD4001BMS, CD4002BMS CD4025BMS supplied these lead outline packages:
CD4000B CD4001B CD4002B CD4025B
Braze Seal Frit Seal Ceramic Flatpack
K=D+E+F
CD4025BMS VIEW
J=A+B+C CONNECTION
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 321-724-7143 Copyright Intersil Corporation 1999
File Number
3289
7-649
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Functional Diagrams
J=A+B M=G+H
K=D+E+F
K=C+D
H=A+B+C
L=E+F
CD4000BMS
CD4001BMS
J=A+B+C+D
K=E+F+G+H
L=G+H+I
K=D+E+F
J=A+B+C
CD4002BMS
CD4025BMS
7-650
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Absolute Maximum Ratings
Supply Voltage Range, (VDD) -0.5V +20V (Voltage Referenced Terminals) Input Voltage Range, Inputs .-0.5V +0.5V Input Current, Input .±10mA Operating Temperature Range -55oC +125oC Package Types Storage Temperature Range (TSTG) -65oC +150oC Lead Temperature (During Soldering) +265oC Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case Maximum
Reliability Information
Thermal Resistance Ceramic FRIT Package 80oC/W 20oC/W Flatpack Package 70oC/W 20oC/W Maximum Package Power Dissipation (PD) +125 -55oC +100oC (Package Type 500mW +100oC +125oC (Package Type Derate Linearity 12mW/oC 200mW Device Dissipation Output Transistor 100mW Full Package Temperature Range (All Package Types) Junction Temperature +175oC
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP SUBGROUPS 18V, Input Leakage Input Leakage Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) Threshold Voltage Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH 15V, Load 15V, Load (Note VOUT 0.4V 10V, VOUT 0.5V 15V, VOUT 1.5V VOUT 4.6V VOUT 2.5V 10V, VOUT 9.5V 15V, VOUT 13.5V 10V, -10µA 10µA 2.8V, 20V, 18V, Input Voltage (Note Input Voltage High (Note Input Voltage (Note Input Voltage High (Note 4.5V, 0.5V 4.5V, 0.5V 15V, 13.5V, 1.5V 15V, 13.5V, 1.5V LIMITS TEMPERATURE
PARAMETER Supply Current
SYMBOL
CONDITIONS (NOTE 20V,
-100 -1000 -100
1000 -0.53 -1.8 -1.4 -3.5 -0.7
UNITS
+125oC -55oC +25o
+125oC -55oC +25oC +125oC -55oC +25oC, +125oC, -55oC
+25oC, +125oC, -55oC 14.95 +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 0.53 -2.8
VDD/2 VDD/2
NOTES: voltages referenced device GND, 100% testing being implemented. Go/No test with limits applied inputs
accuracy, voltage measured differentially VDD. Limit 0.050V max.
7-651
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP SUBGROUPS TEMPERATURE +25oC +125oC, -55oC LIMITS UNITS
PARAMETER Propagation Delay
SYMBOL TPHL TPLH TTHL TTLH
CONDITIONS (NOTE
Transition Time
+25oC +125oC, -55oC
NOTES: 50pF, 200K, Input 20ns. -55oC +125oC limits guaranteed, 100% testing being implemented. TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL CONDITIONS NOTES TEMPERATURE +125 10V, -55oC, +25oC +125oC 15V, -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) IOL5 Load 10V, Load Load 10V, Load VOUT 0.4V +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 10V, VOUT 0.5V +125 -55oC Output Current (Sink) IOL15 15V, VOUT 1.5V +125oC -55oC Output Current (Source) IOH5A VOUT 4.6V +125oC -55oC Output Current (Source) IOH5B VOUT 2.5V +125oC -55oC Output Current (Source) IOH10 10V, VOUT 9.5V +125oC -55oC Output Current (Source) IOH15 =15V, VOUT 13.5V +125oC -55oC Input Voltage Input Voltage High Propagation Delay TPHL TPLH TTHL TTLH 10V, 10V, +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25oC +25oC
4.95 9.95 0.36 0.64
0.25 -0.36 -0.64 -1.15 -2.0 -0.9 -1.6 -2.4 -4.2
UNITS
Transition Time
7-652
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
TABLE ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Input Capacitance NOTES: voltages referenced device GND. parameters listed Table controlled design process directly tested. These parameters characterized initial design release upon design changes which would affect these characteristics. 50pF, 200K, Input 20ns. TABLE POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current Threshold Voltage Threshold Voltage Delta Threshold Voltage Threshold Voltage Delta Functional SYMBOL VNTH VNTH VPTH VPTH CONDITIONS 20V, 10V, -10µA 10V, -10µA 10µA 10µA 18V, Propagation Delay Time TPHL TPLH +25oC NOTES TEMPERATURE +25oC +25oC +25o -2.8 VDD/2 -0.2 VDD/2 1.35 +25oC Limit UNITS SYMBOL CONDITIONS Input NOTES TEMPERATURE +25oC UNITS
+25oC +25oC +25oC
NOTES: voltages referenced device GND. 50pF, 200K, Input 20ns.
Table +25oC limit. Read Record
TABLE BURN-IN LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current Output Current (Sink) Output Current (Source) SYMBOL IOL5 IOH5A ±0.1µA Pre-Test Reading Pre-Test Reading DELTA LIMIT
TABLE APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test (Post Burn-In) Interim Test (Post Burn-In) (Note Interim Test (Post Burn-In) (Note Final Test Group Group Subgroup Subgroup Group MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP SUBGROUPS Deltas Deltas Deltas Subgroups Subgroups IDD, IOL5, IOH5A READ RECORD IDD, IOL5 IDD, IOL5 IDD, IOL5
NOTE: Parameteric, Functional; Cumulative Static
7-653
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
TABLE TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD POST-IRRAD Table READ RECORD PRE-IRRAD POST-IRRAD Table
CONFORMANCE GROUPS Group Subgroup
TABLE BURN-IN IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In Note Static Burn-In Note Dynamic BurnIn Note Irradiation Note Static Burn-In Note Static Burn-In Note Dynamic BurnIn Note Irradiation Note Static Burn-In Note Static Burn-In Note Dynamic BurnIn Note Irradiation Note Static Burn-In Note Static Burn-In Note Dynamic BurnIn Note Irradiation Note NOTE: Each except will have series resistor 0.5V Each except will have series resistor Group Subgroup sample size dice/wafer, failures, 0.5V OPEN GROUND -0.5V 50kHz 25kHz PART NUMBER CD4000BMS
PART NUMBER CD4001BMS
PART NUMBER CD4002BMS
PART NUMBER CD4025BMS
Intersil semiconductor products manufactured, assembled tested under ISO9000 quality systems certification.
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries. information regarding Intersil Corporation products, site http://www.intersil.com
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Schematic Logic Diagrams
(12) (11) (13) INVERTER GATES (NUMBERS PARENTHESES TERMINAL NUMBERS SECOND GATE) 5(12) (10) 4(13) LOGIC DIAGRAM GATES (NUMBERS PARANTHESES TERMINAL NUMBERS OTHER GATES) 1(8, 6,13) 2(9, (10, LOGIC DIAGRAM 3(11) (10, 6(10) *ALL INPUTS PROTECTED CMOS PROTECTION NETWORK
CD4000BMS
CD4001BMS
(13)
(12) (11) (10)
GATES (NUMBERS PARENTHESES TERMINAL NUMBERS SECOND GATE) 2(12)
GATES (NUMBERS PARENTHESES TERMINAL NUMBERS OTHER GATES)
3(11)
3(1, (13) 4(2, LOGIC DIAGRAM LOGIC DIAGRAM 5(8,
4(10)
5(9)
CD4002BMS
CD4025BMS
7-655
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Typical Performance Characteristics
POWER DISSIPATION GATE (PD) (µW) AMBIENT TEMPERATURE (TA) +25oC
AMBIENT TEMPERATURE (TA) +25oC SUPPLY VOLTAGE (VDD)
OUTPUT VOLTAGE (VO)
SUPPLY VOLTAGE (VDD)
50pF 15pF
INPUT VOLTAGE (VI)
INPUT FREQUENCY (fI) (kHz)
FIGURE TYPICAL VOLTAGE TRANSFER CHARACTERISTICS
AMBIENT TEMPERATURE (TA) +25oC
FIGURE TYPICAL POWER DISSIPATION FREQUENCY
OUTPUT (SINK) CURRENT (IOL) (mA)
GATE-TO-SOURCE VOLTAGE (VGS)
OUTPUT (SINK) CURRENT (IOL) (mA)
AMBIENT TEMPERATURE (TA) +25oC
12.5 GATE-TO-SOURCE VOLTAGE (VGS)
DRAIN-TO-SOURCE VOLTAGE (VDS)
DRAIN-TO-SOURCE VOLTAGE (VDS)
FIGURE TYPICAL OUTPUT (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) OUTPUT HIGH (SINK) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) +25oC GATE-TO-SOURCE VOLTAGE (VGS)
FIGURE MINIMUM OUTPUT (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) +25oC OUTPUT HIGH (SINK) CURRENT (IOH) (mA)
AMBIENT TEMPERATURE (TA)
GATE-TO-SOURCE VOLTAGE (VGS)
-10V
-10V
-15V
-15V
FIGURE TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
FIGURE MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
7-656
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS Typical Performance Characteristics (Continued)
AMBIENT TEMPERATURE (TA) +25oC PROPAGATION DELAY TIME GATE (tPHL, tPLH) (ns) TRANSITION TIME (tTHL, tTLH) (ns) SUPPLY VOLTAGE (VDD) AMBIENT TEMPERATURE (TA) +25oC
SUPPLY VOLTAGE (VDD)
LOAD CAPACITANCE (CL) (pF)
LOAD CAPACITANCE (CL) (pF)
FIGURE TYPICAL TRANSITION TIME LOAD CAPACITANCE
FIGURE TYPICAL PROPAGATION DELAY TIME LOAD CAPACITANCE
Chip Dimensions Layouts
CD4000BMS
CD4001BMS
CD4002BMS
CD4025BMS
Dimensions parentheses millimeters derived from basic inch dimensions indicated. Grid graduations mils (10-3 inch)
7-657
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