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PIC16F628 Rev. Silicon Errata Sheet PIC16F628 (Rev. parts have re


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PIC16F628
PIC16F628 Rev. Silicon Errata Sheet
PIC16F628 (Rev. parts have received conform functionally Device Data Sheet (DS40300B), except anomalies described below. Module: Ports read PORTB Data Direction Register (TRISB) returns Data Direction state port pins themselves contents TRISB register latch.
FIGURE
BLOCK DIAGRAM RB0/INT
RBPU weak pull-up
RB0/INT Data Data Latch
PORTB
TRISB
input buffer
TRIS Latch
Schmitt Trigger Buffer
TRISB
PORTB
input
2000 Microchip Technology Inc.
DS80074B-page
PIC16F628
FIGURE BLOCK DIAGRAM RB1/TX/DT
RBPU weak pull-up PORT/PERIPHERAL Select USART data output
Data PORTB
Data Latch TRISB RB1/RX/DT
TRIS Latch
TRISB Peripheral OE(2) PORTB USART receive input
input buffer
Schmitt Trigger
PORTB
Note Port/Peripheral select signal selects between port data peripheral output. Note Peripheral (output enable) only active peripheral select active.
DS80074B-page
2000 Microchip Technology Inc.
PIC16F628
FIGURE BLOCK DIAGRAM RB2/TX/CK
RBPU
weak pull-up
PORT/PERIPHERAL Select(1) USART TX/CK output Data PORTB
RB2/TX/CK
Data Latch TRISB
TRIS Latch
TRISB Peripheral OE(2) PORTB USART Slave Clock
input buffer
Schmitt Trigger
PORTB
Note Port/Peripheral select signal selects between port data peripheral output. Note Peripheral (output enable) only active peripheral select active.
2000 Microchip Technology Inc.
DS80074B-page
PIC16F628
FIGURE BLOCK DIAGRAM RB3/CCP1
RBPU weak pull-up Port/Peripheral Select(1) PWM/Compare output Data PORTB
Data Latch TRISB TRIS Latch RB3/CCP1
TRISB
input buffer
PORTB
input
Schmitt Trigger
PORTB
Note Peripheral Select defined CCP1M3:CCP1M0. (CCP1CON<3:0>)
DS80074B-page
2000 Microchip Technology Inc.
PIC16F628
FIGURE BLOCK DIAGRAM RB4/PGM
RBPU weak pull-up
Data PORTB
Data Latch TRISB TRIS Latch RB4/PGM
TRISB
PORTB
input Schmitt Trigger input buffer
RBIF
From other RB<7:4> pins
Port
Note:
voltage programming disables interrupt change weak pull-ups RB4.
2000 Microchip Technology Inc.
DS80074B-page
PIC16F628
FIGURE BLOCK DIAGRAM
RBPU weak pull-up
Data
PORTB
Data Latch
TRISB
TRIS Latch input buffer
TRISB PORTB RBIF
From other RB<7:4> pins
Port
DS80074B-page
2000 Microchip Technology Inc.
PIC16F628
FIGURE BLOCK DIAGRAM RB6/T1OSO/T1CKI
RBPU weak pull-up Data PORTB
Data Latch TRISB TRIS Latch RB6/ T1OSO/ T1CKI
TRISB T1OSCEN input buffer
PORTB
TMR1 Clock
From Serial programming clock
Schmitt Trigger TMR1 oscillator
RBIF
From other RB<7:4> pins
Port
2000 Microchip Technology Inc.
DS80074B-page
PIC16F628
FIGURE BLOCK DIAGRAM RB7/T1OSI
RBPU weak pull-up T1OSCEN Data PORTB RB7/T1OSI TMR1 oscillator
Data Latch TRISB
TRIS Latch
TRISB T10SCEN
PORTB
input buffer
Serial programming input
Schmitt Trigger
RBIF
From other RB<7:4> pins
Port
DS80074B-page
2000 Microchip Technology Inc.
PIC16F628
FIGURE PIC16LF628 VOLTAGE-FREQUENCY GRAPH, -40°C
(Volts) Frequency (MHz) Note shaded region indicates permissible combinations voltage frequency. maximum rated speed part limits permissible combinations voltage frequency. Please reference Product Identification System section maximum rated speed parts.
2000 Microchip Technology Inc.
DS80074B-page
PIC16F628
Clarifications/Corrections Data Sheet:
Device Data Sheet (DS40300B), following clarifications corrections should noted. T1SYNC Register T1CON (address 10h) should asserted logic (ie., T1SYNC. Table 4-1, page Table 10-2, page DS40300B should listed follows: ADEN Register RCSTA (address 18h), Table 4-1, misspelled. correct spelling should ADDEN. This also appears Figures text pages
TABLE 4-1:
Address Bank
T1CON RCSTA
SPECIAL REGISTERS SUMMARY BANK0
Value Reset Value other Resets(1)
uuuu 0000 -00x
Name
SPEN
T1CKPS1 SREN
T1CKPS0 CREN
T1OSCEN ADEN
T1SYNC FERR
TMR1CS OERR
TMR1ON RX9D
0000 0000 -00x
Legend: Unimplemented locations read `0', unchanged, unknown, value depends condition, shaded unimplemented Note Other (non power-up) resets include MCLR Reset, Brown-out Detect Watchdog Timer Reset during normal operation.
TABLE 10-2
Address
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1
Value Value other resets
Name
Legend:
T1CON
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 uuuu
unknown, unchanged, unimplemented read '0'. Shaded cells used Capture Timer1.
DS80074B-page
2000 Microchip Technology Inc.
PIC16F628
Valid regions operation:
FIGURE 17-1: PIC16F62X VOLTAGE-FREQUENCY GRAPH, +70°C
(Volts) Frequency (MHz) Note shaded region indicates permissible combinations voltage frequency. maximum rated speed part limits permissible combinations voltage frequency. Please reference Product Identification System section maximum rated speed parts.
FIGURE 17-2: PIC16F62X VOLTAGE-FREQUENCY GRAPH, -40°C 0°C, +70°C +125°C
(Volts) Frequency (MHz) Note shaded region indicates permissible combinations voltage frequency. maximum rated speed part limits permissible combinations voltage frequency. Please reference Product Identification System section maximum rated speed parts.
2000 Microchip Technology Inc.
DS80074B-page
PIC16F628
FIGURE 17-3: PIC16LF62X VOLTAGE-FREQUENCY GRAPH, +70°C
(Volts) Frequency (MHz) Note shaded region indicates permissible combinations voltage frequency. maximum rated speed part limits permissible combinations voltage frequency. Please reference Product Identification System section maximum rated speed parts.
FIGURE 17-4: PIC16LF62X VOLTAGE-FREQUENCY GRAPH, +70°C +125°C
(Volts) Frequency (MHz) Note shaded region indicates permissible combinations voltage frequency. maximum rated speed part limits permissible combinations voltage frequency. Please reference Product Identification System section maximum rated speed parts.
DS80074B-page
2000 Microchip Technology Inc.
PIC16F628
TABLE 17-1: CHARACTERISTICS: PIC16F62X-04 (COMMERCIAL, INDUSTRIAL, EXTENDED) PIC16F62X-20 (COMMERCIAL, INDUSTRIAL, EXTENDED)
Param
D001 D002 D003 D004 D005 D010 D013
Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C +85°C industrial +70°C commercial -40°C +125°C extended Characteristic Units
VPOR SVDD VBOD Supply Voltage Data Retention Voltage (Note start voltage ensure Power-on Reset rise rate ensure Power-on Reset Brown-out Detect Voltage Supply Current (Note 0.05* Power Down Current (Note 1.5* 4.35 15.0 V/ms
Conditions
Device SLEEP mode section power-on reset details section power-on reset details BODEN configuration cleared FOSC 4.0MHZ, FOSC 4.0MHZ, 5.5* FOSC 20.0MHz, 5.5* FOSC 20.0MHz, FOSC 10.0MHz, (Note FOSC 32kHz, 5.5* Extended* 4.0V (125°C) enabled, 5.0V 4.0V 4.0V temperatures temperatures temperatures temperatures
D020
D022 D022A D023 D023A
IWDT
Current (Note
IBOD Brown-out Detect Current (Note ICOMP Comparator Current each Comparator (Note IVREF VREF Current (Note
FOSC Oscillator Operating Frequency INTRC Oscillator Operating Frequency Oscillator Operating Frequency Oscillator Operating Frequency
Note
These parameters characterized tested. Data "Typ" column 5.0V, 25°C, unless otherwise stated. These parameters design guidance only tested. This limit which lowered SLEEP mode without losing data. supply current mainly function operating voltage frequency. Other factors such loading switching rate, oscillator type, internal code execution pattern temperature also have impact current consumption. test conditions measurements active operation mode are: OSC1 external square wave, from rail rail; pins tri-stated, pulled VDD, MCLR VDD; enabled/disabled specified. power down current SLEEP mode does depend oscillator type. Power down current measured with part SLEEP mode, with pins hi-impedance state tied VSS. current additional current consumed when this peripheral enabled. This current should added base measurement. configuration, current through Rext included. current through resistor estimated formula, VDD/2Rext (mA) with Rext Commercial temperature range only.
2000 Microchip Technology Inc.
DS80074B-page
PIC16F628
TABLE 17-2: CHARACTERISTICS: PIC16LF62X-04 (COMMERCIAL, INDUSTRIAL, EXTENDED)
Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C +85°C industrial +70°C commercial -40°C +125°C extended Operating voltage range described spec Table 17-1 Table 12-2 Characteristic Units Conditions
VPOR SVDD VBOD Supply Voltage Data Retention Voltage (Note start voltage ensure Power-on Reset rise rate ensure Power-on Reset Brown-out Detect Voltage Supply Current (Note 0.05* 1.5* 4.35 V/ms Device SLEEP mode section Power-on Reset details section Power-on Reset details BODEN configuration cleared FOSC 4.0MHZ, 2.0, disabled (Note FOSC 4.0MHz, 5.5, disabled (Note FOSC 32kHz, 2.0, disabled Power Down Current (Note 15.0 2.5* 3.0* Extended 3.0V enabled, 5.0V 3.0V 3.0V temperatures temperatures temperatures temperatures
Param
D001 D002 D003 D004 D005 D010 D013
D020
D023
IWDT IBOD ICOMP IVREF
Current (Note Brown-out Detect Current (Note Comparator Current each Comparator (Note VREF Current (Note Oscillator Operating Frequency INTRC Oscillator Operating Frequency Oscillator Operating Frequency Oscillator Operating Frequency
FOSC
Note
These parameters characterized tested. Data "Typ" column 5.0V, 25°C, unless otherwise stated. These parameters design guidance only tested. This limit which lowered SLEEP mode without losing data. supply current mainly function operating voltage frequency. Other factors such loading switching rate, oscillator type, internal code execution pattern, temperature also have impact current consumption. test conditions measurements active operation mode are: OSC1=external square wave, from rail rail; pins tristated, pulled VDD, MCLR VDD; enabled/disabled specified. power down current SLEEP mode does depend oscillator type. Power down current measured with part SLEEP mode, with pins hi-impedance state tied VSS. current additional current consumed when this peripheral enabled. This current should added base measurement. configuration, current through Rext included. current through resistor estimated formula VDD/2Rext (mA) with Rext
DS80074B-page
2000 Microchip Technology Inc.
PIC16F628
TABLE 17-3: CHARACTERISTICS: PIC16F62X (COMMERCIAL, INDUSTRIAL, EXTENDED) PIC16LF62X (COMMERCIAL, INDUSTRIAL, EXTENDED)
Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C +85°C industrial +70°C commercial -40°C +125°C extended Operating voltage range described spec Table 17-1 Table 12-2 Param. D030 D031 D032 D033 D040 D041 D042 D043 D043A D070 Characteristic Input Voltage ports with buffer with Schmitt Trigger input MCLR, RA4/T0CKI,OSC1 mode) OSC1 OSC1 Input High Voltage ports with buffer Unit Conditions
0.8V 0.15VDD 0.2VDD 0.2VDD 0.3VDD 0.6VDD-1.0
4.5V 5.5V otherwise Note1
D060 D061 D063
with Schmitt Trigger input MCLR RA4/T0CKI OSC1 (XT, OSC1 mode) IPURB PORTB weak pull-up current Input Leakage Current (Notes ports (Except PORTA) PORTA RA4/T0CKI OSC1, MCLR Output Voltage ports OSC2/CLKOUT only) Output High Voltage (Note ports (Except RA4) OSC2/CLKOUT only) Open-Drain High Voltage Capacitive Loading Specs Output Pins COSC2 OSC2
2.0V .25VDD 0.8V 0.8VDD 0.8VDD 0.7VDD 0.9VDD
4.5V 5.5V otherwise
Note1 5.0V, VPIN
±1.0 ±0.5 ±1.0 ±5.0
VPIN VDD, hi-impedance VPIN VDD, hi-impedance VPIN VPIN VDD, configuration IOL=8.5 VDD=4.5V, IOL=7.0 VDD=4.5V, IOL=1.6 VDD=4.5V, IOL=1.2 VDD=4.5V, -40° +85°C +125°C -40° +85°C +125°C
D080 D083
VDD-0.7 VDD-0.7 VDD-0.7 VDD-0.7
D090 D092 *D150
8.5*
IOH=-3.0 VDD=4.5V, -40° +85°C IOH=-2.5 VDD=4.5V, +125°C IOH=-1.3 VDD=4.5V, -40° +85°C IOH=-1.0 VDD=4.5V, +125°C PIC16F62X, PIC16LF62X
D100 D101 Note
pins/OSC2 mode) These parameters characterized tested. Data "Typ" column 5.0V, 25°C unless otherwise stated. These parameters design guidance only tested. oscillator configuration, OSC1 Schmitt Trigger input. recommended that PIC16F62X driven with external clock mode. leakage current MCLR strongly dependent applied voltage level. specified levels represent normal operating conditions. Higher leakage current measured different input voltages. Negative current defined coming pin.
modes when external clock used drive OSC1.
2000 Microchip Technology Inc.
DS80074B-page
PIC16F628
following block diagram shown Section Figure incorrect. following figure should used instead.
FIGURE 5-5:
BLOCK DIAGRAM RA5/MCLR/THV
MCLRE MCLR circuit MCLR Filter(1)
Program mode Detect RA5/MCLR/THV
Data PORT
Data Latch TRIS
TRIS Latch
TRIS
Port
DS80074B-page
2000 Microchip Technology Inc.
PIC16F628
example given Section Example 9-1, concerning Initializing Comparator Module incorrect. following code example should used instead.
EXAMPLE 9-1:
CLRF MOVLW MOVWF MOVLW MOVWF
INITIALIZING COMPARATOR MODULE
INTCON,GIE INTCON,PEIE PORTA 0X03 CMCON STATUS,RP0 0x07 TRISA Turn Global Interrupts Turn Peripheral Interrupts Init Port Init comparator mode CM<2:0> Select BANK Initialize Port Direction RA<2:0> Inputs RA<4:3> outputs TRIS<5> always reads Select BANK Wait 10us comparator output become valid Table 17-1 Parameter Read CMCON change condition Clear pending interrupts Select BANK Enable Comparator Interrupts Select BANK Enable Peripheral Interrupts Global Interrupt Enable
CALL MOVF
STATUS,RP0 DELAY10 CMCON,F PIR1,CMIF STATUS,RP0 PIE1,CMIE STATUS,RP0 INTCON,PEIE INTCON,GIE
Insert Your code. Helper function Delay 10us routine show below. DELAY10 burns cycles call goto goto next instruction call retlbl goto next instruction return back burn cycles cycles 10us 4Mhz burn cycles burn more cycles (actualy done cycles consumed)
retlbl
2000 Microchip Technology Inc.
DS80074B-page
PIC16F628
examples given Section concerning Data EEPROM incorrect. EEPROM registers located Bank examples show registers Bank Bank following code examples should used instead this feature.
EXAMPLE 13-1: DATA EEPROM READ
MOVLW MOVWF MOVF STATUS, CONFIG_ADDR EEADR EECON1, EEDATA, STATUS, Bank Address read Read EEDATA Bank
EXAMPLE 13-2: DATA EEPROM WRITE
data address Bank Address write Data write perform write operation Enable Write Disable INTs Write Write Bank
MOVLW MOVWF MOVLW MOVWF
STATUS, CONFIG_ADDR EEADR CONFIG_DATA EEDATA
MOVLW MOVWF MOVLW MOVWF
EECON, WREN INTCON, 055h EECON2 0AAh EECON2 EECON1, STATUS,
EXAMPLE 13-3: DATA EEPROM VERIFY
after write complete (i.e. write interrupt) STATUS, Bank MOVF EEDATA, load last written value into EECON, start read value written Reg) read EEDATA) same? SUBWF EEDATA, EEDATA fresh data BTFSS STATUS, Zero flag set? GOTO WRITE_ERR Write Error YES, Good Write continue program
DS80074B-page
2000 Microchip Technology Inc.
PIC16F628
NOTES:
2000 Microchip Technology Inc.
DS80074B-page
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Microchip received QS-9000 quality system certification worldwide headquarters, design wafer fabrication facilities Chandler Tempe, Arizona July 1999. Company's quality system processes procedures QS-9000 compliant PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs microperipheral products. addition, Microchip's quality system design manufacture development systems 9001 certified.
rights reserved. 2000 Microchip Technology Incorporated. Printed USA. 11/00
Printed recycled paper.
Information contained this publication regarding device applications like intended through suggestion only superseded updates. your responsibility ensure that your application meets with your specifications. representation warranty given liability assumed Microchip Technology Incorporated with respect accuracy such information, infringement patents other intellectual property rights arising from such otherwise. Microchip's products critical components life support systems authorized except with express written approval Microchip. licenses conveyed, implicitly otherwise, except maybe explicitly expressed herein, under intellectual property rights. Microchip logo name registered trademarks Microchip Technology Inc. U.S.A. other countries. rights reserved. other trademarks mentioned herein property their respective companies.
DS80074B-page
2000 Microchip Technology Inc.

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