Data Sheet June 1997 FN4325 Buck Pulse-Width Modulator (PWM) Cont

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Data Sheet June 1997 FN4325 Buck Pulse-Width Modulator (PWM) Cont

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HIP6013
Data Sheet June 1997 FN4325
Buck Pulse-Width Modulator (PWM) Controller
HIP6013 provides complete control protection DC-DC converter optimized high-performance microprocessor applications. designed drive N-Channel MOSFET standard buck topology. HIP6013 integrates control, output adjustment, monitoring protection functions into single package. output voltage converter precisely regulated 1.27V, with maximum tolerance ±1.5% over temperature line voltage variations. HIP6013 provides simple, single feedback loop, voltagemode control with fast transient response. includes 200kHz free-running triangle-wave oscillator that adjustable from below 50kHz over 1MHz. error amplifier features 15MHz gain-bandwidth product 6V/µs slew rate which enables high converter bandwidth fast transient performance. resulting duty ratio ranges from 100%. HIP6013 protects against over-current conditions inhibiting operation. HIP6013 monitors current using rDS(ON) upper MOSFET which eliminates need current sensing resistor.
Features
Drives N-Channel MOSFET Operates From +12V Input Simple Single-Loop Control Design Voltage-Mode Control Fast Transient Response High-Bandwidth Error Amplifier Full 100% Duty Ratio Excellent Output Voltage Regulation 1.27V Internal Reference ±1.5% Over Line Voltage Temperature Over-Current Fault Monitor Does Require Extra Current Sensing Element Uses MOSFET's rDS(on) Small Converter Size Constant Frequency Operation 200kHz Free-Running Oscillator Programmable from 50kHz Over 1MHz Pin, SOIC Package
Applications
Power Supply Pentium®, Pentium Pro, PowerPCand AlphaMicroprocessors
Ordering Information
PART NUMBER HIP6013CB TEMP. RANGE (oC) PACKAGE SOIC PKG. M14.15
High-Power 3.xV DC-DC Regulators Low-Voltage Distributed Power Supplies
Pinout
HIP6013 (SOIC) VIEW
OCSET COMP BOOT UGATE PHASE
PowerPCis trademark IBM. Alphais trademark Digital Equipment Corporation. Pentium® registered trademark Intel Corporation.
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CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 321-724-7143 Intersil (and design) trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2002. Rights Reserved
HIP6013 Typical Application
MONITOR PROTECTION OCSET BOOT UGATE PHASE +12V
HIP6013
COMP
Block Diagram
POWER-ON RESET (POR) 10µA OCSET
OVERCURRENT
SOFTSTART
BOOT UGATE PHASE
200µA
REFERENCE
1.27 VREF
COMPARATOR
INHIBIT
GATE CONTROL LOGIC
COMP
ERROR
OSCILLATOR
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HIP6013
Absolute Maximum Ratings
Supply Voltage, +15.0V Boot Voltage, VBOOT VPHASE +15.0V Input, Output Voltage -0.3V +0.3V Classification Class
Thermal Information
Thermal Resistance (Typical, Note oC/W) SOIC Package Maximum Junction Temperature 150oC Maximum Storage Temperature Range -65oC 150oC Maximum Lead Temperature (Soldering 10s) 300oC (SOIC Lead Tips Only)
Operating Conditions
Supply Voltage, +12V ±10% Ambient Temperature Range. 70oC Junction Temperature Range 125oC
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
NOTE: measured with component mounted evaluation board free air.
Electrical Specifications
PARAMETER SUPPLY CURRENT Nominal Supply Shutdown Supply POWER-ON RESET Rising Threshold Falling Threshold Enable Input threshold Voltage Rising VOCSET Threshold OSCILLATOR Free Running Frequency Total Variation Ramp Amplitude REFERENCE Reference Voltage ERROR AMPLIFIER Gain Gain-Bandwidth Product Slew Rate GATE DRIVERS Upper Gate Source Upper Gate Sink PROTECTION OCSET Current Source Soft Start Current
Recommended Operating Conditions, Unless Otherwise Noted SYMBOL TEST CONDITIONS UNITS
VCC; UGATE LGATE Open
OCSET 4.5VDC OCSET 4.5VDC VOCSET 4.5VDC
1.27
10.4
OPEN, 200k VOSC OPEN
VP-P
1.251
1.270
1.289
COMP 10pF
V/µs
IUGATE RUGATE
VBOOT VPHASE 12V, VUGATE ILGATE 0.3A
IOCSET
VOCSET 4.5VDC
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HIP6013 Typical Performance Curves
PULLUP +12V PULLDOWN (mA) SWITCHING FREQUENCY (kHz) 1000 CGATE 10pF CGATE 1000pF CGATE 3300pF
1000 RESISTANCE
SWITCHING FREQUENCY (kHz)
1000
FIGURE RESISTANCE FREQUENCY
FIGURE BIAS SUPPLY CURRENT FREQUENCY
Functional Description
OCSET COMP BOOT UGATE PHASE
(Pin
Connect capacitor from this ground. This capacitor, along with internal 10µA current source, sets softstart interval converter.
COMP (Pin (Pin
COMP available external pins error amplifier. inverting input error amplifier COMP error amplifier output. These pins used compensate voltage-control feedback loop converter.
(Pin
This provides oscillator switching frequency adjustment. placing resistor (RT) from this GND, nominal 200kHz switching frequency increased according following equation:
200kHz
(Pin
This open-collector enable pin. Pull this below disable converter. shutdown, soft start discharged UGATE LGATE pins held low.
(Pin
Signal ground voltage levels measured with respect this pin.
GND)
Conversely, connecting pull-up resistor (RT) from this reduces switching frequency according following equation.:
200kHz
PHASE (Pin
Connect PHASE upper MOSFET source. This used monitor voltage drop across MOSFET over-current protection. This also provides return path upper gate drive.
12V)
OCSET (Pin
Connect resistor (ROCSET) from this drain upper MOSFET. OCSET, internal 200µA current source (IOCS), upper MOSFET on-resistance (rDS(ON)) converter over-current (OC) trip point according following equation:
IOCS OCSET PEAK
UGATE (Pin
Connect UGATE upper MOSFET gate. This provides gate drive upper MOSFET.
BOOT (Pin
This provides bias voltage upper MOSFET driver. bootstrap circuit used create BOOT voltage suitable drive standard N-Channel MOSFET.
(Pin
Provide bias supply chip this pin.
over-current trip cycles soft-start function.
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HIP6013 Functional Description
Initialization
HIP6013 automatically initializes upon receipt power. Special sequencing input supplies necessary. Power-On Reset (POR) function continually monitors input supply voltages enable (EN) pin. monitors bias voltage input voltage OCSET pin. level OCSET equal less fixed voltage drop (see over-current protection). With held VCC, function initiates soft start operation after both input supply voltages exceed their thresholds. operation with single +12V power source, equivalent +12V power source must exceed rising threshold before initiates operation. Power-On Reset (POR) function inhibits operation with chip disabled low). With both input supplies above their thresholds, transitioning high initiates soft start interval.
SOFT-START (1V/DIV)
OUTPUT VOLTAGE (1V/DIV)
TIME (5ms/DIV)
FIGURE SOFT-START INTERVAL
Over-Current Protection
over-current function protects converter from shorted output using upper MOSFET's on-resistance, rDS(ON) monitor current. This method enhances converter's efficiency reduces cost eliminating current sensing resistor. over-current function cycles soft-start function hiccup mode provide fault protection. resistor (ROCSET) programs over-current trip level. internal 200µA (typical) current sink develops voltage across ROCSET that reference When voltage across upper MOSFET (also referenced exceeds voltage across ROCSET, over-current function initiates softstart sequence. soft-start function discharges with 10µA current sink inhibits operation. softstart function recharges CSS, operation resumes with error amplifier clamped voltage. Should overload occur while recharging CSS, soft start function inhibits operation while fully charging complete cycle. Figure shows this operation with overload condition. Note that inductor current increases over during charging interval causes over-current trip. converter dissipates very little power with this method. measured input power conditions Figure 2.5W.
Soft Start
function initiates soft start sequence. internal 10µA current source charges external capacitor (CSS) Soft start clamps error amplifier output (COMP pin) reference input terminal error amp) voltage. Figure shows soft start interval with 0.1µF. Initially clamp error amplifier (COMP pin) controls converter's output voltage. Figure voltage reaches valley oscillator's triangle wave. oscillator's triangular waveform compared ramping error amplifier voltage. This generates PHASE pulses increasing width that charge output capacitor(s). This interval increasing pulse width continues With sufficient output voltage, clamp reference input controls output voltage. This interval between Figure voltage exceeds reference voltage output voltage regulation. This method provides rapid controlled output voltage rise.
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HIP6013
SOFT-START RETURN TIME (20ms/DIV)
HIP6013
UGATE PHASE
OUTPUT INDUCTOR
VOUT LOAD VOUT LOAD
FIGURE OVER-CURRENT OPERATION
over-current function will trip peak inductor current (IPEAK) determined
IOCSET OCSET PEAK
FIGURE PRINTED CIRCUIT BOARD POWER GROUND PLANES ISLANDS
where IOCSET internal OCSET current source (200µA typical). trip point varies mainly MOSFET's rDS(ON) variations. avoid over-current tripping normal operating load range, find OCSET resistor from equation above with: maximum rDS(ON) highest junction temperature. minimum IOCSET from specification table. Determine PEAK IPEAK IOUT where output inductor ripple current. equation ripple current section under component guidelines titled `Output Inductor Selection'. small ceramic capacitor should placed parallel with ROCSET smooth voltage across OCSET presence switching noise input voltage.
Figure shows critical power components converter. minimize voltage overshoot interconnecting wires indicated heavy lines should part ground power plane printed circuit board. components shown Figure should located close together possible. Please note that capacitors each represent numerous physical capacitors. Locate HIP6013 within inches MOSFETs, circuit traces MOSFETs' gate source connections from HIP6013 must sized handle peak current. Figure shows circuit traces that require additional layout consideration. single point ground plane construction circuits shown. Minimize leakage current paths locate capacitor, close because internal current source only 10µA. Provide local decoupling between pins. Locate capacitor, CBOOT close practical BOOT PHASE pins.
+VIN BOOT CBOOT
Application Guidelines
Layout Considerations
high frequency switching converter, layout very important. Switching current from power device another generate voltage transients across impedances interconnecting bond wires circuit traces. These interconnecting impedances should minimized using wide, short printed circuit traces. critical components should located close together possible using ground plane construction single point grounding.
HIP6013
PHASE +12V CVCC
FIGURE PRINTED CIRCUIT BOARD SMALL SIGNAL LAYOUT GUIDELINES
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HIP6013 Feedback Compensation
Figure highlights voltage-mode control loop synchronous-rectified buck converter. output voltage (Vout) regulated Reference voltage level. error amplifier (Error Amp) output (VE/A) compared with oscillator (OSC) triangular wave provide pulse-width modulated (PWM) wave with amplitude PHASE node. wave smoothed output filter Co).
COMPARATOR VOSC DRIVER DRIVER PHASE VOUT
Modulator Break Frequency Equations
compensation network consists error amplifier (internal HIP6013) impedance networks ZFB. goal compensation network provide closed loop transfer function with highest crossing frequency (f0dB) adequate phase margin. Phase margin difference between closed loop phase f0dB 180o. equations below relate compensation network's poles, zeros gain components (R1, Figure these guidelines locating poles zeros compensation network:
(PARASITIC) VE/A ERROR
Compensation Break Frequency Equations
REFERENCE
Pick Gain (R2/R1) desired converter bandwidth
DETAILED COMPENSATION COMPONENTS VOUT
Place Zero Below Filter's Double Pole (~75% Place Zero Filter's Double Pole Place Pole Zero Place Pole Half Switching Frequency Check Gain against Error Amplifier's Open-Loop Gain Estimate Phase Margin Repeat Necessary Figure shows asymptotic plot DC-DC converter's gain frequency. actual Modulator Gain high gain peak high factor output filter shown Figure Using above guidelines should give Compensation Gain similar curve plotted. open loop error amplifier gain bounds compensation gain. Check compensation gain with capabilities error amplifier. Closed Loop Gain constructed log-log graph Figure adding Modulator Gain Compensation Gain dB). This equivalent multiplying modulator transfer function compensation transfer function plotting gain. compensation gain uses external impedance networks provide stable, high bandwidth (BW) overall loop. stable control loop gain crossing with -20dB/decade slope phase margin greater than 45o. Include worst case component variations when determining phase margin.
COMP
HIP6013
FIGURE VOLTAGE MODE BUCK CONVERTER COMPENSATION DESIGN
modulator transfer function small-signal transfer function Vout/V E/A. This function dominated Gain output filter Co), with double pole break frequency zero FESR. Gain modulator simply input voltage (Vin) divided peak-to-peak oscillator voltage VOSC.
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HIP6013
GAIN (dB) MODULATOR GAIN FESR 100K 20LOG (R2/R1) OPEN LOOP ERROR GAIN
component. most cases, multiple electrolytic capacitors small case size perform better than single large case capacitor.
Output Inductor Selection
output inductor selected meet output voltage ripple requirements minimize converter's response time load transient. inductor value determines converter's ripple current ripple voltage function ripple current. ripple voltage current approximated following equations:
20LOG (VIN/VOSC) COMPENSATION GAIN CLOSED LOOP GAIN
FREQUENCY (Hz)
FIGURE ASYMPTOTIC BODE PLOT CONVERTER GAIN
Component Selection Guidelines
Output Capacitor Selection
output capacitor required filter output supply load transient current. filtering requirements function switching frequency ripple current. load transient requirements function slew rate (di/dt) magnitude transient load current. These requirements generally with capacitors careful layout. Modern microprocessors produce transient load rates above 1A/ns. High frequency capacitors initially supply transient slow current load rate seen bulk capacitors. bulk filter capacitor values generally determined (effective series resistance) voltage rating requirements rather than actual capacitance requirements. High frequency decoupling capacitors should placed close power pins load physically possible. careful inductance circuit board wiring that could cancel usefulness these inductance components. Consult with manufacturer load specific decoupling requirements. example, Intel recommends that high frequency decoupling Pentium-Pro composed least forty (40) 1.0µF ceramic capacitors 1206 surface-mount package. only specialized low-ESR capacitors intended switching-regulator applications bulk capacitors. bulk capacitor's will determine output ripple voltage initial voltage drop after high slew-rate transient. aluminum electrolytic capacitor's value related case size with lower available larger case sizes. However, equivalent series inductance (ESL) these capacitors increases with case size reduce usefulness capacitor high slew-rate transient loading. Unfortunately, specified parameter. Work with your capacitor supplier measure capacitor's impedance with frequency select suitable
Increasing value inductance reduces ripple current voltage. However, large inductance values reduce converter's response time load transient. parameters limiting converter's response load transient time required change inductor current. Given sufficiently fast control loop design, HIP6013 will provide either 100% duty cycle response load transient. response time time required slew inductor current from initial current value transient current level. During this interval difference between inductor current transient current level must supplied output capacitor. Minimizing response time minimize output capacitance required. response time transient different application load removal load. following equations give approximate response time interval application removal transient load: tRISE ITRAN tFALL ITRAN
where: ITRAN transient load current step, tRISE response time application load, tFALL response time removal load. With input source, worst case response time either application removal load dependent upon output voltage setting. sure check both these equations minimum maximum output levels worst case response time.
Input Capacitor Selection
input bypass capacitors control voltage overshoot across MOSFETs. small ceramic capacitors high frequency decoupling bulk capacitors supply current needed each time turns Place small ceramic capacitors physically close MOSFETs between drain anode Schottky diode important parameters bulk input capacitor voltage rating current rating. reliable
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HIP6013
operation, select bulk capacitor with voltage current ratings above maximum input voltage largest current required circuit. capacitor voltage rating should least 1.25 times greater than maximum input voltage voltage rating times conservative guideline. current rating requirement input capacitor buck regulator approximately load current. through hole design, several electrolytic capacitors (Panasonic series Nichicon series Sanyo MVGX equivalent) needed. surface mount designs, solid tantalum capacitors used, caution must exercised with regard capacitor surge current rating. These capacitors must capable handling surge-current power-up. series available from AVX, 593D series from Sprague both surge current tested. Standard-gate MOSFETs normally recommended with HIP6013. However, logic-level gate MOSFETs used under special circumstances. input voltage, upper gate drive level, MOSFET's absolute gate-tosource voltage rating determine whether logic-level MOSFETs appropriate. Figure shows upper gate drive (BOOT pin) supplied bootstrap circuit from boot capacitor, CBOOT develops floating supply voltage referenced PHASE pin. This supply refreshed each cycle voltage less boot diode drop when lower MOSFET, turns logic-level MOSFET only used MOSFET's absolute gate-to-source voltage rating exceeds maximum voltage applied Figure shows upper gate drive supplied direct connection VCC. This option should only used converter systems where main input voltage +5VDC less. peak upper gate-to-source voltage approximately less input supply. main power +12VDC bias, gate-to-source voltage logic-level MOSFET good choice logic-level MOSFET good choice under these conditions.
+12V DBOOT +12V
MOSFET Selection/Considerations
HIP6013 requires N-Channel power MOSFET. should selected based upon rDS(ON), gate supply requirements, thermal management requirements. high-current applications, MOSFET power dissipation, package selection heatsink dominant design factors. power dissipation includes loss components; conduction loss switching loss. conduction losses largest component power dissipation MOSFET. Switching losses also contribute overall MOSFET power loss (see equations below). These equations assume linear voltagecurrent transitions approximations. gatecharge losses dissipated HIP6013 don't heat MOSFET. However, large gate-charge increases switching interval, tSW, which increases upper MOSFET switching losses. Ensure that MOSFET within maximum junction temperature high ambient temperature calculating temperature rise according package thermal-resistance specifications. separate heatsink necessary depending upon MOSFET power, package type, ambient temperature flow. PCOND rDS(ON) Where: duty cycle switching interval, switching frequency.
HIP6013
BOOT CBOOT UGATE PHASE NOTE: VG-S
FIGURE UPPER GATE DRIVE BOOTSTRAP OPTION
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HIP6013
+12V LESS HIP6013 BOOT UGATE PHASE NOTE: VG-S
Schottky Selection
Rectifier conducts when upper MOSFET off. diode should Schottky type power losses. power dissipation Schottky rectifier approximated PCOND Where: duty cycle schottky forward voltage drop addition power dissipation, package selection heatsink requirements main design tradeoffs choosing Schottky rectifier. Since three factors interrelated, selection process iterative procedure. maximum junction temperature rectifier must remain below manufacturer's specified value, typically 125oC. using package thermal resistance specification Schottky power dissipation equation (shown above), junction temperature rectifier estimated. sure available airflow ambient temperature determine junction temperature rise.
FIGURE UPPER GATE DRIVE DIRECT DRIVE OPTION
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HIP6013 HIP6013 DC-DC Converter Application Circuit
figure below shows DC-DC converter circuit microprocessor application, originally designed employ HIP6007 controller. Given similarities between HIP6007 HIP6013 controllers, circuit implemented using HIP6013 controller without modifications. However, given expanded reference voltage tolerance range, HIP6013-based converter require additional output capacitance. Detailed information circuit, including complete Bill-of-Materials circuit board description, found application note AN9722. Intersil's home page web: http://www.intersil.com.
12VCC C1-5 680µF C17-18 1206
ENABLE
1206
MONITOR PROTECTION OCSET BOOT UGATE PHASE C6-11 1000µF 1000pF 3.01K 4148
PHASE 0.1µF VOUT
0.1µF
SPARE
HIP6013
0.01µF SPARE
33pF
COMP
COMP
SPARE
Component Selection Notes:
C1-C3 each 680µF VDC, Sanyo MV-GX equivalent. C6-C9 each 1000µF 6.3W VDC, Sanyo MV-GX equivalent. Core: Micrometals T60-52; Winding: Turns 17AWG. 1N4148 equivalent. 15A, Schottky, Motorola MBR1535CT equivalent. Intersil MOSFET; RFP25N05. FIGURE DC-DC CONVERTER APPLICATION CIRCUIT
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Data Sheet June 1997 FN4325 Buck Pulse-Width Modulator (PWM) Cont

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