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320-640MHz Phase Noise VCXO Less than 0.4ps (12KHz-20MHz) phase j


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PL580-68/69
320-640MHz Phase Noise VCXO
Less than 0.4ps (12KHz-20MHz) phase jitter frequencies phase noise output 1MHz frequency offset -140dBc/Hz 320.0MHz, -131dBC/Hz 622.08MHz 20MHz-40MHz crystal input. 320MHz-640MHz output. Available PECL, LVDS outputs. external varicap required. Output Enable selector. Wide pull range (+/-200ppm). 3.3V operation. Available 16-pin TSSOP packages.
PACKAGE ASSIGNMENT
VDDANA XOUT SEL2^ OE_CTRL VCON GNDANA SEL0^ SEL1^ GNDBUF QBAR VDDBUF GNDBUF
PL580-6X
VDDANA
DESCRIPTION
PL580-6X monolithic jitter phase noise VCXO, capable 0.4ps phase jitter PECL LVDS outputs, covering wide frequency output range 640MHz. allows control output frequency with input voltage (VCON), using cost crystal. PL580-6X designed address demanding requirements high performance applications such SONET, GPS, Video, etc.
XOUT OE_CTRL VCON
GNDBUF QBAR VDDBUF
PL580-6X
GNDANA
Note1: Denotes internal pull resistor.
BLOCK DIAGRAM
VCON
VARICAP
Divider Charge Pump Loop Filter
GNDBUF
XOUT
XTAL
Phase Detector
x16)
Output Divider
QBAR
Performance Tuner
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page
PL580-68/69
320-640MHz Phase Noise VCXO
OUTPUT ENABLE LOGICAL LEVELS
Part
PLL580-68 (PECL) PLL580-69 (LVDS)
(Default) (Default)
State
Output enabled Tri-state Tri-state Output enabled
DESCRIPTIONS
Name
VDDANA XOUT OE_CTRL VCON GNDANA GNDBUF VDDBUF QBAR GNDBUF
TSSOP number
3x3mm number
Type
analog Circuitry.
Description
Crystal input pin. (See Crystal Specifications page Crystal output pin. (See Crystal Specifications page Connect Output enable control pin. (See OE_CTRL Logic Levels above). Voltage control input. Ground analog circuitry. Tuning inductor connection. inductor recommended high small size 0402 0603 component, must placed between adjacent pin. Place inductor close possible minimize parasitic effects maintain inductor connection output buffer circuitry. PECL LVDS output. connection output buffer circuitry. VDDBUF should separately decoupled from other VDDs whenever possible. Complementary PECL, LVDS output. connection output buffer circuitry. Connect Connect
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page
PL580-68/69
320-640MHz Phase Noise VCXO
FREQUENCY SELECTION TABLE
SEL2
SEL1
Other Combinations
SEL0
Selected Multiplier/Output Frequency
Max* Min* Reserved
pads have internal pull-ups (default value `1'). Bond Special Test Modes help selecting inductor value target output frequency.
PERFORMANCE TUNING INDUCTOR VALUE SELECTION
Please refer PhaseLink's `PhasorV Tuning Assistance' software automatically calculate optimum inductor values your application. addition, chart below could used reference quick inductor value selection. Please note that inductor values mentioned table below, when using `PhasorV Tuning Assistance' derived based parasitic values PhaseLink's evaluation board. performance enhancement your custom board design, please follow following instruction: special test modes "VCO Max" "VCO Min" determine optimum inductor value. "VCO Max" represents high range "VCO Min" represents range. output frequency "VCO Max" "VCO Min" test modes VCO/16. This means that output frequencies around crystal frequency that will used. optimum inductor value where target crystal frequency closest middle between "VCO Max" "VCO Min" output frequencies. this case will lock middle tuning range with maximum margin either side.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page
PL580-68/69
320-640MHz Phase Noise VCXO
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings PARAMETERS
Supply Voltage Input Voltage, Output Voltage, Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) Protection, Human Body Model
SYMBOL
MIN.
-0.5 -0.5
MAX.
+0.5 +0.5
UNITS
Exposure device under conditions beyond limits specified Maximum Ratings extended periods cause permanent damage device affect product reliability. These conditions represent stress rating only, functional operations device these other conditions above operational limits noted this specification implied. Note: Operating Temperature guaranteed design parts (COMMERCIAL INDUSTRIAL), tested COMMERCIAL grade only.
Crystal Specifications PARAMETERS
Crystal Resonator Frequency Crystal Loading Rating Crystal Pullability Recommended
SYMBOL
(xtal) (xtal)
CONDITIONS
Parallel Fundamental Mode VCON VCON 1.65V VCON 3.3V
MIN.
TYP.
17.7
MAX.
UNITS
Note: Crystal Loading rating: listed numbers only. Specify crystal value VCON 1.65V package parasitic. round number (i.e. 12pF) achieved adding external capacitors. same value XOUT, please note, that frequency pulling oscillator gain decrease.
Voltage Control Crystal Oscillator PARAMETERS
VCXO Stabilization Time VCXO Tuning Range output pullability VCXO Tuning Characteristic Pull range linearity VCON input impedance VCON modulation
SYMBOL
VCXOSTB
CONDITIONS
From power valid 40MHz; XTAL VCON 3.3V VCON=1.65V, ±1.65V
MIN.
TYP.
MAX.
UNITS
ppm/V
±200
VCON 3.3V, -3dB
Note: Parameters denoted with asterisk represent nominal characterization data production tested specific limits.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page
PL580-68/69
320-640MHz Phase Noise VCXO
General Electrical Specifications PARAMETERS
Supply Current, Dynamic (with Loaded Outputs) Operating Voltage Output Clock Duty Cycle Short Circuit Current
SYMBOL
CONDITIONS
PECL/LVDS 320MHz<Fout<640MHz
MIN.
TYP.
MAX.
90/70
UNITS
(CMOS) 1.25V (LVDS) 1.3V (PECL)
2.97
3.63
Jitter Specifications PARAMETERS
Integrated jitter Period jitter Period jitter Peak-toPeak
CONDITIONS
Integrated With capacitive decoupling between GND. Over 10,000 cycles. With capacitive decoupling between GND. Over 10,000 cycles.
FREQUENCY
320.0MHz 622.08MHz 320.0MHz 622.08MHz 320.0MHz 622.08MHz
MIN.
TYP.
MAX.
UNITS
Phase Noise Specifications PARAMETERS
Phase relative carrier (typical) Noise
FREQ.
320.0MHz 622.08MHz
@10Hz
@100Hz
@1kHz -116 -108
@10kHz -129 -118
@100kHz -124 -114
-140 -131
@10M -148 -138
UNITS
dBc/Hz
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page
PL580-68/69
320-640MHz Phase Noise VCXO
LVDS Electrical Characteristics PARAMETERS
Output Differential Voltage Magnitude Change Output High Voltage Output Voltage Offset Voltage Offset Magnitude Change Power-off Leakage Output Short Circuit Current
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
(see figure)
1.125 -5.7
1.375
LVDS Switching Characteristics PARAMETERS
Differential Clock Rise Time Differential Clock Fall Time
LVDS Levels Test Circuit
SYMBOL
CONDITIONS
(see figure)
MIN.
TYP.
MAX.
UNITS
LVDS Switching Test Circuit
10pF
VDIFF
10pF
LVDS Transistion Time Waveform
(Differential)
VDIFF
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page
PL580-68/69
320-640MHz Phase Noise VCXO
PECL Electrical Characteristics PARAMETERS
Output High Voltage Output Voltage
SYMBOL
CONDITIONS
(see figure)
MIN.
1.025
MAX.
1.620
UNITS
PECL Switching Characteristics PARAMETERS
Clock Rise Time Clock Fall Time
SYMBOL
CONDITIONS
@20/80% PECL @80/20% PECL
MIN.
TYP.
MAX.
0.45 0.45
UNITS
PECL Levels Test Circuit
PECL Output Skew
2.0V
tSKEW
PECL Transistion Time Waveform
DUTY CYCLE
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page
PL580-68/69
320-640MHz Phase Noise VCXO
LAYOUT RECOMMENDATIONS
LAYOUT CONSIDERATIONS PERFORMANCE OPTIMIZATION
following guidelines assist with performance optimized design: Keep traces PL580 short possible, well keeping other traces away from possible. Place crystal close possible both crystal pins device. This will reduce cross-talk between crystal other signals. Separate crystal traces from other signals PCB, allow ample distance between crystal traces. Place 0.01µF~0.1µF decoupling capacitor between GND, component side PCB, close pin. recommended place this component backside PCB. Going through vias will reduce signal integrity, causing additional jitter phase noise. highly recommended keep traces short possible. Please contact PhaseLink application note design outputs driving long traces Gerber files PL580 layout.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page
PL580-68/69
320-640MHz Phase Noise VCXO
PACKAGE INFORMATION 16-PIN SSOP
TSSOP
Symbol Min. Max. 1.20 0.05 0.15 0.19 0.30 0.09 0.20 4.90 5.10 4.30 4.50 6.40 0.45 0.75 0.65
16-PIN
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page
PL580-68/69
320-640MHz Phase Noise VCXO
ORDERING INFORMATION
part ordering, please contact Sales Department:
47745 Fremont Blvd., Fremont, 94538, Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
order number this device combination following: Device number, Package type Operating temperature range
PL580-6X
PART NUMBER TAPE REEL NONE= TUBE GREEN PACKAGE NONE= REGULAR PACKAGE PACKAGE TYPE O=TSSOP TEMPERATURE C=COMMERCIAL I=INDUSTRAL
Order Number
PL580-68OC PL580-68OC-R PL580-68OCL PL580-68OCL-R PL580-68QC PL580-68QC-R PL580-68QCL PL580-68QCL-R PL580-69OC PL580-69OC-R PL580-69OCL PL580-69OCL-R PL580-69QC PL580-69QC-R PL580-69QCL PL580-69QCL-R
Marking
P580-68OC P580-68OC P580-68OCL P580-68OCL P580-68QC P580-68QC P580-68QCL P580-68QCL P580-69OC P580-69OC P580-69OCL P580-69OCL P580-69QC P580-69QC P580-69QCL P580-69QCL
Package Option
TSSOP Tube TSSOP Tape Reel TSSOP Tube (GREEN Package) TSSOP Tape Reel (GREEN Package) Tube Tape Reel Tube (GREEN Package) Tape Reel (GREEN Package) TSSOP Tube TSSOP Tape Reel TSSOP Tube (GREEN Package) TSSOP Tape Reel (GREEN Package) Tube Tape Reel Tube (GREEN Package) Tape Reel (GREEN Package)
PhaseLink Corporation, reserves right make changes products specifications, both time without notice. information furnished Phaselink believed accurate reliable. However, PhaseLink makes guarantee warranty concerning accuracy said information shall responsible loss damage whatever nature resulting from reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products authorized critical components life support devices systems without express written approval President PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 (510) 492-0990 (510) 492-0991 www.phaselink.com 11/28/05 Page

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