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(VCC 4.5V 5.5V) (VCC 2.7V 5.5V) (VCC 1.8V 3.6V) Clock Rate 64-byte Pag
Top Searches for this datasheetSerial Peripheral Interface (SPI) Compatible Supports Modes (0,0) (1,1) Low-voltage Standard-voltage Operation (VCC 4.5V 5.5V) (VCC 2.7V 5.5V) (VCC 1.8V 3.6V) Clock Rate 64-byte Page Mode Byte Write Operation Block Write Protection Protect 1/4, 1/2, Entire Array Write Protect (WP) Write Disable Instructions Both Hardware Software Data Protection Self-timed Write Cycle Typical) High-reliability Endurance: 100,000 Write Cycles Data Retention: >200 Years Protection: >4000V Automotive Grade Extended Temperature Devices Available 8-pin PDIP, 8-pin EIAJ SOIC, 8-pin 16-pin JEDEC SOIC, 14-pin 20-pin TSSOP, 8-pin Leadless Array, 8-ball dBGAPackages Serial EEPROMs 128K (16,384 256K (32,768 Description AT25128/256 provides 131,072/262,144 bits serial electrically-erasable programmable read only memory (EEPROM) organized 16,384/32,768 words bits each. device optimized many industrial commercial applications (continued) AT25128 AT25256 Configurations Name HOLD Function Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Power Supply Write Protect Suspends Serial Input Connect Don't Connect 14-lead TSSOP HOLD 20-lead TSSOP* HOLD HOLD 8-ball dBGA HOLD 8-pin Leadless Array HOLD 16-pin SOIC HOLD Bottom View 8-pin PDIP HOLD Bottom View 8-pin SOIC HOLD *Note: Pins internally connected 14-lead TSSOP socket compatibility. Rev. 0872G-01/01 where low-power low-voltage operation essential. devices available space saving 8-pin PDIP (AT25128/256), 8-pin EIAJ SOIC (AT25128/256), 8-pin 16-pin JEDEC SOIC (AT25128), 14-pin TSSOP (AT25128), 20-pin TSSOP (AT25128/256), 8-pin Leadless Array (AT25128/256), 8-ball dBGA packages. addition, entire family available 5.0V (4.5V 5.5V), 2.7V (2.7V 5.5V) 1.8V (1.8V 3.6V) versions. AT25128/256 enabled through Chip Select (CS) accessed 3wire interface consisting Serial Data Input (SI), Serial Data Output (SO), Serial Clock (SCK). programming cycles completely self-timed, separate ERASE cycle required before WRITE. BLOCK WRITE protection enabled programming status register with entire array write protection. Separate program enable program disable instructions provided additional data protection. Hardware data protection provided protect against inadvertent write attempts status register. HOLD used suspend serial communication without resetting serial sequence. Absolute Maximum Ratings* Operating Temperature. -55°C +125°C Storage Temperature -65°C +150°C Voltage with Respect Ground .-1.0V +7.0V Maximum Operating Voltage 6.25V Output Current. *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions beyond those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability. Block Diagram 16384/32768 AT25128/256 0872G-01/01 AT25128/256 Capacitance(1) Applicable over recommended operating range from 25°C, MHz, +5.0V (unless otherwise noted). Symbol COUT Note: Test Conditions Output Capacitance (SO) Input Capacitance (CS, SCK, HOLD) This parameter characterized 100% tested. Units Conditions VOUT Characteristics Applicable over recommended operating range from -40°C +85°C, +1.8V +5.5V, +70°C, +1.8V +5.5V(unless otherwise noted). Symbol VCC1 VCC2 VCC3 ICC1 ICC2 ISB1 ISB2 ISB3 Parameter Supply Voltage Supply Voltage Supply Voltage Supply Current Supply Current Standby Current Standby Current Standby Current Input Leakage Output Leakage Input Low-voltage Input High-voltage Output Low-voltage Output High-voltage Output Low-voltage Output High-voltage Test Condition Units 5.0V MHz, Open, Read 5.0V MHz, Open, Read, Write 1.8V, 2.7V, 5.0V, VCC, 70°C -3.0 -3.0 -1.0 5.5V 1.8V 3.6V -1.6 0.15 -100 VOL1 VOH1 VOL2 VOH2 Note: reference only tested. 0872G-01/01 Characteristics Applicable over recommended operating range from -40°C 85°C, Specified, Gate (unless otherwise noted). Symbol fSCK Parameter Clock Frequency Voltage 1000 1000 1000 Units Input Rise Time Input Fall Time High Time Time High Time tCSS Setup Time tCSH Hold Time Data Setup Time Data Hold Time Hold Setup Time Hold Hold Time Output Valid Output Hold Time Hold Output AT25128/256 0872G-01/01 AT25128/256 Characteristics (Continued) Applicable over recommended operating range from -40°C 85°C, Specified, Gate (unless otherwise noted). Symbol Parameter Hold Output High Voltage 100K 1000 Units tDIS Output Disable Time Endurance(1) Note: Write Cycle Time 5.0V, 25°C, Page Mode Write Cycles This parameter characterized 100% tested. Contact Atmel further information. Serial Interface Description MASTER: device that generates serial clock. SLAVE: Because Serial Clock (SCK) always input, AT25128/256 always operates slave. TRANSMITTER/RECEIVER: AT25128/256 separate pins designated data transmission (SO) reception (SI). MSB: Most Significant (MSB) first transmitted received. SERIAL OP-CODE: After device selected with going low, first byte will received. This byte contains op-code that defines operations performed. INVALID OP-CODE: invalid op-code received, data will shifted into AT25128/256, serial output (SO) will remain high impedance state until falling edge detected again. This will reinitialize serial communication. CHIP SELECT: AT25128/256 selected when low. When device selected, data will accepted pin, serial output (SO) will remain high impedance state. HOLD: HOLD used conjunction with select AT25128/256. When device selected serial sequence underway, HOLD used pause serial communication with master device without resetting serial sequence. pause, HOLD must brought while low. resume serial communication, HOLD brought high while (SCK still toggle during HOLD). Inputs will ignored while high impedance state. WRITE PROTECT: write protect (WP) will allow normal read/write operations when held high. When brought WPEN "1", write operations status register inhibited. going while still will interrupt write status register. internal write cycle already been initiated, going will have effect write operation status register. function blocked when WPEN status register "0". This will allow user install AT25128/256 system with tied ground still able write status register. functions enabled when WPEN "1". 0872G-01/01 Serial Interface AT25128/256 Functional Description AT25128/256 designed interface directly with synchronous serial peripheral interface (SPI) 6800 type series microcontrollers. AT25128/256 utilizes 8-bit instruction register. list instructions their operation codes contained Table instructions, addresses, data transferred with first start with high-to-low transition. Table Instruction AT25128/256 Instruction Name WREN WRDI RDSR WRSR READ WRITE Instruction Format 0000 X110 0000 X100 0000 X101 0000 X001 0000 X011 0000 X010 Operation Write Enable Latch Reset Write Enable Latch Read Status Register Write Status Register Read Data from Memory Array Write Data Memory Array AT25128/256 0872G-01/01 AT25128/256 WRITE ENABLE (WREN): device will power-up write disable state when applied. programming instructions must therefore preceded Write Enable instruction. WRITE DISABLE (WRDI): protect device against inadvertent writes, Write Disable instruction disables programming modes. WRDI instruction independent status pin. READ STATUS REGISTER (RDSR): Read Status Register instruction provides access status register. READY/BUSY Write Enable status device determined RDSR instruction. Similarly, Block Write Protection bits indicate extent protection employed. These bits using WRSR instruction. Table Status Register Format WPEN Table Read Status Register Definition Definition (RDY) (WEN) (BP0) (BP1) (RDY) indicates device READY. indicates write cycle progress. indicates device WRITE ENABLED. indicates device WRITE ENABLED. Table Table Bits when device internal write cycle. (WPEN) Table Bits during internal write cycle. WRITE STATUS REGISTER (WRSR): WRSR instruction allows user select four levels protection. AT25128/256 divided into four array segments. quarter (1/4), half (1/2), memory segments protected. data within selected segment will therefore READ only. block write protection levels corresponding status register control bits shown Table three bits, BP0, BP1, WPEN nonvolatile cells that have same properties functions regular memory cells (e.g. WREN, tWC, RDSR). Table Block Write Protect Bits Status Register Bits Level 1(1/4) 2(1/2) 3(All) Array Addresses Protected AT25128 None 3000 3FFF 2000 3FFF 0000 3FFF AT25256 None 6000 7FFF 4000 7FFF 0000 7FFF 0872G-01/01 WRSR instruction also allows user enable disable write protect (WP) through Write Protect Enable (WPEN) bit. Hardware write protection enabled when WPEN "1". Hardware write protection disabled when either high WPEN "0." When device hardware write protected, writes Status Register, including Block Protect bits WPEN bit, block-protected sections memory array disabled. Writes only allowed sections memory which block-protected. NOTE: When WPEN hardware write protected, cannot changed back "0", long held low. Table WPEN Operation WPEN High High Protected Blocks Protected Protected Protected Protected Protected Protected Unprotected Blocks Protected Writable Protected Writable Protected Writable Status Register Protected Writable Protected Protected Protected Writable READ SEQUENCE (READ): Reading AT25128/256 (Serial Output) requires following sequence. After line pulled select device, READ op-code transmitted line followed byte address read (Refer Table Upon completion, data line will ignored. data specified address then shifted onto line. only byte read, line should driven high after data comes out. READ sequence continued since byte address automatically incremented data will continue shifted out. When highest address reached, address counter will roll over lowest address allowing entire memory read continuous READ cycle. WRITE SEQUENCE (WRITE): order program AT25128/256, separate instructions must executed. First, device must write enabled Write Enable (WREN) Instruction. Then Write (WRITE) Instruction executed. Also, address memory location(s) programmed must outside protected address field location selected Block Write Protection Level. During internal write cycle, commands will ignored except RDSR instruction. Write Instruction requires following sequence. After line pulled select device, WRITE op-code transmitted line followed byte address data programmed (Refer Table Programming will start after brought high. (The LOW-to-High transition must occur during time immediately after clocking (LSB) data bit. READY/BUSY status device determined initiating READ STATUS REGISTER (RDSR) Instruction. WRITE cycle still progress. WRITE cycle ended. Only READ STATUS REGISTER instruction enabled during WRITE programming cycle. AT25128/256 0872G-01/01 AT25128/256 AT25128/256 capable 64-byte PAGE WRITE operation. After each byte data received, order address bits internally incremented one; high order bits address will remain constant. more than bytes data transmitted, address counter will roll over previously written data will overwritten. AT25128/256 automatically returned write disable state completion WRITE cycle. NOTE: device Write enabled (WREN), device will ignore Write instruction will return standby state, when brought high. falling edge required re-initiate serial communication. Table Address Address Don't Care Bits AT25128 AT25256 0872G-01/01 Timing Diagrams (for Mode Synchronous Data Timing HI-Z HI-Z VALID WREN Timing WRDI Timing AT25128/256 0872G-01/01 AT25128/256 RDSR Timing INSTRUCTION HIGH IMPEDANCE DATA WRSR Timing READ Timing 0872G-01/01 WRITE Timing HOLD Timing HOLD AT25128/256 0872G-01/01 AT25128/256 AT25128 Ordering Information (max) (ms) (max) (µA) 5000 (max) (µA) fMAX (kHz) 3000 Ordering Code AT25128-10CC AT25128C1-10CC AT25128-10PC AT25128N-10SC AT25128W-10SC AT25128-10UC AT25128N1-10SC AT25128T1-10TC AT25128T2-10TC AT25128-10CI AT25128C1-10CI AT25128-10PI AT25128N-10SI AT25128W-10SI AT25128-10UI AT25128N1-10SI AT25128T1-10TI AT25128T2-10TI Package 16S1 16S1 Operation Range Commercial (0°C 70°C) 5000 3000 Industrial (-40°C 85°C) Package Type 16S1 8-lead, 0.230" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP) 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC) 8-ball, Ball Grid Array Package (dBGA) 16-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 14-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) 20-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank -2.7 -1.8 Standard Device (4.5V 5.5V) Low-voltage (2.7V 5.5V) Low-voltage (1.8V 3.6V) 0872G-01/01 AT25128 Ordering Information (Continued) (max) (ms) (max) (µA) 2000 (max) (µA) fMAX (kHz) 2100 Ordering Code AT25128-10CC-2.7 AT25128C1-10CC-2.7 AT25128-10PC-2.7 AT25128N-10SC-2.7 AT25128W-10SC-2.7 AT25128-10UC-2.7 AT25128N1-10SC-2.7 AT25128T1-10TC-2.7 AT25128T2-10TC-2.7 AT25128-10CI-2.7 AT25128C1-10CI-2.7 AT25128-10PI-2.7 AT25128N-10SI-2.7 AT25128W-10SI-2.7 AT25128-10UI-2.7 AT25128N1-10SI-2.7 AT25128T1-10TI-2.7 AT25128T2-10TI-2.7 Package 16S1 16S1 Operation Range Commercial (0°C 70°C) 2000 2100 Industrial (-40°C 85°C) Package Type 16S1 8-lead, 0.230" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP) 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC) 8-ball, Ball Grid Array Package (dBGA) 16-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 14-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) 20-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank -2.7 -1.8 Standard Device (4.5V 5.5V) Low-voltage (2.7V 5.5V) Low-voltage (1.8V 3.6V) AT25128/256 0872G-01/01 AT25128/256 AT25128 Ordering Information (Continued) (max) (ms) (max) (µA) 1000 (max) (µA) fMAX (kHz) Ordering Code AT25128-10CC-1.8 AT25128C1-10CC-1.8 AT25128-10PC-1.8 AT25128N-10SC-1.8 AT25128W-10SC-1.8 AT25128-10UC-1.8 AT25128N1-10SC-1.8 AT25128T1-10TC-1.8 AT25128T2-10TC-1.8 AT25128-10CI-1.8 AT25128C1-10CI-1.8 AT25128-10PI-1.8 AT25128N-10SI-1.8 AT25128W-10SI-1.8 AT25128-10UI-1.8 AT25128N1-10SI-1.8 AT25128T1-10TI-1.8 AT25128T2-10TI-1.8 Package 16S1 16S1 Operation Range Commercial (0°C 70°C) 1000 Industrial (-40°C 85°C) Package Type 16S1 8-lead, 0.230" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP) 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC) 8-ball, Ball Grid Array Package (dBGA) 16-lead, 0.150" Wide, Plastic Gull Wing Small Outline Package (JEDEC SOIC) 14-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) 20-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank -2.7 -1.8 Standard Device (4.5V 5.5V) Low-voltage (2.7V 5.5V) Low-voltage (1.8V 3.6V) 0872G-01/01 AT25256 Ordering Information (max) (ms) (max) (µA) 5000 (max) (µA) fMAX (kHz) 3000 Ordering Code AT25256-10CC AT25256C1-10CC AT25256-10PC AT25256W-10SC AT25256-10UC AT25256T2-10TC AT25256-10CI AT25256C1-10CI AT25256-10PI AT25256W-10SI AT25256-10UI AT25256T2-10TI AT25256-10CC-2.7 AT25256C1-10CC-2.7 AT25256-10PC-2.7 AT25256W-10SC-2.7 AT25256-10UC-2.7 AT25256T2-10TC-2.7 AT25256-10CI-2.7 AT25256C1-10CI-2.7 AT25256-10PI-2.7 AT25256W-10SI-2.7 AT25256-10UI-2.7 AT25256T2-10TI-2.7 Package Operation Range Commercial (0°C 70°C) 5000 3000 Industrial (-40°C 85°C) 2000 2100 Commercial (0°C 70°C) 2000 2100 Industrial (-40°C 85°C) Package Type 8-lead, 0.230" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP) 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC) 8-ball, Ball Grid Array Package (dBGA) 20-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank -2.7 -1.8 Standard Device (4.5V 5.5V) Low-voltage (2.7V 5.5V) Low-voltage (1.8V 3.6V) AT25128/256 0872G-01/01 AT25128/256 AT25256 Ordering Information (Continued) (max) (ms) (max) (µA) 1000 (max) (µA) fMAX (kHz) Ordering Code AT25256-10CC-1.8 AT25256C1-10CC-1.8 AT25256-10PC-1.8 AT25256W-10SC-1.8 AT25256-10UC-1.8 AT25256T2-10TC-1.8 AT25256-10CI-1.8 AT25256C1-10CI-1.8 AT25256-10PI-1.8 AT25256W-10SI-1.8 AT25256-10UI-1.8 AT25256T2-10TI-1.8 Package Operation Range Commercial (0°C 70°C) 1000 Industrial (-40°C 85°C) Package Type 8-lead, 0.230" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Leadless Array Package (LAP) 8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP) 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline Package (EIAJ SOIC) 8-ball, Ball Grid Array Package (dBGA) 20-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank -2.7 -1.8 Standard Device (4.5V 5.5V) Low-voltage (2.7V 5.5V) Low-voltage (1.8V 3.6V) 0872G-01/01 Packaging Information 8-lead, 0.230" Wide, Leadless Array Package (LAP) Dimensions Inches (Millimeters) 8C1, 8-lead, 0.300" Wide, Leadless Array Package (LAP) Dimensions Inches (Millimeters) VIEW SIDE VIEW VIEW SIDE VIEW 5.03 (0.198) 4.83 (0.190) 5.10 (0.201) 4.90 (0.193) 6.09 (0.240) 5.89 (0.232) BOTTOM VIEW 1.14 (0.045) 0.94 (0.037) 0.38 (0.015) 0.30 (0.012) 1.19 (0.047) 1.09 (0.043) 1.32 (0.052) 1.22 (0.048) 8.10 (0.319) 7.90 (0.311) BOTTOM VIEW 1.22 (0.048) 1.12 (0.044) 0.92 (0.036) 0.82 (0.032) 0.95 (0.037) 0.85 (0.033) 1.14 (0.045) 0.94 (0.037) 0.38 (0.015) 0.30 (0.012) 1.32 (0.052) 1.22 (0.048) 0.61 (0.024) 0.51 (0.020) 0.89 (0.035) 0.79 (0.031) 0.34 (0.013) 0.24 (0.009) 0.61 (0.024) 0.51 (0.020) 4.76 (0.187) 4.66 (0.183) 8P3, 8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP) Dimensions Inches (Millimeters) JEDEC STANDARD MS-001 .400 (10.16) .355 (9.02) .280 (7.11) .240 (6.10) .037 (.940) .027 (.690) 8S1, 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Dimensions Inches (Millimeters) .020 (.508) .013 (.330) .157 (3.99) .150 (3.81) .244 (6.20) .228 (5.79) .300 (7.62) .050 (1.27) .210 (5.33) SEATING PLANE .150 (3.81) .115 (2.92) .070 (1.78) .045 (1.14) .015 (.380) .022 (.559) .014 (.356) .100 (2.54) .196 (4.98) .189 (4.80) .068 (1.73) .053 (1.35) .325 (8.26) .300 (7.62) .012 (.305) .008 (.203) .430 (10.9) .010 (.254) .004 (.102) .050 (1.27) .016 (.406) .010 (.254) .007 (.203) AT25128/256 0872G-01/01 AT25128/256 Packaging Information 8S2, 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Dimensions Inches (Millimeters) 8U1, 8-ball, Ball Grid Array Package (dBGA) Dimensions Millimeters (Inches)* .020 (.508) .012 (.305) VIEW 2.21 (0.087) .213 (5.41) .205 (5.21) .330 (8.38) .300 (7.62) 3.73 (0.147) .050 (1.27) .212 (5.38) .203 (5.16) .080 (2.03) .070 (1.78) SIDE VIEW BOTTOM VIEW 0.38 (0.015) .013 (.330) .004 (.102) .035 (.889) .020 (.508) 0.75 (0.029) .010 (.254) .007 (.178) 0.74 (0.029) 0.75 (0.029) 0.73 (0.028) 0.52 (0.020) *Controlling dimension: millimeters 16S1, 16-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Dimensions Inches (Millimeters) 8U4, 8-ball, Ball Grid Array Package (dBGA) Dimensions Millimeters (Inches)* VIEW 2.95 (0.116) 0.020 (0.51) 0.013 (0.33) 0.158 (4.00) 0.150 (3.80) 0.244 (6.20) 0.228 (5.80) 3.86 (0.152) .050 (1.27) SIDE VIEW BOTTOM VIEW 0.38 (0.015) 0.394 (10.00) 0.386 (09.80) 0.069 (1.75) 0.053 (1.35) 0.010 (0.25) 0.004 (0.10) 0.75 (0.029) 0.81 (0.032) 0.75 (0.029) 0.010 (0.25) 0.008 (0.19) 1.10 (0.043) 0.52 (0.020) 0.050 (1.27) 0.016 (0.40) *Controlling dimension: millimeters 0872G-01/01 AT25128/256 Packaging Information 14T, 14-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Dimensions Millimeters (Inches)* 20T, 20-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Dimensions Millimeters (Inches)* INDEX MARK INDEX MARK 4.50 (.177) 4.30 (.169) 6.50 (.256) 6.25 (.246) 4.50 (.177) 4.30 (.169) 6.50 (.256) 6.25 (.246) 5.10 (.201) 4.90 (.193) 1.20 (.047) 6.60 (.260) 6.40 (.252) 1.20 (.047) .650 (.026) 0.30 (.012) 0.19 (.007) 0.15 (.006) 0.05 (.002) SEATING PLANE .650 (.026) 0.30 (.012) 0.19 (.007) 0.15 (.006) 0.05 (.002) SEATING PLANE 0.20 (.008) 0.09 (.004) 0.20 (.008) 0.09 (.004) 0.75 (.030) 0.45 (.018) 0.75 (.030) 0.45 (.018) *Controlling dimension: millimeters *Controlling dimension: millimeters 0872G-01/01 Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway Jose, 95131 (408) 441-0311 (408) 487-2600 Atmel Operations Atmel Colorado Springs 1150 Cheyenne Mtn. Blvd. Colorado Springs, 80906 (719) 576-3300 (719) 540-1759 Europe Atmel SarL Route Arsenaux Casa Postale CH-1705 Fribourg Switzerland (41) 26-426-5555 (41) 26-426-5500 Atmel Rousset Zone Industrielle 13106 Rousset Cedex France (33) 4-4253-6000 (33) 4-4253-6001 Atmel Smart Card Scottish Enterprise Technology Park East Kilbride, Scotland (44) 1355-357-000 (44) 1355-242-743 Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza Mody Road Tsimhatsui East Kowloon Hong Kong (852) 2721-9778 (852) 2722-1369 Atmel Grenoble Avenue Rochepleine 38521 Saint-Egreve Cedex France (33) 4-7658-3000 (33) 4-7658-3480 Japan Atmel Japan K.K. Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan (81) 3-3523-3551 (81) 3-3523-7581 Fax-on-Demand North America: 1-(800) 292-8635 International: 1-(408) 441-0732 literature@atmel.com Site http://www.atmel.com 1-(408) 436-4309 Atmel Corporation 2001. Atmel Corporation makes warranty products, other than those expressly contained Company's standard warranty which detailed Atmel's Terms Conditions located Company's site. Company assumes responsibility errors which appear this document, reserves right change devices specifications detailed herein time without notice, does make commitment update information contained herein. licenses patents other intellectual property Atmel granted Company connection with sale Atmel products, expressly implication. Atmel's products authorized critical components life support devices systems. dBGA rademark Atmel Corporation. Terms product names this document trademarks others. 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