IDT7200L IDT7201LA IDT7202LA First-In/First-Out dual-port memory

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IDT7200L IDT7201LA IDT7202LA First-In/First-Out dual-port memory

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CMOS ASYCHRONOUS FIFO 1,024
IDT7200L IDT7201LA IDT7202LA
First-In/First-Out dual-port memory organization (IDT7200) organization (IDT7201) 1,024 organization (IDT7202) power consumption Active: 440mW (max.) -Power-down: 28mW (max.) Ultra high speed-12ns access time Asynchronous simultaneous read write Fully expandable both word depth and/or width functionally compatible with 720X family Status Flags: Empty, Half-Full, Full Auto-retransmit capability High-performance CEMOStechnology Military product compliant MIL-STD-883, Class Standard Military Drawing #5962-87531, 5962-89666, 5962-89863 5962-89536 listed this function Dual versions available TSSOP package. more information, IDT7280/7281/7282 data sheet (3208.pdf) IDT7280 IDT7200 IDT7281 IDT7201 IDT7282 IDT7202 Industrial temperature range (-40oC +85oC) available (plastic packages only)
DESCRIPTION:
IDT7200/7201/7202 dual-port memories that load empty data first-in/first-out basis. devices Full Empty flags prevent data overflow underflow expansion logic allow unlimited expansion capability both word size depth. reads writes internally sequential through ring pointers, with address information required load unload data. Data toggled devices through Write Read pins. devices utilize 9-bit wide data array allow control parity bits user's option. This feature especially useful data communications applications where necessary parity transmission/reception error checking. also features Retransmit (RT) capability that allows reset read pointer initial position when pulsed allow retransmission from beginning data. Half-Full Flag available single device mode width expansion modes. These FIFOs fabricated using IDT's high-speed CMOS technology. They designed those applications requiring asynchronous simultaneous read/writes multiprocessing rate buffer applications. Military grade product manufactured compliance with latest revision MIL-STD-883, Class
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS (D0-D8) WRITE CONTROL WRITE POINTER ARRAY 1,024
READ POINTER
READ CONTROL
THREESTATE BUFFERS DATA OUTPUTS (Q0-Q8)
RESET LOGIC FL/RT
FLAG LOGIC EXPANSION LOGIC
XO/HF
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DECEMBER 1998
1998 Integrated Device Technology, Inc. DSC-2679/7
IDT7200L/7201LA/7202LA
FL/RT XO/HF
INDEX
FL/RT XO/HF
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CONFIGURATIONS
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Package Type PLASTIC DIP(1) PLASTIC THIN CERDIP(1) THIN CERDIP SOIC CERPACK(1)
Reference Identifier P28-1 P28-2 D28-1 D28-3 SO28-3 E28-2 VIEW
Order Code
Package Type LCC(1) PLCC
Reference Identifier L32- J32-1 VIEW
Order Code
NOTE: 600-mil-wide (P28-1 D28-1), CERPACK available IDT7200.
ABSOLUTE MAXIMUM RATINGS
Symbol VTERM Rating Terminal Voltage with Respect Storage Temperature Output Current Com'l Ind'l -0.5 +7.0 Mil. -0.5 +7.0 Unit
RECOMMENDED OPERATING CONDITIONS
Symbol VIH(1) VIH(1) VIL(2) Parameter Supply Voltage Commercial/Industrial/Military Supply Voltage Input High Voltage Commercial/Industrial Input High Voltage Military Input Voltage Commercial/Industrial/Military Operating Temperature Commercial Operating Temperature Industrial Operating Temperature Military Min. Typ. Max. Unit
TSTG IOUT
+125
+155
NOTE: 2679 Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
NOTES: RT/RS/XI input, 2.6V (commercial). RT/RS/XI input, 2.8V (military). 1.5V undershoots allowed 10ns once cycle.
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IDT7200L/7201LA/7202LA
ELECTRICAL CHARACTERISTICS
(Commercial: 10%, +70oC; Industrial: 10%, -40oC +85oC; Military: 10%, -55oC +125oC)
IDT7200L IDT7201LA IDT7202LA Com'l Ind'l(1) Min. Max. IDT7200L IDT7201LA IDT7202LA Military Min. Max.
Symbol ILI(2) ILO(3) ICC1(4,5,6) ICC2(4,7)
Parameter Input Leakage Current (Any Input) Output Leakage Current Output Logic Voltage -2mA Output Logic Voltage Active Power Supply Current Standby Current (R=W=RS=FL/RT=VIH)
Unit
NOTES: 2679 Industrial temperature range product speed grade available standard device. other speed grades available special order. Measurements with VCC. VIH, VOUT VCC. Tested with outputs open (IOUT Tested MHz. Typical ICC1 2*fS 0.02*CL*f with 25oC, WCLK frequency RCLK frequency MHz, using levels), data switching fS/2, capacitive load pF). Inputs 0.2V 0.2V.
CAPACITANCE +25oC, MHz)
Symbol COUT Parameter Input Capacitance Output Capacitance Condition VOUT Max. Unit
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NOTE: Characterized values, currently tested.
1.1K
TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load 3.0V 1.5V 1.5V Figure
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OUTPUT 30pF*
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equivalent circuit Figure Output Load Includes scope capacitances.
IDT7200L/7201LA/7202LA
ELECTRICAL CHARACTERISTICS(1)
(Commercial: 10%, +70oC; Industrial: 10%, -40oC +85oC; Military: 10%, -55oC +125oC)
Commercial 7200L12 7200L15 7201LA12 7201LA15 7202LA12 7202LA15 Min. Max. Min. Max. Com'l Mil. 7200L20 7201LA20 7202LA20 Min. Max. 33.3 Com'l Ind'l(2) 7200L25 7201LA25 7202LA25 Min. Max. 28.5 Military 7200L30 7201LA30 7202LA30 Min. Max. Com'l 7200L35 7201LA35 7202LA35 Min. Max. 22.2
Symbol tRPW tRLZ tWLZ tRHZ tWPW tRSC tRSS tRSR tRTC tRTS tRTR tEFL tHFH,FFH tRTF tREF tRFF tRPE tWEF tWFF tWHF tRHF tWPF tXOL tXOH tXIR tXIS Shift Frequency Read Cycle Time Access Time
Parameter
Unit
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Read Recovery Time Read Pulse Width(3) Read Pulse Data Z(4) Write Pulse High Data Z(4,5) Data Valid from Read Pulse High Read Pulse High Data High Z(4) Write Cycle Time Write Pulse Width(3) Write Recovery Time Data Set-up Time Data Hold Time Reset Cycle Time Reset Pulse Width(3) Reset Set-up Time(4) Reset Recovery Time Retransmit Cycle Time Retransmit Pulse Width(3) Retransmit Set-up Time
Retransmit Recovery Time Reset Empty Flag Reset Half-Full Full Flag High Retransmit Flags Valid Read Empty Flag Read High Full Flag High Read Pulse Width after High Write High Empty Flag High Write Full Flag Write Half-Full Flag Read High Half-Full Flag High Write Pulse Width after High Read/Write Read/Write High Pulse Width(3) Recovery Time Set-up Time
NOTES: Timings referenced Test Conditions. Industrial temperature range available special order speed grades faster than 25ns. Pulse widths less than minimum value allowed. Values guaranteed design, currently tested. Only applies read data flow-through mode.
IDT7200L/7201LA/7202LA
ELECTRICAL CHARACTERISTICS(1) (Continued)
(Commercial: 10%, +70oC; Industrial: 10%, -40oC +85oC; Military: 10%, -55oC +125oC)
Military 7200 7201LA40 7202LA40 Min. Max.
Symbol tRPW tRLZ tWLZ tRHZ tWPW tRSC tRSS tRSR tRTC tRTS tRTR tEFL tHFH,FFH tRTF tREF tRFF tRPE tWEF tWFF tWHF tRHF tWPF tXOL tXOH tXIR tXIS Shift Frequency
Parameter Read Cycle Time Access Time Read Recovery Time Read Pulse Width(3) Read Pulse Data Data Valid from Read Pulse High Read Pulse High Data High Write Cycle Time Write Pulse Width(3) Write Recovery Time Data Set-up Time Data Hold Time Reset Cycle Time Reset Pulse Width(3) Reset Set-up Time(4) Reset Recovery Time Retransmit Cycle Time Retransmit Pulse Width(3) Retransmit Set-up Time(4) Retransmit Recovery Time Reset Empty Flag Reset Half-Full Full Flag High Retransmit Flags Valid Read Empty Flag Read High Full Flag High Read Pulse Width after High Write High Empty Flag High Write Full Flag Write Half-Full Flag Read High Half-Full Flag High Write Pulse Width after High Read/Write Read/Write High Pulse Width Set-up Time
Com'l Mil. 7200L50 7201LA50 7202LA50 Min. Max.
7200L65 7201LA65 7202LA65 Min. Max. 12.5
Military(2) 7200L80 7201LA80 7202LA80 Min. Max.
7200L120 7201LA120 7202LA120 Min. Max.
Unit
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Write Pulse High Data Z(4,
Recovery Time
NOTES: Timings referenced Test Conditions Speed grades available CERPACK Pulse widths less than minimum value allowed. Values guaranteed design, currently tested. Only applies read data flow-through mode.
IDT7200L/7201LA/7202LA
Device Mode, this acts retransmit input. Single Device Mode initiated grounding Expansion (XI). IDT7200/7201A/7202A made retransmit data when Retransmit Enable control (RT) input pulsed LOW. retransmit operation will internal read pointer first location will affect write pointer. Read Enable Write Enable must HIGH state during retransmit. This feature useful when less than 256/512/1,024 writes performed between resets. retransmit feature compatible with Depth Expansion Mode will affect Half-Full Flag (HF), depending relative locations read write pointers. EXPANSION This input dual-purpose pin. Expansion (XI) grounded indicate operation single device mode. Expansion (XI) connected Expansion (XO) previous device Depth Expansion Daisy Chain Mode.
SIGNAL DESCRIPTIONS INPUTS:
DATA Data inputs 9-bit wide data.
CONTROLS:
RESET Reset accomplished whenever Reset (RS) input taken state. During reset, both internal read write pointers first location. reset required after power before write operation take place. Both Read Enable Write Enable inputs must HIGH state during window shown Figure (i.e., tRSS before rising edge should change until tRSR after rising edge Half-Full Flag will reset HIGH after Reset RS). WRITE ENABLE write cycle initiated falling edge this input Full Flag (FF) set. Data set-up hold times must adhered with respect rising edge Write Enable (W). Data stored array sequentially independently on-going read operation. After half memory filled falling edge next write operation, Half-Full Flag (HF) will will remain until difference between write pointer read pointer less than equal half total memory device. Half-Full Flag (HF) then reset rising edge read operation. prevent data overflow, Full Flag (FF) will LOW, inhibiting further write operations. Upon completion valid read operation, Full Flag (FF) will HIGH after tRFF, allowing valid write begin. When FIFO full, internal write pointer blocked from external changes will affect FIFO when full. READ ENABLE read cycle initiated falling edge Read Enable provided Empty Flag (EF) set. data accessed FirstIn/First-Out basis, independent ongoing write operations. After Read Enable goes HIGH, Data Outputs will return high impedance condition until next Read operation. When data been read from FIFO, Empty Flag (EF) will LOW, allowing "final" read cycle inhibiting further read operations with data outputs remaining high impedance state. Once valid write operation been accomplished, Empty Flag (EF) will HIGH after tWEF valid Read then begin. When FIFO empty, internal read pointer blocked from external changes will affect FIFO when empty. FIRST LOAD/RETRANSMIT FL/RT This dual-purpose input. Depth Expansion Mode, this grounded indicate that first loaded (see Operating Modes). Single
OUTPUTS:
FULL FLAG Full Flag (FF) will LOW, inhibiting further write operation, when write pointer location less than read pointer, indicating that device full. read pointer moved after Reset (RS), Full-Flag (FF) will after writes IDT7200, writes IDT7201A 1,024 writes IDT7202A. EMPTY FLAG Empty Flag (EF) will LOW, inhibiting further read operations, when read pointer equal write pointer, indicating that device empty. EXPANSION OUT/HALF-FULL FLAG XO/HF This dual-purpose output. single device mode, when Expansion (XI) grounded, this output acts indication half-full memory. After half memory filled falling edge next write operation, Half-Full Flag (HF) will will remain until difference between write pointer read pointer less than equal half total memory device. Half-Full Flag (HF) then reset using rising edge read operation. Depth Expansion Mode, Expansion (XI) connected Expansion (XO) previous device. This output acts signal next device Daisy Chain providing pulse next device when previous device reaches last location memory. DATA OUTPUTS Data outputs 9-bit wide data. This data high impedance condition whenever Read HIGH state.
IDT7200L/7201LA/7202LA
tRSC tRSS tRSS tEFL tHFH tFFH
NOTES: change status during Reset, flags will valid tRSC. around rising edge Figure Reset
tRSR
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tRLZ Q0-Q8 tWPW D0-D8
tRPW
DATA VALID
tRHZ DATA VALID
DATA VALID
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DATA VALID
Figure Asynchronous Write Read Operation
LAST WRITE
IGNORED WRITE
FIRST READ
ADDITIONAL READS
FIRST WRITE
tWFF
Figure Full Flag From Last Write First Read
tRFF
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IDT7200L/7201LA/7202LA
LAST READ IGNORED READ FIRST WRITE ADDITIONAL WRITES FIRST READ
tREF DATA VALID
Figure Empty Flag From Last Read First Write
tWEF
VALID
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tRTC tRTS tRTF
Figure Retransmit
tRTR
FLAG VALID
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tWEF
tRPE
Figure Minimum Timing Empty Flag Coincident Read Pulse
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tRFF
tWPF
Figure Minimum Timing Full Flag Coincident Write Pulse
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IDT7200L/7201LA/7202LA
tRHF
tWHF
HALF-FULL LESS MORE THAN HALF-FULL HALF-FULL LESS
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Figure Half-Full Flag Timing
WRITE LAST PHYSICAL LOCATION
tXOL tXOH
READ FROM LAST PHYSICAL LOCATION
tXOL
tXOH
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Figure Expansion
tXIS
WRITE FIRST PHYSICAL LOCATION
tXIR
tXIS
READ FROM FIRST PHYSICAL LOCATION
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Figure Expansion
OPERATING MODES:
Care must taken assure that appropriate flag monitored each system (i.e. monitored device where used; monitored device where used). additional information, refer Tech Note Operating FIFOs Full Empty Boundary Conditions Tech Note Designing with FIFOs. SINGLE DEVICE MODE single IDT7200/7201A/7202A used when application requirements 256/512/1,024 words less. These devices Single Device Configuration when Expansion (XI) control input grounded (see Figure 12). DEPTH EXPANSION IDT7200/7201A/7202A easily adapted applications when requirements greater than 256/512/1,024 words. Figure demonstrates Depth Expansion using three IDT7200/7201A/7202As.
depth attained adding additional IDT7200/7201A/7202As. These FIFOs operate Depth Expansion mode when following conditions met: first device must designated grounding First Load (FL) control input. other devices must have HIGH state. Expansion (XO) each device must tied Expansion (XI) next device. Figure External logic needed generate composite Full Flag (FF) Empty Flag (EF). This requires ORing ORing (i.e. must generate correct composite EF). Figure Retransmit (RT) function Half-Full Flag (HF) available Depth Expansion Mode. additional information, refer Tech Note Cascading FIFOs FIFO Modules.
IDT7200L/7201LA/7202LA
FIFO permits reading single word after writing word data into empty FIFO. data enabled (tWEF after rising edge called first write edge, remains until line raised from LOW-to-HIGH, after which would into three-state mode after tRHZ line would have pulse showing temporary deassertion then would asserted. write flow-through mode (Figure 18), FIFO permits writing single word data immediately after reading word data from full FIFO. line causes deasserted line being causes asserted again anticipation data word. rising edge word loaded FIFO. line must toggled when asserted write data FIFO increment write pointer. COMPOUND EXPANSION expansion techniques described above applied together straightforward manner achieve large FIFO arrays (see Figure 15).
USAGE MODES:
WIDTH EXPANSION Word width increased simply connecting corresponding input control signals multiple devices. Status flags (EF, detected from device. Figure demonstrates 18-bit word width using IDT7200/7201A/7202As. word width attained adding additional IDT7200/7201A/7202As (Figure 13). BIDIRECTIONAL OPERATION Applications which require data buffering between systems (each system capable Read Write operations) achieved pairing IDT7200/7201A/7202As shown Figure Both Depth Expansion Width Expansion used this mode. DATA FLOW-THROUGH types flow-through modes permitted, read flow-through write flow-through mode. read flow-through mode (Figure 17),
(HALF-FULL FLAG) WRITE DATA FULL FLAG (FF) RESET (RS)
(HF) READ 7200/ 7201A/ 7202A DATA EMPTY FLAG (EF) RETRANSMIT (RT)
EXPANSION (XI)
Figure Block Diagram Single 1,024 FIFO
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DATA WRITE FULL FLAG (FF) RESET (RS) 7200/ 7201A/ 7202A
7200/ 7201A/ 7202A
READ EMPTY FLAG (EF) RETRANSMIT (RT)
DATA
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Figure Block Diagram 1,024 FIFO Memory Used Width Expansion Mode
IDT7200L/7201LA/7202LA
TABLE IRESET RETRANSMIT
Single Device Configuration/Width Expansion Mode
Mode Reset Retransmit Read/Write
NOTE: Pointer will increment flag HIGH.
Inputs
Read Pointer Location Zero Location Zero Increment(1)
Internal Status Write Pointer Location Zero Unchanged Increment(1)
Outputs
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TABLE IIRESET FIRST LOAD TRUTH TABLE
Depth Expansion/Compound Expansion Mode
Mode Reset First Device Reset Other Devices Read/Write Inputs Read Pointer Location Zero Location Zero Internal Status Write Pointer Location Zero Location Zero Outputs
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NOTE: connected previous device. Figure Reset Input, FL/RT First Load/Retransmit, Empty Flag Output, Full Flag Output, Expansion Input, Half-Full Flag Output
7200/ 7201A/ 7202A FULL 7200/ 7201A/ 7202A 7200/ 7201A/ 7202A EMPTY
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Figure Block Diagram 1,536 3,072 FIFO Memory (Depth Expansion)
IDT7200L/7201LA/7202LA
Q0-Q8 Q0-Q8 IDT7200/ IDT7201A/ IDT7202A DEPTH EXPANSION BLOCK D0-D8 D0-DN D9-DN
NOTES: depth expansion block section Depth Expansion Figure Flag detection section Width Expansion Figure Figure Compound FIFO Expansion
Q9-Q17 Q9-Q17 IDT7200/ IDT7201A/ IDT7202A DEPTH EXPANSION BLOCK D9-D17 D18-DN D(N-8)-DN Q(N-8)-Qn Q(N-8)-Qn IDT7200/ IDT7201A/ IDT7202A DEPTH EXPANSION BLOCK D(N-8)-DN
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7200/ 7201A 7201A/ 7202A
SYSTEM
SYSTEM
7200/ 7201A/ 7202A
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Figure Bidirectional FIFO Mode
DATA tRPE tWLZ DATA
Figure Read Data Flow-Through Mode
tWEF
tREF DATA
VALID
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tRFF tWFF DATA DATA DATA
tWPF
DATA
VALID
VALID
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Figure Write Data Flow-Through Mode
ORDERING INFORMATION
XXXX Device Type Power Speed Package Process/ Temperature Range Blank
Commercial (0oC +70oC) Industrial (-40oC +85oC) Military (-55oC +125oC) Compliant MIL-STD-883, Class Plastic P28-1 Plastic Thin P28-2 CERDIP D28-1 Thin CERDIP D28-3 Plastic Leaded Chip Carrier PLCC J32-1 SOIC SO28-3 Leadless Chip Carrier L32-1 CERPACK E28-2 Commercial Only Commercial Only Commercial Military Commercial Industrial Military Only Commercial Only Military Only Commercial Military Military only-except package Power 9-Bit FIFO 9-Bit FIFO 1,024 9-Bit FIFO 9-Bit DUAL FIFO 9-Bit DUAL FIFO 1,024 9-Bit DUAL FIFO
(7201 7202 Only) (7201 7202 Only)
(7201 7202 Only) (7201 7202 Only)
Access Time (tA) Speed Nanoseconds
7200 7201 7202 7280 7281 7282
7280/7281/7282 data sheet details (3208.pdf)
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NOTES: Industrial temperature range available plastic packages special order speed grades faster than 25ns. included 7201 7202 ordering part number.
2975 Stender Santa Clara, 95054
800-345-7015 fax: 408-492-8674 www.idt.com
logo registered trademark Integrated Device Technology, Inc.

IDT7200L IDT7201LA IDT7202LA First-In/First-Out dual-port memory

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