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K3N7VU4000B-DC

64M-Bit (4Mx16) CMOS MASK ROM

K3N7V(U)4000B-DC
64M-Bit (4Mx16) CMOS MASK ROM
FEATURES
CMOS MASK ROM
GENERAL DESCRIPTION
The K3N7V(U)4000B-DC is a fully static mask programmable ROM organized 4, 194, 304x16 bit. It is fabricated using silicongate CMOS process technology. This device operates with 3.0V or 3.3V power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and data memory, character generator. The K3N7V(U)4000B-DC is packaged in a 42-DIP
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
X BUFFERS AND DECODER
MEMORY CELL MATRIX (4, 194, 304x16)
A18 A17 A7 A6
42 A19 41 A8 40 A9 39 A10 38 A11 37 A12 36 A13 35 A14 34 A15
Y BUFFERS AND DECODER
SENSE AMP. BUFFERS
A0 10 A21 11
33 A16 32 A20 31 VSS 30 Q15 29 Q7 28 Q14 27 Q6 26 Q13 25 Q5 24 Q12 23 Q4 22 VCC
CONTROL LOGIC
VSS 12 OE 13 Q0 Q8 Q1 14 15 16 17 18 19
Pin Name A0 - A21 Q0 - Q15 OE VCC VSS
Pin Function Address Inputs Data Outputs Output Enable Power Ground
Q9 Q2 Q10
Q3 20 Q11 21
K3N7V(U)4000B-DC
ABSOLUTE MAXIMUM RATINGS
Item Voltage on Any Pin Relative to V SS Temperature Under Bias Storage Temperature Symbol VIN TBIAS TSTG Rating
CMOS MASK ROM
Unit V °C °C
-0.3 to +4.5 -10 to +85 -55 to +150
NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Item Supply Voltage Supply Voltage Symbol VCC VSS Min 2.7 / 3.0 0 Typ 3.0 / 3.3 0 Max 3.3 / 3.6 0 Unit V V
DC CHARACTERISTICS
MODE SELECTION
OE H L Mode Operating Operating Data High-Z Q0~Q15 : Dout Power Active Active
K3N7V(U)4000B-DC
TEST CONDITIONS
Item Input Pulse Levels Input Rise and Fall Times Input and Output timing Levels Output Loads Value
CMOS MASK ROM
READ CYCLE
TIMING DIAGRAM
ADD A0~A21
ADD1 tRC
tDF(1) tOE OE tOH DOUT D0~D15 VALID DATA VALID DATA tAA
NOTES : 1. tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to V OH or VOL level.