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ARINC Interface Line Driver Circuit HS-3182 monolithic dielectric


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HS-3182
ARINC Interface Line Driver Circuit
HS-3182 monolithic dielectrically isolated bipolar differential line driver designed meet specifications ARINC 429. This Device intended used with companion chip, HS-3282 CMOS ARINC Interface Circuit, which provides data formatting processor interface function. logic inputs CMOS compatible. addition DATA DATA inputs, there also inputs CLOCK SYNC signals which AND'd with DATA inputs. This feature enhances system performance allows HS-3182 used with devices other than HS-3182. Three power supplies necessary operate HS-3182: +15V 10%, -15V 10%, VREF used program differential output voltage swing such that VOUT (DIFF) 2VREF Typically, VREF separate power supply used VREF which should exceed driver output impedance 25oC. Driver output rise fall times independently programmed through external capacitors connected inputs. Typical capacitor values 75pF high-speed operation (100KBPS), 300pF low-speed operation 14.5KBPS). outputs protected against over-voltage short circuit shown Block Diagram. HS-3182 designed operate with case temperature range -55oC +125oC, +70oC.
March 1997
Features
CMOS Compatible Inputs Adjustable Rise Fall Times External Capacitors Programmable Output Differential Voltage VREF Input Operates Data Rates Kilobits/Sec Output Short Circuit Proof Contains Over-Voltage Protection Outputs Inhibited Volts) DATA DATA Inputs Both "Logic One" State DATA DATA Signals "AND'd" with Clock Sync Signals Full Military Temperature Range
Ordering Information
PACKAGE SBDIP TEMPERATURE RANGE -40oC +85oC -55oC +125oC SMD# CLCC SMD# -55oC +125oC -55oC +125oC -55oC +125oC PART NUMBER HS1-3182-9+ HS1-3182-8 5962-8687901EA HS4-3182-8 5962-86879013A PKG. D16.3 D16.3 D16.3 J28.A J28.A
Pinouts
HS-3182 (SBDIP) VIEW
SYNC VREF SYNC DATA AOUT DATA BOUT DATA
HS-3182 (CLCC) VIEW
VREF DATA AOUT BOUT
TRUTH TABLE SYNC DATA DATA AOUT BOUT COMMENTS Null Null Null High Null
-VREF +VREF +VREF -VREF
CAUTION: These devices sensitive electrostatic discharge; follow proper Handling Procedures. 1-888-INTERSIL 321-724-7143 Intersil (and design) trademark Intersil Americas Inc. Copyright Intersil Americas Inc. 2002. Rights Reserved
FN2963.1
HS-3182 Block Diagram
OUTPUT DRIVER ROUT/2
DATA
LEVEL SHIFTER SLOPE CONTROL
AOUT
(14) CLOCK VREF SYNC (13) DATA LEVEL SHIFTER SLOPE CONTROL OUTPUT DRIVER ROUT/2 BOUT (11)
(16) CURRENT REGULATOR (12) OVER-VOLTAGE PROTECTION
Typical Application
NUMBERS INDICATED (16) (14) (12) AOUT HS-3182 ARINC DRIVER CIRCUIT 429D0 HS-3282 CMOS ARINC CIRCUIT 429D0 DATA (13) DATA LEAD BOUT (SEE NOTE) +15V
VREF CLOCK SYNC
NUMBER -15V
NOTE: rise fall time outputs ARINC specified values Typical 75pF high speed 300pF speed operation. output levels ARINC specifications VREF.
Intersil U.S. products manufactured, assembled tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications viewed www.intersil.com/design/quality
Intersil products sold description only. Intersil Corporation reserves right make changes circuit design, software and/or specifications time without notice. Accordingly, reader cautioned verify that data sheets current before placing orders. Information furnished Intersil believed accurate reliable. However, responsibility assumed Intersil subsidiaries use; infringements patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Intersil subsidiaries.
information regarding Intersil Corporation products, www.intersil.com
HS-3182
Absolute Maximum Ratings
Voltage Between Terminals VREF. Logic Input Voltage. -0.3V +0.3V Classification Class Output Short Circuit Duration Note Output Over-Voltage Protection Note
Thermal Information
Thermal Resistance (Typical) SBDIP Package. 75oC/W 18oC/W CLCC Package 60oC/W 14oC/W +150oC Storage Temperature Range .-65 Maximum Junction Temperature. +175oC Maximum Lead Temperature (Soldering 10s). +300oC
Recommended Operating Conditions
Operating Voltage .+15V -15V VREF (For ARINC 429) Operating Temperature Range HS-3182-5. .0oC +70oC HS-3182-8. -55oC +125oC NOTES:
Characteristics
Transistor Count
Heat sink required 100K bits/s +125oC output short circuit +125oC. fuses used output over-voltage protection blown fault each output greater than 6.5V relative GND.
CAUTION: Stresses above those listed "Absolute Maximum Ratings" cause permanent damage device. This stress only rating operation device these other conditions above those indicated operational sections this specification implied.
Electrical Performance Specifications
PARAMETER Supply Current (Operating) Supply Current (Operating) Supply Current (Operating) Supply Current VREF (Operating) Logic Input Voltage Logic Input Voltage Output Voltage High (Output GND) SYMBOL ICCOP (+V) ICCOP (-V) ICCOP (V1) ICCOP (VREF) Load (0-100K bits/s) (NOTE CONDITIONS Load (0-100K bits/s) Load (0-100K bits/s) Load (0-100K bits/s) Load (0-100K bits/s) -1.0 VREF (-250mV) (-250mV) -250 Short VREF (+250mV) -VREF (+250mV) +250 UNITS
Output Voltage (Output GND)
Load (0-100K bits/s)
Output Voltage Null Input Current (Input Low) Input Current (Input High) Output Short Circuit Current (Output High) Output Short Circuit Current (Output Low) Output Impedance NOTE:
VNULL IOHSC
Load (0-100K bits/s)
IOLSC
Short
+25oC
+15V 10%, -15V 10%, VREF unless otherwise specified +70oC HS-3182-5 -55oC +125oC HS-3182-8.
HS-3182
Electrical Performance Specifications
PARAMETER Rise Time (AOUT, BOUT) SYMBOL (NOTE CONDITIONS 75pF, Note -55oC Only) 300pF, Note Fall Time (AOUT, BOUT) 75pF, Note -55oC Only) 300pF, Note Propagation Delay Input Output Propagation Delay Input Output NOTES: +15V, -15V, VREF unless otherwise specified +70oC HS-3182-5 -55oC +125oC HS-3182-8. measured times load. measured times load. tPLH tPHL 75pF, Load 75pF, Load UNITS
Electrical Performance Specifications
PARAMETER Input Capacitance Supply Current (Short Circuit) Supply Current (Short Circuit) NOTE: parameters listed Table controlled design process parameters directly tested. These parameters characterized upon initial design after major process and/or design changes affecting these parameters. SYMBOL (+V) (-V) +25oC Short GND, +25oC Short GND, +25oC (NOTE CONDITIONS -150 UNITS
Power Specifications Nominal Power +25oC, +15V, -15V, VREF Notes
DATA RATE BITS/s) 0-100 12.5-14 NOTES: Heat sink required 100K bits/s +125oC output short circuit +125oC. Thermal characteristics: T(CASE) T(Junction) (Junction Case) P(Dissipation). Where: T(Junction Max) +175oC (Junction Case) 10.9oC/W (6.1oC/W LCC) (Junction Ambient) 73.5oC/W (54.0oC/W LCC) Full Load ARINC 429: 30,000pF parallel between AOUT (see block diagram). Output Over-Voltage Protection: fuses used output over-voltage protection blown fault each output greater than ±6.5V relative GND. Load Full Load, Note Full Load, Note LOAD 11mA 24mW 46mW V-10mA -24mW -46mW 600µA 600µA 600µA CHIP POWER 325mW 660mW Watt POWER DISSIPATION LOAD 60mW 325mW
HS-3182 Driver Waveforms
ADJ.
DATA
DATA VREF AOUT
+4.75V +5.25V
ADJ. tPHL BOUT -VREF tPLH 2VREF
-VREF VREF
-4.75V -5.25V
+4.75V +5.25V
-4.75V -5.25V HIGH +9.5V +10.5V
DIFFERENTIAL OUTPUT
AOUT BOUT
NULL
-2VREF
NOTE: OUTPUTS UNLOADED -9.5V -10.5V
NOTES: measured times measured times -4.75V -5.25V 4.75V 5.25V
When Data input Logic state Data input Logic Zero state, AOUT equal VREF BOUT equal -VREF This constitutes Output High state. Data Data both Logic Zero state causes both AOUT equal which designates output Null state. Data Logic Zero state Data Logic state causes AOUT equal -VREF BOUT equal which Output state.
Burn-In Schematic
DATA HS-3182
DATA
NOTES: 0.03µF 500pF, +15.5V 0.5V -15.5V 0.5V +5.5V 0.5V 0.0µF decoupling capacitor required each three supply lines (+V, every Burn-In socket.
Ambient Temp. Max. +125oC. Package Lead Side Brazed DIP. Pulse Conditions 6.25kHz 10%. delayed one-half cycle sync with 2.0V Min. 0.5V Max.

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