ES1869 AudioDrive® solution mixed-signal single chip that adds 16-bit
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ES1869 AudioDrive® Solution Data Sheet
ES1869 AudioDrive® solution mixed-signal single chip that adds 16-bit stereo sound music synthesis personal computers. compliant with Microsoft® specifications WHQL audio requirements. ES1869 possesses embedded microcontroller, OPL3superset ESFMmusic synthesizer, 16-bit stereo wave DAC, 16bit stereo music DAC, MPU-401 UART serial port, dual game port, full Plug Play support, CD-ROM interface, hardware master volume control, serial port interfaces external external wavetable music synthesizer, Zoom Video interface, control logic with FIFO, interface logic. There three stereo inputs (typically line, audio, auxiliary line) mono microphone input. this single chip that designed into motherboard, add-on card, integrated into other peripheral cards such Fax/ Modem, VGA, LAN, I/O, etc. ES1869 AudioDrive® solution record, compress, play back voice, sound, music with built-in mixer controls. supports full-duplex operation simultaneous record playback using channels. ESFMsynthesizer extended capabilities within native mode operation providing superior sound power-down capabilities. register compatible superset OPL3 synthesizer. ES1869 AudioDrive® solution supports full Plug Play standard. provides Plug Play configuration logical devices: audio, ESFMsynthesizer, game port, MPU-401, CD-ROM IDE, Modem, additional userdefined device. MPU-401 serial port interfacing external MIDI device. ES1869 also incorporates Spatializer® VBXtechnology, provided Desper Products, Inc., subsidiary Spatializer Audio Laboratories, Inc. This processor expands stereo sound field emitted speakers create resonant sound environment. speakerphone application implemented either digital interface through serial port, analog interface through Mono-In Mono-Out. serial interface ES1869 allows external take over resources. ES1869 AudioDrive® solution supports telegaming architecture with headsets includes data paths host-based Acoustic Echo Cancellation processing.
Advanced power management features include suspend/ resume from disk host-independent self-timed powerdown automatic wake-up. ES1869 compliant ACPI standard. available industry-standard 100-pin Plastic Quad Flat Pack (PQFP) Thin Quad Flat Pack (TQFP) packages.
FEATURES
Single, high-performance, mixed-signal, 16-bit stereo
VLSI chip
High-quality, OPL3 superset ESFMmusic synthesizer CD-ROM interface High-performance supports Demand Transfer
F-type
Integrated Spatializer® VBXstereo audio effects
technology provided Desper Products, Inc., subsidiary Spatializer Audio Laboratories, Inc. Plug Play Features On-chip Plug Play support audio, joystick port, Modem, MPU-401, CD-ROM, user-defined device
Software address mapping with software chip select, plus
selections motherboard implementation
Internal configuration data audio Plug Play
support
Serial interface Plug Play resource EEPROM
Record Playback Features Record, compress, play back voice, sound, music
16-bit stereo Programmable independent sample rates from
48.0 record playback
Full-Duplex operation simultaneous record
playback
3-button hardware volume control down,
mute Inputs Outputs Stereo inputs line-in, auxiliary audio), auxiliary mono input microphone
MPU-401 (UART mode) interface wavetable
synthesizers MIDI devices
SAM0023-122898
ES1869 DATA SHEET FEATURES
Integrated dual game port Zoom Video port interface with sample rate
MPEG audio
Supports operation
Compatibility Supports games applications Sound Blasterand Sound BlasterPro
Serial port interface external (e.g. AT&T, API,
MWAVE)
Separate mono input (MONO_IN) mono output
(MONO_OUT_) telegaming Mixer Features 7-channel mixer with stereo inputs line, audio, auxiliary line, music synthesizer, digital audio (wave files), mono inputs microphone speakerphone
Supports Microsoft WindowsSound System® Meets WHQL specifications
Operating Systems Microsoft Windows®95 Windows®98
Microsoft Windows3.1 Windows
Workgroups
Programmable 6-bit logarithmic master volume control
Power Advanced power management with self-timed powerdown, automatic wake-up, suspend/resume from disk
Windows Sound System Microsoft Windows NT4.0 IBM® OS/2® Warp
ES1869
78L05 Regulator VDDD GNDD RESET VDDA GNDA AUXA_L AUXA_R AUXB_L AUXB_R LINE_L LINE_R CAP3D FOUT_L CIN_L FOUT_R CIN_R AOUT_L AOUT_R Left Right AuxB Left AuxB Right Line Left Line Right
IRQ9 IRQ5 IRQ7 IRQ10 IRQ11 IRQ12 DRQ0 DRQ1 DRQ3 DRQ5 -DACK0 -DACK1 -DACK3 -DACK5
IRQA IRQB IRQC IRQD IRQE IRQF DRQA DRQB DRQC DRQD DACKBA DACKBB DACKBC DACKBD A[11:0]
Stereo Amplifier
A[15:12] LS138 D[7:0] IORB IOWB
93LC66 (EEPROM) Mute Down
VOLUP/SEDI VOLDN/SEDO MUTE /SECLK SECS/PSEL MODE MCLK MMIRQ MMCSB MMIEB DB155 Modem Circuit
14.31818 RSTB CDIRQ CDCSB0 CDCSB1
Connector
Interface
Figure Typical Application SAM0023-122898
ES1869 DATA SHEET CONTENTS
CONTENTS
DESCRIPTION FEATURES PINOUT DESCRIPTION FUNCTIONAL DESCRIPTION Digital Subsystems Analog Subsystems MIXER SCHEMATIC BLOCK DIAGRAM INTERFACING DIGITAL AUDIO Programming Transfers Data Formats Transfers Compatibility Mode Transfers Extended Mode Data Transfers Using Second Audio Channel External Sharing with Audio Latch Feature First Channel CODEC INTERRUPTS Interrupt Status Register Interrupt Mask Register Sharing Interrupts PERIPHERAL INTERFACING Serial Interface Serial Interface Timing Wavetable Interface Interface Operating Modes Serial Data Format Modem Interface Modem Operating Modes CD-ROM Interface General-Purpose Device Joystick MPU-401 Interface MPU-401 UART Mode Joystick MIDI External Interface Serial EEPROM Interface EEPROM Format MONO_IN MONO_OUT Spatializer® VBXAudio Processor Hardware Master Volume Control Speaker Speaker Volume Control ANALOG DESIGN CONSIDERATIONS Game Port Reference Generator Switch-Capacitor Filter Audio Inputs Outputs CONFIGURATION REGISTERS Access Registers Configuration Ports Bypass Card-Control Card-Level Registers (00h-07h) Vendor-Defined Card-Level Registers (20h-29h) Logical Device Registers Configuration Device Audio Device Joystick Device MPU-401 Device Technology, Inc. CD-ROM Device Modem Device General-Purpose Device PORTS Port Summary Port Descriptions Configuration Device Audio Device Device MPU-401 Device Joystick Device PROGRAMMING ES1869 Identifying ES1869 Resetting ES1869 Software Modes Operation Compatibility Mode Description Extended Mode Description Mixing Modes Recommended Data Formats Compressed Data Formats Sound Blaster Compatible Data Formats Stereo Transfers Compatibility Mode ES1869 Data Formats (Extended Mode Audio Sending Commands During Operations Compatibility Mode Programming Compatibility Mode Operation Compatibility Mode Operation Extended Mode Programming Commanding ES1869 Controller Registers ES1869 Command/Data Handshaking Protocol Extended Mode Audio Operation Extended Mode Audio Operation Extended Mode Programmed Operation Second Audio Channel Operation Programming ES1869 Mixer Writing Reading Data from Mixer Registers Resetting Mixer Registers Extended Access Mixer Volume Controls Extended Access Volume Extended Access Source Select Sound Blaster Volume Emulation Record Playback Mixer REGISTERS Register Types Types Register Access Mixer Registers Controller Registers Controller Register Descriptions AUDIO MICROCONTROLLER COMMAND SUMMARY POWER MANAGEMENT Overview Partial Power-Down Causing Partial Power-Down Waking from Partial Power-Down Full Power-Down Waking from Full Power-Down Inputs Outputs During Power-Down Suspend/Resume SAM0023-122898
ES1869 DATA SHEET TABLES
Prevention External Amplifier Power Management Synthesizer Self-Timed Power-Down Enabling Self-Timed Power-Down General-Purpose Outputs Power-Down ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Thermal Characteristics Operating Conditions Operating Current TIMING DIAGRAMS TIMING CHARACTERISTICS MECHANICAL DIMENSIONS FIGURESFigure Typical Application Figure ES1869F Pinout (PQFP Package) Figure ES1869S Pinout (TQFP Package) Figure ES1869 Block Diagram Figure ES1869 Mixer Schematic Block Diagram Figure Data Transfer Modes Figure Latch Figure Implementation ES1869 Figure Telegaming Mode Figure Default Mode Figure 16-Bit Data, Positive Sync Pulse Figure Speakerphone Modem Voice-Over-Data Figure Interface Typical Application Figure Dual Joystick/MIDI Connector Figure MIDI Serial Interface Figure Serial EEPROM Typical Application Figure Speaker Volume Circuitry Figure Reference Generator Diagram Figure Switch-Capacitor Filter Diagram Figure Configuration Register Figure Command Transfer Timing Figure Summary Power States ES1869 Figure Reset Timing Figure Read Cycle Figure Write Cycle
ES1869F PQFP Package ES1869S TQFP Package APPENDIX ES1869 DATA EXAMPLE APPENDIX ES689/ES69X DIGITAL SERIAL INTERFACE APPENDIX INTERFACE REFERENCE APPENDIX MOTHERBOARD SCHEMATICS APPENDIX MOTHERBOARD BILL MATERIALS APPENDIX SOUND CARD SCHEMATICS APPENDIX SOUND CARD BILL MATERIALS APPENDIX LAYOUT GUIDELINES
Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure
Compatibility Mode Write Cycle Compatibility Mode Read Cycle Miscellaneous Output Signals Serial Mode Receive Operation Serial Mode Transmit Operation Serial Input Timing Interface Digital Input Format with SCLK Periods ES1869F PQFP Mechanical Dimensions ES1869S TQFP Mechanical Dimensions Example Port Implementation Typical Port Audio Implementation Audio Interface Timing Digital Input Format with SCLK periods ES1869 Motherboard Configuration ES1869 ES692 Motherboard Configuration Amplifier Motherboard Configuration Interface Motherboard Configuration ES1869 Sound Card Configuration ES1869 ES692 Sound Card Configuration Amplifier Sound Card Configuration Interface Sound Card Configuration Analog Components Side Analog Components Both Sides
TABLES
Table Interface Pins Table Extended Mode Audio Controller Registers Table Audio Related Mixer Registers Table ES1869 Interrupt Sources Table Interrupt Status Bits Config_Base+6h Table Interface Pins Table Wavetable Interface Pins Table Interface Pins Table External Modem Interface Pins Table CD-ROM Interface Pins Table Logical Device Summary Table Ports Configuration, Audio, MPU-401, Joystick Devices Table Comparison Operation Modes Table Uncompressed Transfer Modes Table Uncompressed Transfer Modes Table Command Sequences Playback Table Command Sequence Record Table Sound Blaster Pro/Extended Access Registers SAM0023-122898 Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Read Volume Emulation Write Volume Emulation Extended Access Mixer Volume Values Mixer Input Volume Registers Sound Blaster Compatibility Register Summary Mixer Registers Summary Controller Registers Summary Command Summary Digital Characteristics Analog Characteristics Timing Characteristics Common Clock Frequencies Parameters Audio Signals Port Interface Assignments ES1869 Motherboard Bill Materials (BOM) ES1869 Sound Card Bill Materials (BOM)
ES1869 DATA SHEET PINOUT
PINOUT
VDDD GNDD IOWB IORB IRQA IRQB IRQC IRQD IRQE IRQF DACKBA DRQA DACKBB DRQB DACKBC DRQC DACKBD IISCLK DRQD IISDATA MODE VDDD GPO0 GPCS MMCSB IISLR MMIRQ PCSPKI MMIEB PCSPKO GNDD AOUT_R RESET DCLK MCLK RSTB GPO1 GPDACK GPDRQ GPIRQ CDIRQ CDCSB0 CDCSB1 CDENBL
ES1869F
AOUT_L LINE_R LINE_L CIN_R CIN_L FOUT_L FOUT_R VDDA CAP3D GNDA AUXA_R AUXA_L AUXB_R AUXB_L
IOWB GNDD VDDD RESET DCLK MCLK RSTB GPO1 GPDACK GPDRQ GPIRQ CDIRQ CDCSB0 CDCSB1 CDENBL
IORB IRQA IRQB IRQC IRQD IRQE IRQF DACKBA DRQA DACKBB DRQB DACKBC DRQC DACKBD IISCLK DRQD IISDATA MODE VDDD GPO0 GPCS MMCSB IISLR MMIRQ PCSPKI MMIEB PCSPKO GNDD AOUT_R
VDDD GNDD SECS PSEL VOLDN SEDO VOLUP SEDI MUTE SECLK GNDD MONO_OUT
VDDD GNDD SECS PSEL VOLDN SEDO VOLUP SEDI MUTE SECLK GNDD MONO_OUT MONO_IN
Figure ES1869F Pinout (PQFP Package)
ES1869S
AOUT_L LINE_R LINE_L CIN_R CIN_L FOUT_L FOUT_R VDDA CAP3D GNDA AUXA_R AUXA_L AUXB_R AUXB_L MONO_IN
Figure ES1869S Pinout (TQFP Package) SAM0023-122898
ES1869 DATA SHEET
Name A[11:0] VDDD GNDD D[7:0] PSEL SECS SEDO VOLDN SEDI VOLUP MUTE SECLK MONO_OUT MONO_IN T(A-D) SW(A-D) AUXB_L AUXB_R AUXA_L AUXA_R GNDA CAP3D VDDA FOUT_R Number 99,100,1,2,6:4, 10:8,97,98 3,57,80 7,24,52,77 19:12 Description Address inputs from bus. Digital supply voltage 10%). Digital ground. Active-low address enable from bus.
bidirectional data bus. Selects device used: Internal 93LC66 address bits
Serial EEPROM This input during RESET. Input connected data output external serial EEPROM. Active-low volume decrease button input with internal pull-up (shared with SEDO pin). Output connected data input external serial EEPROM. Active-low volume increase button input with internal pull-up (shared with SEDI pin). Active-low mute toggle button input with internal pull-up (shared with SECLK pin). External serial EEPROM clock output PnP. Mono output with source select volume control (including mute). This drive external load. Mono input mixer ADC. This internal pull-up CMR.
27:30 31:34
Joystick timer pins. These pins connect positioning variable resistors joysticks. Active-low joystick switch setting inputs. These pins have internal pull-up resistor. joystick port typically address 201h. Auxiliary input left. AUXB_L internal pull-up resistor CMR. Normally intended connection external music synthesizer other line-level source. Auxiliary input right. AUXB_R internal pull-up resistor CMR. Normally intended connection external music synthesizer other line-level source. Auxiliary input left. AUXA_L internal pull-up resistor CMR. Normally intended connection internal external CD-ROM analog output. Auxiliary input right. AUXA_R internal pull-up resistor CMR. Normally intended connection internal external CD-ROM analog output. Common mode buffered reference output (2.25 5%). This should bypassed analog ground with electrolytic capacitor with capacitor parallel. Microphone input. internal pull-up resistor CMR. Analog ground. Bypass capacitor analog ground effects. Analog supply voltage 5%). Must greater than equal VDDD Filter output right. FOUT_R AC-coupled externally CIN_R remove offsets. This output internal series resistor about ohms. capacitor analog ground this used create low-pass filter pole that removes switching noise introduced switched-capacitor filter.
SAM0023-122898
ES1869 DATA SHEET
Name FOUT_L
Number
Description Filter output left. FOUT_L AC-coupled externally CIN_L remove offsets. This output internal series resistor about ohms. capacitor analog ground this used create low-pass filter pole that removes switching noise introduced switched-capacitor filter. Capacitive coupled input left. CIN_L internal pull-up resistor approximately ohms. Capacitive coupled input right. CIN_R internal pull-up resistor approximately ohms. Line input left. LINE_L internal pull-up resistor CMR. Line input right. LINE_R internal pull-up resistor CMR. Line-level stereo output left. AOUT_L drive load. Line-level stereo output right. AOUT_R drive load. Modem interrupt enable active-low input. Generated from modem UART. speaker analog output. Modem interrupt request active-high input. input from modem device gets mapped output ES1869 based configuration. Normally digital speaker input. This signal converted analog signal with volume control appears analog output PCSPKO. Left/right strobe interface. This pull-down. Output from ES1869 modem CSB. address space determined configuration. selected logic, GPCS active-high user-defined chip select external general-purpose device. Output that external reset thereafter controlled port Audio_Base+7h. Available system software power management other applications. MIDI serial data output. MIDI serial data input. Schmitt trigger input with internal pull-up resistor. Either MPU-401 Sound Blaster formats. Mode function pin. Connect either GNDD VDDD select function groups multiple function pins (indicated superscript Tri-state output. Optional 16-bit request interface. Serial data interface. This pull-down. Optional 16-bit acknowledge interface. Serial shift clock interface. This pull-down. Three (A,B,C) active-high requests bus. Unselected outputs high impedance. When active, selected output pull-down device that holds line inactive unless another device that shares same line source enough current make line active. DRQs software configurable. Three (A,B,C) active-low acknowledge inputs. (A,B,C,D,E,F) active-high interrupt requests bus. Unselected outputs high impedance. IRQs software configurable. Active-low read strobe from bus. Active-low write strobe from bus. Crystal oscillator/external clock input. Connect external 14.318 crystal clock source with CMOS levels.
CIN_L CIN_R LINE_L LINE_R AOUT_L AOUT_R MMIEB PCSPKO MMIRQ
PCSPKI IISLR MMCSB GPCS GPO0 MODE DRQD IISDATA DACKBD IISCLK
67,65,63
DRQ(A-C)
DACKB(A-C) IRQ(A-F) IORB IOWB
68,66,64 69:74
SAM0023-122898
ES1869 DATA SHEET
Name RESET DCLK MCLK
Number
Description Crystal oscillator output. Connect external 14.318 crystal. Active-high reset from bus. Input with internal pull-down. Frame sync receive data from external DSP. Programmable active-high active-low. Input with internal pull-down. Frame sync transmit request from external DSP. Programmable active-high active-low. Input with internal pull-down. Serial data clock from external DSP. Typically 2.048 MHz. Input with internal pull-down. Data receive from external DSP. Tri-state output. Data transmit external DSP. High impedance when transmitting. Input with internal pull-down. Music serial data from external ES689/ES69x wavetable music synthesizer. Input with internal pull-down. Music serial clock from external ES689/ES69x wavetable music synthesizer. Input with internal pull-down. Active-high enable serial mode, that enables external control analog resources ES1869 through serial interface. This logically OR'd internally with mixer register 48h. Inverted RESET output. Active-low acknowledge output general-purpose device that uses DMA. Output that high external reset thereafter controlled port Audio_Base+7h. Available system software power management other applications. request output from general-purpose device based configuration. General-purpose input option. Interrupt request output from general-purpose device based configuration. Address input from bus. Interrupt request input from interface. Address input from bus. Active-low interface chip select Address input from bus. Active-low interface chip select Address input from bus. Active-low data transceiver enable.
RSTB GPDACK GPO1 GPDRQ GPIRQ
CDIRQ
CDCSB0
CDCSB1
CDENBL
Pins enabled MODE (pin 60). Pins enabled MODE (pin 60).
SAM0023-122898
ES1869 DATA SHEET FUNCTIONAL
FUNCTIONAL This section shows overall structure ES1869 discusses major functional subunits. major subunits ES1869 shown Figure described briefly following paragraphs.
GNDD VDDD AUXB LINE AUXA
MIXER SOURCE
FOUT
PCSPKI VOL. CTRL.
PREAMP
RECORD SOURCE VOLUME CONTROL
FILTER
GENERAL PURPOSE
1-BIT
PCSPKO
A[15:0] D[7:0] 16-BIT STEREO CODEC FIFO INTERFACE REGISTER FIFO IRQ(A-F) DRQ(A-C) DACKB(A-C) IOWB IORB RESET RSTB CONTROL MODE
RECORD
GNDA
MIXER
VDDA 16-BIT STEREO
PLAYBACK MIXER
MICROCONTROLLER
SER. PORT DCLK
CAP3D AOUT VOLUP VOLDN MUTE MASTER CTRL
3-D** 16-BIT STEREO SERIAL PORT
ESFM
ES689/ES69x SER. PORT
MPU-401 SER. PORT
DUAL-GAME SER. PORT
OSCILLATOR
MONO IN/OUT
IILR IISCLK IIDATA
MCLK
SW(A-D)
T(A-D)
Some these pins shared with other functions. Processor uses Spatializer VBX3-D technology provided Desper Products, Inc., subsidiary Spatializer Audio Laboratories, Inc.
Figure ES1869 Block Diagram
SAM0023-122898
ES1869 DATA SHEET FUNCTIONAL
Digital Subsystems RISC microcontroller game-compatible audio
functions performed embedded microcontroller.
Analog Subsystems Record Playback Mixers seven input stereo
mixers. Each input independent left right 4-bit volume control: Line (CD-audio) FDXI) Digitized audio (wave files) ES689/ES69x music MONO_IN/MONO_OUT
Oscillator circuitry support external crystal. firmware data
embedded microcontroller.
FIFO 256-byte FIFO data buffer with
first audio channel 64-byte FIFO data buffer with second audio channel.
interface provides interface
address, data, control signals.
Dual game port integrated dual game port
joysticks.
16-Bit stereo CODEC audio record playback
first audio channel.
MPU-401 serial port asynchronous serial port MIDI
devices such wavetable synthesizer music keyboard input.
16-Bit stereo system audio playback
second audio channel.
Wavetable serial port serial port connection from
output ES689 ES69x that eliminates requirements external DAC.
16-Bit stereo music ESFMTM, external
wavetable synthesizer, MPEG audio.
serial port interface optional external
control CODEC.
1-Bit speaker digital input. Processor processor using Spatializer®
VBXstereo audio effects technology, provided Desper Products, Inc., subsidiary Spatializer Audio Laboratories, Inc.
Zoom Video interface supports sample rates
MPEG audio.
ESFM music synthesizer high-quality, OPL3 superset
synthesizer with voices.
Record source input volume control input
source volume control recording. recording source selected from four choices: Line (CD-audio) Mixer (playback record)
Hardware volume control pushbutton inputs with
internal pull-up devices up/down/mute that used adjust master volume control. software-selectable option allows mute input omitted. mute input defined state when both down inputs low. default, this feature disabled.
Mixer source determines which mixer used
record source, either playback record mixer.
Output volume mute control master volume
controlled either programmed volume control switch inputs. master volume supports bits channel plus mute.
Reference generator analog reference voltage
generator.
speaker volume control speaker
supported with 1-bit with volume control. analog output PCSPKO intended externally mixed external amplifier.
Filter switched capacitor low-pass filter. General purpose outputs available system
software power management other applications.
Pre-amp microphone pre-amplifier.
SAM0023-122898
ES1869 DATA SHEET MIXER SCHEMATIC BLOCK DIAGRAM
MIXER SCHEMATIC BLOCK DIAGRAM
ADC/DAC
Output Volume
digital audio
digital audio Preamp
LINE HWWT Mono_In AUXA AUXB
Record Monitor Record Source Master Volume
Playback Mixer
AOUT
Record Mixer
Input Volume
Figure ES1869 Mixer Schematic Block Diagram
SAM0023-122898
ES1869 DATA SHEET INTERFACING
INTERFACING
This section discusses interfacing bus, items relating configuration bus. Table Interface Pins
Pins A[15:12] A[11:0] D[7:0] DRQD DACKBD DRQ(A-C) Descriptions Dual-purpose pins. A[15:12] address inputs. address inputs. active-low address enable. bidirectional data bus. Dual-purpose pin. DRQD tri-state output. Optional 16-bit request interface. Dual-purpose pin. DACKBD optional 16-bit acknowledge interface. Three active-high requests bus. Unselected outputs high-impedance. When active, selected output pull-down device that holds line inactive unless another device that shares same line source enough current make line active. DRQs software configurable. active-high interrupt requests bus. Unselected outputs high-impedance. IRQs software configurable. active-low read strobe. active-low write strobe. Active-high. Reset from bus.
Table shows pins used interface ES1869 bus.
DACKB(A-C) Three active-low acknowledge inputs. IRQ(A-F) IORB IOWB RESET
SAM0023-122898
ES1869 DATA SHEET DIGITAL AUDIO
DIGITAL AUDIO
ES1869 incorporates digital audio channels. There three sources requests three targets acknowledge: Audio first audio channel. This channel used Sound Blaster compatible DMA, Extended mode DMA, programmed I/O. used either record playback. Ideally, this channel should assigned channel Audio second audio channel. This channel used audio playback full-duplex mode. This channel mapped three 8-bit channels: 0,1, External GPO1 assigned acknowledge output, used request input from external device; either CD-ROM, Modem, general-purpose device. This channel mapped four DRQ/DACK pairs. three sources mapped four pairs Plug Play (PnP) registers. Also, four pairs assigned channel numbers Vendor-Defined Card-Level registers 24h. least four pairs must assigned 8-bit channels (0,1, other four pairs assigned 16-bit channels external source. order output driving opposed high-impedance), conditions must met: enable different transfers vary depending which channel which mode (Compatibility Extended) used. biggest difference available data transfer modes between audio channel audio channel This illustrated Figure Audio only allows mode. Audio allows Direct mode mode when using Compatibility mode, programmed mode when using Extended mode.
Data Formats
"Data Formats" page Transfers Compatibility Mode first audio channel programmed using standard Sound Blaster compatible commands. These commands written chip through port Audio_Base+Ch. When programming first audio channel transfers, following modes used:
Direct mode modes
Normal Auto-Initialize addition, both Normal mode AutoInitialize mode special High-Speed mode.
Direct Mode
register given device must
match channel number pin.
given device must activated; that
register must high. Digital Audio
Audio Audio External
Direct mode, timing transfers handled application program. example, system timer reprogrammed generate interrupts desired sample rate. each system timer interrupt, command 10h, 11h, 20h, issued followed sample. Polling Write-Buffer-Available flag (Audio_Base+Ch [bit required before writing command between writing command data. NOTE: switched capacitor filter initialized reset intended sample rate kHz. Direct mode, application wish adjust this filter appropriate actual sample rate. this programming timer with command just application were using mode.
Modes
Compatibility Mode
Extended Mode
Direct Mode
Mode
Programmed
Mode Mode
Figure Data Transfer Modes
Programming Transfers
Programming data transfers complicated with ES1869. Both Compatibility Extended modes offer variety modes conducting transfers. commands
mode, programmable timer ES1869 controls rate which samples sent CODEC. timer programmed using command 40h, which also sets programmable filters inside ES1869. ES1869 firmware maintains internal FIFO levels 16-bit transfers, levels 8-bit transfers) that filled transfers emptied timed transfers DAC.
SAM0023-122898
ES1869 DATA SHEET DIGITAL AUDIO
Before transfer, application first programs controller desired transfer size address, then programs ES1869 with same size information. transfer, ES1869 generates interrupt request, indicating that current block transfer complete. FIFO gives application program sufficient time respond interrupt initiate next block transfer. ES1869 supports both Normal mode AutoInitialize mode. Normal Mode Normal mode transfers, controller must initialized ES1869 commanded every block that transferred. Auto-Initialize Mode Auto-Initialize mode, transfer continuous, circular buffer, ES1869 generates interrupt transition between buffer halves. this mode controller ES1869 only need once. High-Speed Mode ES1869 supports mono 8-bit transfers rate kHz. Mono 16-bit transfers supported rate kHz. special "High-Speed mode" allows 8-bit sampling ADC, using commands (auto-initialize) (normal). automatic gain control (AGC) performed. input volume controlled with command DDh. Transfers Extended Mode first audio channel programmed using controller registers internal ES1869. commands written controller registers written chip through port Audio_Base+Ch. When programming first audio channel transfers, following modes used:
80x86 family transfers data from memory port specified register. INSB instruction complementary function. ES1869 port Audio_Base+Fh block transfers. transfers FIFO nearly identical process, except that access port Audio_Base+Fh replaces cycle. details about programmed operation "Extended Mode Programmed Operation" page
Modes
Extended mode supports both Normal Auto-Initialize mode. addition Normal mode Auto-Initialize mode both support Single Demand transfer modes. Single Transfer byte transferred request. Demand Transfer reduce number requests necessary make transfer, four bytes transferred request (DRQ). Using Demand transfer enables multiple acknowledges each request. description mode including Normal mode Auto-Initialize mode "DMA Modes" page
Extended Mode Audio Controller Registers
following registers control operation first audio channel Extended mode: Table Extended Mode Audio Controller Registers
Address Name
Audio Sample Rate Generator register Audio Filter Clock Divider register Audio Transfer Count Reload register byte Audio Transfer Count Reload register high byte Legacy Audio Interrupt Control register Audio Control register Input Volume Control register Audio Direct Access register byte Audio Direct Access register high byte Audio Control register Audio Control register Audio Transfer Type register
Programmed modes
Normal (Single Demand transfer) Auto-Initialize (Single Demand transfer) addition, both normal mode autoinitialize mode Single transfer Demand transfer modes.
Programmed
some applications, mode suitable available data transfer, possible take exclusive control system transfers. these situations, block transfers within interrupt handler. OUTSB instruction
SAM0023-122898
Data Transfers Using Second Audio Channel second audio channel programmed using mixer registers through 7Dh. commands written mixer registers written chip through ports Audio_Base+4h Audio_Base+5h.
ES1869 DATA SHEET DIGITAL AUDIO
mode used when programming second audio channel transfers:
Latch Feature
latching enabled when VendorDefined Card-Level register high. this feature enabled, each four audio DRQs latched high until following occurs:
modes
Normal (Single Demand transfer) Auto-Initialize (Single Demand transfer) addition, both Normal mode AutoInitialize mode Single Demand transfer modes.
Modes
DACK pulse occurs while goes
DACK pulse.
under second audio channel supports both Normal Auto-Initialize mode. addition, Normal mode Auto-Initialize mode both support Single Demand transfer modes. description mode including Normal mode Auto-Initialize mode, "DMA Modes" page description Single Demand transfer modes, "DMA Modes" page
Audio Related Mixer Registers
hardware reset occurs. 8-16 milliseconds elapse while low.
-DACK -RESET Figure Latch
following registers control operations second audio channel: Table Audio Related Mixer Registers
Address Name
Audio Sample Rate register Audio Mode register Audio Filter Clock Rate register Audio Transfer Count Reload register byte Audio Transfer Count Reload register high byte Audio Control register Audio Control register Audio Volume Control register
First Channel CODEC
CODEC first audio channel cannot perform stereo simultaneously. either stereo DAC, stereo ADC, mono CODEC. After reset, CODEC operations. command causes switch "direction," subsequent command switches converter back "direction." output filtered sent mixer. After reset, input mixer from first audio channel muted prevent pops. ES1869 maintains status flag determine input mixer from first audio channel enabled disabled. Command returns status flag (0h=disabled FFh=enabled). command enable input mixer from first audio channel command disable input. play sound without resetting beforehand, when status analog circuits clear, mute input mixer with command D3h, then direction level using direct-to-DAC command: Wait milliseconds analog circuitry settle before enabling voice channel with command D1h.
External Sharing with Audio
possible external device share channel with audio they operate same time, respective Windows drivers communicate with each other. this case, external device does request audio channel resource data. Instead, Windows driver writes register appropriate device assign same channel audio channels. Bits Vendor-Defined Card-Level register used mask three sources (audio audio external). masking when channels shared sure that only device access given channel time.
SAM0023-122898
ES1869 DATA SHEET DIGITAL AUDIO
sounds still occur level left value other than mid-level (code 8-bit scale) previous play operation. prevent this, always finish transfer with command level mid-range:
SAM0023-122898
ES1869 DATA SHEET INTERRUPTS
INTERRUPTS
There seven interrupt sources ES1869, shown Table Table ES1869 Interrupt Sources
Interrupt Source Audio Description interrupt used first channel (Sound Blaster compatible DMA, Extended mode DMA, Extended mode programmed I/O), well Sound Blaster-compatible MIDI receive. Controller register controls this interrupt Extended mode programmed I/O. This interrupt request cleared hardware software reset, read from port Audio_Base+0Eh. interrupt request polled reading from port Audio_Base+0Ch. Audio interrupt assigned interrupt channel register optional interrupt second channel. ES1869 operate full-duplex mode using channels. However, since second channel must share same sample rate first channel, necessary separate interrupt second channel. Audio interrupt masked mixer register 7Ah. polled cleared reading writing register 7Ah. This interrupt assigned interrupt channel register
Audio
Hardware Volume Hardware volume activity interrupt. This interrupt occurs when three hardware volume controls changes state. mixer register mask this interrupt. interrupt request polled reading register 64h. interrupt request cleared writing value register 66h. Hardware Volume interrupt assigned interrupt channel register 27h. Typically this interrupt, used, shared with audio interrupt. MPU-401 MPU-401 interrupt occurs when MIDI byte received. goes when byte read from MIDI FIFO goes high again quickly there additional bytes FIFO. interrupt status same Read-Data-Available status flag MPU-401 status register. MPU-401 interrupt masked mixer register 64h. This interrupt assigned interrupt channel ways. MPU-401 part audio device, then register used assign MPU-401 interrupt. MPU-401 logical device, also assigned interrupt register Both these methods access same physical register. source CD-ROM interrupt input CDIRQ. source Modem interrupt input MMIRQ. source General-Purpose interrupt input GPI. used request CD-ROM, Modem, General-Purpose device, then this cannot used general-purpose device interrupt.
CD-ROM Modem General-Purpose
Interrupt sources mapped interrupt output pins through registers. Zero, one, more interrupts given pin. Each assigned interrupt channel number VendorDefined Card-Level registers 20h, 21h, 22h. These registers automatically loaded from 8-byte header configuration data. Each interrupt either active highimpedance state. given interrupt more sources assigned more those sources activated (register 30h, then interrupt active; that always drives high low. exception Modem interrupt, which deactivated input MMIEB high Modem device active. Each interrupt also more mask bits that AND'ed with interrupt request.
Interrupt Status Register
Port Config_Base+6h configuration device read quickly find which ES1869 interrupt sources active. bits are: Table Interrupt Status Bits Config_Base+6h
Description Audio interrupt request Audio interrupt request AND'ed with mixer register Hardware volume interrupt request AND'ed with mixer register MPU-401 receive interrupt request AND'ed with mixer register CDIRQ input MMIRQ input AND'ed with inverse MMIEB input input
SAM0023-122898
ES1869 DATA SHEET INTERRUPTS
Interrupt Mask Register
Port Config_Base+7h used mask seven interrupt sources. mask bits used force interrupt source zero, without putting interrupt highimpedance state. Each AND'ed with corresponding interrupt source. This register ones hardware reset. Interrupt Status register (ISR) affected state Interrupt Mask register (IMR). That reflects status interrupt request lines before being masked IMR. useful when interrupts shared. example, assume that Audio Audio Hardware Volume, MPU-401 share same interrupt Windows. When returning from Windows DOS, Hardware Volume, MPU-401, Audio interrupts masked setting appropriate bits second within interrupt handler. first thing interrupt handler mask interrupt sources mapped interrupt handler. Then, polled decide which sources process. Just before exiting interrupt handler, restored. unprocessed interrupt remains active, generates interrupt request because interrupt during masked period then went high when interrupt sources were unmasked. Also, while interrupts masked, individual interrupt sources change state number times without generating false interrupt request.
Sharing Interrupts
Plug Play does allow sharing interrupts resource assignment decision making. device wants share interrupt with another device that been assigned interrupt PnP, first device cannot request interrupt itself. logical device that supports interrupts assigned interrupt after sequence Windows driver. Refer "Bypass Key" page information sequence. this case, would typically forced share interrupt with first audio interrupt. cases, this done simply programming appropriate register (70h 72h) selected device. Below exceptions:
hardware volume interrupt. This interrupt source
assigned interrupt through Vendor-Defined Card-Level register 27h.
MPU-401 interrupt. This device either part
audio device logical device. part audio device, interrupt assigned writing Vendor-Defined Card-Level register 28h. this device logical device, assigned interrupt either register register
SAM0023-122898
ES1869 DATA SHEET PERIPHERAL INTERFACING
PERIPHERAL INTERFACING
Serial Interface
Three input pins, IISDATA, IISCLK, IISLR, used serial interface between external device stereo within ES1869. These inputs left floating connected ground serial interface used. Typical applications serial interface MPEG audio digital audio.
Interface
ES1869 contains synchronous serial interface connection serial interface. typical application this interface speakerphone. Table identifies pins interface. Table Interface Pins
Description Active-high signal from external enable serial mode.
DCLK Data clock. rate vary, typical value 2.048 256).
IISDATA
CARD
IISCLK IISLR
Data transmit. Active output when data being transmitted serially from ES1869, otherwise highimpedance. Serial data input. Frame sync transmit. either active-high active-low based mixer register 48h. pulse request from external begin transmission bits data Frame sync receive. either active-high active-low, based mixer register 48h. pulse signals arrival bits data
ES1869
Figure Implementation ES1869
Table identifies three pins interface. Table Interface Pins
IISLR Description Left/right strobe interface. Input with pulldown. Serial shift clock interface. Input with pulldown.
IISDATA Serial data interface. Input with pull-down. IISCLK
Serial Interface Timing Within ES1869, IISLR IISDATA sampled rising edge IISCLK. Figure Figure detailed timing.
Operating Modes There data transfer modes ES1869. state single switch internal ES1869 determines which mode enabled. This switch route first audio channel second audio channel DAC. When first audio channel routed second audio channel DAC, Telegaming mode enabled. Otherwise operating default mode.
Wavetable Interface
ES1869 contains synchronous serial interface connection ES689/ES69x wavetable music synthesizer. Table identifies pins wavetable interface. Table Wavetable Interface Pins
MCLK Description Serial clock from external ES689/ES69x music synthesizer. Serial data from external ES689/ES69x music synthesizer. When both MCLK active, stereo DACs that normally used synthesizer acquired external ES689/ ES69x. normal output blocked.
SAM0023-122898
ES1869 DATA SHEET PERIPHERAL INTERFACING
16-bit Stereo DMA2 FIFO DMA1 FIFO
16-bit Stereo DMA2 FIFO Microphone FDXO DMA1 FIFO
16-bit Stereo CODEC
16-bit Stereo CODEC
Microphone FDXO
Serializer/ Deserializer
Mixer
Speaker
Serializer/ Deserializer
Mixer
Speaker
DSP/CODEC Port
DSP/CODEC Port
Figure Telegaming Mode Telegaming Mode
Figure Default Mode Acoustic Echo Cancellation
This mode enabled when conditions present: serial port must enabled (i.e., either mixer register high input high). mixer register high. This enables Telegaming mode. previous chips, when serial port enabled, Audio CODEC unavailable first audio channel. This means digital audio Sound Blaster compatible games muted. Sound Blaster only first audio channel digital audio. Audio CODEC used DSP. Telegaming mode, first audio channel switched over Audio DAC. Internally, first audio channel routed second audio channel second audio channel function. addition, second audio channel mixer volume control slaved first channel mixer volume control.
Default Mode
cannot perform acoustic echo cancellation either mode. Because audio from host does pass directly through DSP, there compensate acoustic echo. Therefore, using headset either microphone speakers both recommended.
Digital Audio Playback
There choices mixing digital audio playback data with other audio sources. audio data mixed ES1869's internal playback mixer externally ES1869. Mixing Internal ES1869 digital audio playback mixed within ES1869 playback mixer. select this method, Output Signal Control bits mixer register mixer output. this, program bits mixer register respectively. volume digital audio playback controlled Audio Play Volume register (14h). NOTE: Telegaming mode, register also controls game-compatible first audio channel digital audio playback. independent mixer volume control game-compatible digital audio data necessary, second method. Mixing External ES1869 second method FDXO output digital audio playback game-compatible digital audio playback external audio mixer. select this method, Output Signal Control bits mixer register mixer output except playback. this, program bits register
default mode operates just like Telegaming mode except that data from first audio channel cannot heard. Data sent through second audio channel mixed Telegaming mode.
SAM0023-122898
ES1869 DATA SHEET PERIPHERAL INTERFACING
respectively. addition, Mixer register high enable FDXO output when serial mode enabled. volume digital audio playback controlled within scaling data.
Serial Data Format Figure shows format serial data used with serial interface.
DCLK
Hi-Z
(MSB)
(MSB)
Figure 16-Bit Data, Positive Sync Pulse
SAM0023-122898
ES1869 DATA SHEET PERIPHERAL INTERFACING
Modem Interface
ES1869 allows direct interface external modem. There four pins dedicated external modem. Table identifies pins Modem interface. Table External Modem Interface Pins
Description MMCSB Output from ES1869 external modem chip select, active-low. address space determined configuration. Modem device uses eight consecutive addresses, with base address, typically ports. MMIRQ Interrupt request from Modem device. This signal mapped output ES1869, based configuration. Modem interrupt enable input. Active-low when Modem interrupt enabled. High when Modem interrupt request disabled. Generated from Modem UART. User-defined general-purpose chip select output. selected logic based configuration.
CD-ROM Interface
ES1869 allows direct interface CD-ROM drive. There four pins dedicated CD-ROM interface. Table identifies these pins. Table CD-ROM Interface Pins
CDIRQ Description Interrupt request from CD-ROM. Internally routed outputs (A-F).
CDCSB0 Active-low decode output eight command block registers. driver. CDCSB1 Active-low decode output control block registers. driver. CDENBL Active-low decode output external 74LS245 transceiver that buffers least bits data bus. This active-low when CDCSB0, CDCSB1, -DACK active-low.
MMIEB
GPCS
Modem Operating Modes modem also requires channel, GPI/ GPO1 pins used DRQ/-DACK from modem. modem also connect ES1869 through serial interface. This allows modem sample rate both chips have access microphone speaker speakerphone voice-overdata applications. determines sample rate serial link generating FSR/FSX pulses. Figure shows typical modem interface application, speakerphone modem with voice-over-data.
most cases, interface does DMA. must DMA, then GPO1/GPI pair (pins used this purpose. this case, these pins would available other external devices such modem/audio processor. Also, typically only DRQ/DACK pairs ES1869 would connected 16-bit channel. This does give system choice about assigning channel. recommended CD-ROM.
ES1869
-DACK
RSTB CDCSB0
74LS245
Telephone Line
CDCSB1
SD[7:0]
CODEC Serial
Microphone
Speaker
SD[15:8] -IOR -IOW
Modem Serial
ES1869
Modem Data
FIFO
SA[2:0]
-IOCS16 IOCHRDY
Figure Speakerphone Modem Voice-Over-Data
Figure Interface Typical Application
SAM0023-122898
CONNECTOR
CONNECTOR
CDENBL CDIRQ
ES1869 DATA SHEET PERIPHERAL INTERFACING
General-Purpose Device
addition modem CD-ROM interfaces, ES1869 Plug Play logic supports generalpurpose device. GPO0 output configured provide active-high chip-select output when this device accessed. General-Purpose device decode consecutive addresses. also possible GPI/GPO1 channel General-Purpose device these pins used Modem CD-ROM device. also used interrupt source General-Purpose device otherwise used.
joystick port reference design removing joystick enable jumper. Disabling joystick port does affect MIDI port. multiple joysticks required, joystick conversion cable. This cable uses 15-pin D-sub male connector end, 15-pin D-sub female connectors other end. signals this cable have direct pin-to-pin connection, except pins male connector, pins should left without connection. female connectors, internally connected internally connected dual joystick MIDI port take only slot system, leaving room other cards. Figure shows dual joystick/MIDI connector configuration.
Joystick MPU-401 Interface
MPU-401 UART Mode There separate MIDI interfaces ES1869. Sound Blaster compatible command MPU401 "UART mode" compatible serial port. MPU-401 superior method MIDI serial because does interfere with Sound Blaster commands. Both methods serial share same pins. MPU-401 interface consists separate 8-byte FIFOs receive transmit. default after hardware reset, MPU-401 interface disabled. must configured using register LDN3, which described "LDN MPU-401 Device" page MPU-401 requires interrupt channel MIDI receive. This interrupt should selected using register LDN3. should different than interrupt selected audio interrupts. MPU-401 enabled, low-level signal prevents power-down causes automatic wake-up ES1869 powered down. Likewise, power-down prevented byte currently being received transmitted. Temporarily disabling MPU-401 using register LDN3 MPU-401 device) register LDN1 MPU-401 part audio device) acts reset FIFOs. Joystick MIDI External Interface joystick portion ES1869 reference design identical that standard game control adaptor game port. compatible joystick connected 15-pin D-sub connector. supports standard joystick-compatible software. system already game card port, either remove game card disable
Joystick
Joystick
X-axis
X-axis
Button Button
Y-axis
Button
Button
Y-axis
MIDI MIDI
Figure Dual Joystick/MIDI Connector
Figure shows MIDI serial interface adaptor from joystick/MIDI connector.
SAM0023-122898
ES1869 DATA SHEET PERIPHERAL INTERFACING
JOYSTICK PORT
2.2K 5.6K
2N3904 220pF
2N3904
220pF
MIDI
DB15P
ISO1
MIDI
Figure MIDI Serial Interface
Serial EEPROM Interface
ES1869 gets Plug Play configuration data from internal masked external EEPROM device. external EEPROM device 512K 8-bit size. EEPROM interface shared with hardware volume controls. When EEPROM interface active, volume controls deactivated. Figure host processor read write EEPROM, allowing EEPROM reprogrammed initially programmed during production test. when used SECS, input during reset. EEPROM exists needs used, pull this high externally. Otherwise, pull low, force internal ROM. Depending value operating mode selected this pin, either internal mask-ROM external EEPROM device used.
SECS/PSEL Internal 93LC66
EEPROM Format
'A5' Sync Byte IRQB IRQA Mapping IRQB/A IRQD IRQC Mapping IRQD/C IRQF IRQE Mapping IRQF/E DRQB DRQA Mapping DRQB/A DRQD DRQC Mapping DRQD/C Miscellaneous Miscellaneous
ES1869
93LC66
(512K 8-bit serial EEPROM) SEDI/VOLUP SEDO/VOLDN SECLK/MUTE SECS/PSEL
address bits
mute down
Figure Serial EEPROM Typical Application
SAM0023-122898
ES1869 DATA SHEET PERIPHERAL INTERFACING
MONO_IN MONO_OUT
MONO_IN line-level analog input. MONO_IN input playback mixer record mixer. mixer volumes controlled mixer registers (playback) (record). Alternately, MONO_IN mixed with AOUT_L AOUT_R after master volume stage. mixer register 7Dh, when high, enables MONO_IN mixed directly (unity gain) with AOUT_L AOUT_R. third MONO_IN input left channel full-duplex serial port mode. this application, MONO_IN typically line-level microphone input (external preamp). MONO_IN selected input serial port mode setting bits mixer register high. MONO_IN input bypasses recording source select record volume stages. MONO_IN directly drives left channel switchedcapacitor filter. output switched-capacitor filter FOUT_L, which AC-coupled externally CIN_L, left channel input. MONO_OUT line-level mono output. During powerdown during opamp calibration, MONO_OUT held AOUT_L AOUT_R) internal, highimpedance resistor divider. MONO_OUT selected from among four sources bits mixer register 7Dh.
Mixer Register MONO_OUT Source Mute (CMR) First channel filter output (actually CIN_R pin) Second channel DAC, right channel Mono record level stage outputs
When MONO_OUT buffered version mono record level stage left right outputs. This gives utmost flexibility source sources MONO_OUT. record source select record levels programmed generate combination sources volumes MONO_OUT.
Spatializer® VBXAudio Processor
ES1869 incorporates embedded Spatializer® VBXstereo audio processor provided Desper Products, Inc., subsidiary Spatializer Audio Laboratories, Inc. positioned between output playback mixer master volume controls produces wider perceived stereo effect. effect enabled register amount effect controlled directly programming Level register 52h.
Hardware Master Volume Control
Three external pins, VOLUP, VOLDN, MUTE connected external momentary switches ground implement hardware master volume controls. Pressing these buttons produces signal inputs thereby changes master volume. mode MUTE input replaced state where both VOLUP VOLDN inputs low. down buttons produce single step change volume when they first pressed. these buttons held down, they enter fast-scrolling mode. single step change either volume unit (.75 three volume units (2.25 dB). scrolling mode, step change always volume unit. three inputs have debounce circuitry within ES1869. Hold each input milliseconds more recognized valid button press. Hold each input high milliseconds more between button presses. software option allows debounce time reduced from milliseconds microseconds. Normally hardware volume controls directly change master volume registers produce interrupt each change. However, ES1869 programmed that hardware volume controls directly change master volume registers. This called "split mode", which hardware volume control counters split from master volume registers. Pressing hardware volume control button changes hardware volume counters produces interrupt. host software read hardware volume counters update master volume registers needed. Split mode enabled mixer register 64h.
Normally bits both zero, that MONO_OUT muted. When MONO_OUT buffered version input CIN_R. CIN_R typically right channel output, filtered first channel switchedcapacitor filter. right channel used ADC, CIN_R will right channel input. MONO_OUT used this application digitized audio playback through first channel DMA, right channel DAC. When MONO_OUT buffered version second channel, right channel DAC. this case, second channel play digitized audio through MONO_OUT.
SAM0023-122898
ES1869 DATA SHEET PERIPHERAL INTERFACING
support mixer master volume control, write mixer registers translates automatically into writes master volume registers. Since register only 3-bit resolution channel, register only 4-bit resolution channel, translation circuit included ES1869 that translates 4-bit volume values into 6-bit volume mute that used master volume registers. Support these mixer registers defeated under software control. Reading master volume registers also requires translation circuit translate 6-bit mute master volumes into 4-bit master volume numbers registers 32h.
Speaker
Speaker supported with 1-bit with volume control. analog output PCSPKO intended externally mixed external amplifier. Speaker Volume Control When PCSPKI signal high, resistive path analog ground enabled. value resistor selected from among choices control amplitude output signal.
VDDD PCSPKI
PCSPKO
GNDA
Figure Speaker Volume Circuitry
With external circuit shown Figure amplitude square wave output PCSPKO should approximately VDDA/2 maximum volume, i.e., internal resistor approximately ohms 30%). other levels relative this amplitude follows: mute, -24dB, -21dB, -18dB, -15dB, -12dB, -9dB, -6dB purpose circuit, beyond volume control speaker, prevent digital noise from speaker signal being mixed into analog signal. This circuit provides clean analog signal. output either mixed with AOUT_L AOUT_R pins externally used drive simple transistor amplifier drive speaker dedicated producing beeps.
SAM0023-122898
ES1869 DATA SHEET ANALOG DESIGN CONSIDERATIONS
ANALOG DESIGN CONSIDERATIONS
This section describes design considerations related inputs outputs analog signals related pins chip.
Audio Inputs Outputs
Analog inputs MIC, LINE_L, LINE_R, AUXA_L, AUXA_R should capacitively coupled their respective input signals. have pull-up resistors CMR. ES1869 analog outputs AOUT_L AOUT_R should AC-coupled amplifier, volume control potentiometer, line-level outputs.
Game Port
game port address 201h decoded timer pins switch pins SWA, SWB, SWC, SWD. MIDI serial input output also come from game port connector most applications.
Reference Generator
Reference generator shown bypassed analog ground.
ES1869
Figure Reference Generator Diagram
Switch-Capacitor Filter
outputs FOUT_L FOUT_R filters must AC-coupled inputs CIN_L CIN_R. This provides blocking opportunity low-pass filtering with capacitors analog ground these inputs.
ES1869
FOUT_L CIN_L
FOUT_R CIN_R
Figure Switch-Capacitor Filter Diagram
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
CONFIGURATION REGISTERS
Figure shows configuration register that discussed following pages. shown below, Card-Level registers supported ES1869 Card-Control Card-Level registers addresses 00h-07h, Vendor-Defined Card-Level registers addresses 20h-2Fh. Card-Control Card-Level register address pointer Logical Device registers supported ES1869 (one registers each logical device "card"). ES1869, there logical devices: configuration device, audio+FM+MPU-401 device, joystick device, CDROM device, Modem device, user-defined General-Purpose device. Configuration Ports directly access registers, bypass sequence, write special sequence port 279h that depends bits register 25h, conclude with writes 279h base address configuration ports. sequence also sets activate configuration device. Bypass supported system, possible bypass issuing special "bypass key" ES1869 force configuration device enabled specific address. ES1869 must "waitfor-key" Plug Play state. special bytes long, written address register (279h). Follow bypass immediately with writes address register high bytes address register configuration device. bypass also activates configuration device. address configuration device must range 100hFF8h, aligned multiple "alias" audio device address used. example, E20h configuration device audio device address 220h. actual sequence determined state bits Vendor-Defined Card-Level register 25h. These bits both zero after reset, loaded from seventh byte header first byte header 'A5'). purpose bypass handle case where multiple instances ES1869 coexist single non-PnP system. recommended four keys successively. only difference between four keys least significant bits: bits with bits register generate keys NOTE: Perform entire sequence with interrupts disabled minimize chance that interrupt corrupt sequence.
Register 25h, bits <config_address_low>, <config_address_high> Register 25h, bits <config_address_low>, <config_address_high> Register 25h, bits
Card-Level Registers
(one card)
Address Card-Control Card-Level Registers bits Read Port Address Serial Isolation Configuration Control Wake Command [CSN] Resource Data Status Card Select Number (CSN) Logical Device Number Reserved Card-Level Registers Vendor-Defined Card-Level Registers
Logical Device Registers
(one logical device card)
Address Activate Range Check Reserved Logical Device Control Vendor-Defined Logical Device Control Memory Configuration Registers Configuration Registers Interrupt Configuration Registers Configuration Registers 32-bit Memory Configuration Registers Reserved Logical Device Configuration Vendor-Defined Logical Device Configuration Reserved bits
Figure Configuration Register SeAccess Registers
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
<config_address_low>, <config_address_high> Register 25h, bits <config_address_low>, <config_address_high>
Wake[CSN]
Data
(03h,
data written
matches CSN:
this card goes from Sleep mode Isolation mode.
does match CSN:
this card goes from Configuration mode Sleep mode. data written non-zero,
CAUTION: When using bypass method address configuration, address cannot reliably relocated without reissuing bypass key. Writing directly Logical Device Number register change configuration address unreliable. bypass relocate configuration address. this method initial address configuration well subsequent change address configuration.
matches CSN:
this card goes from Sleep mode Configuration mode.
does match CSN:
this card goes from Isolation mode Sleep mode.
Card-Control Card-Level Registers (00h-07h)
RD_DATA Port
Bits RD_DATA port
(00h, R/W)
read port written only when card Isolation mode. reset hardware reset. read only from Configuration mode. Bits read port always one. Serial Isolation
Data
(01h,
Read-only isolation state. Used read serial identifier during card isolation process. Config Control
RESET_CSN
(02h,
Definitions: Bits Name Description RESET_CSN RESET_CSN command. Card's CSNs zero. WAIT_FOR_KEY command. Enter wait-for-key state. Software reset command. Does work wait-for-key state. Reset config registers default.
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
Resource Data
Resource data
(04h,
IRQF, IRQE
IRQF IRQE
(22h,
Returns next byte resource data, provided status register been polled before each byte read, indicating that data ready. Only works Configuration mode. Status
Reserved
Defines number assigned pins. Loaded from Configuration Header after reset. Unused pins should assigned DRQB, DRQA (23h,
DRQA
(05h,
Status
DRQB
Definitions: Bits Name Status Description Ready read resource data register 04h. Only works Configuration mode. Resource data available.
Defines number assigned pins. Loaded from Configuration header after reset. Unused pins should assigned DRQD, DRQC
DRQD DRQC
(24h,
Card select number
(06h, R/W)
Defines number assigned pins. Loaded from Configuration header after reset. Unused pins should assigned Configuration Header
Motherboard/ latch card Modem CD-ROM
Read/write card select number. Write only works Isolation mode. Causes transition Configuration mode. Read only works Configuration mode.
Logical device number
(25h,
MPU-401
(07h, R/W)
Loaded from Configuration header after reset.
Definitions:
Read/write logical device Configuration mode.
number.
Only
works
Bits Name latch
Description latch feature enabled. latch feature disabled. ES1869 motherboard/add-on card. Motherboard/Card Motherboard Card Reserved Reserved General Purpose Location present 3,4,5,or uses addresses uses addresses uses addresses
Vendor-Defined Card-Level Registers (20h-29h)
IRQB, IRQA
IRQB IRQA
(20h,
Motherboard/ card
Defines number assigned pins. Loaded from Configuration Header after reset. Unused pins should assigned IRQD, IRQC
IRQD IRQC
General-purpose location.
(21h,
Defines number assigned pins. Loaded from Configuration Header after reset. Unused pins should assigned
Modem
Modem Modem present.
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
Bits Name
Description
Definitions: Bits Name enable Description enabled. disabled. ES1869 will respond commands. This high hardware reset.
CD-ROM CD-ROM CD-ROM present. MPU-401 MPU-401 interrupt shared with audio interrupt MPU-401 part interrupt shared with audio interrupt
Logical Device Registers
Table Logical Device Summary
(mandatory) Range Check. base address, bits 11:8.If zero, this device disabled. Eight locations. base address, bits 7:3. Channel Select (default Channel Select (default Audio device Activate; activate bit. Range Check. base address audio processor; bits 11:8. zero, this device accessible. Sixteen locations. base address audio processor, bits 7:4. base address alias, bits 11:8. zero, this device accessible. Four locations. base address alias, bits 7:2. base address MPU-401, bits 11:8. zero, this device accessible. MPU-401 also accessible through locations. base address MPU-401, bits 7:2. Interrupt Request Channel Select. Interrupt Request Type Select (returns Interrupt Request Channel Select. Interrupt Request Type Select (returns Channel Select (default Channel Select (default Joystick device Activate; activate bit. Range Check. base address, bits 11:8. zero, this device disabled. location. base address, bits 7:0. MPU-401 device Device Configuration device Activate; activate bit.
Configuration Header
Reserved
(26h,
Audio Audio GPO1 GPO0 mask mask mask
Loaded from configuration header after reset.
Definitions: Bits Name Description External Enable external mask. Disable. mask Audio mask Audio mask GPO1 Enable audio mask. Disable. Enable audio mask. Disable. GPO1 external DACK, external DRQ. GPO1 GPO1. GPO0 GPCS. GPO0 GPO0.
(mandatory)
GPO0
Hardware Volume Number
Hardware volume number
(27h,
Hardware volume number (must shared with audio audio Reset reset. MPU-401 Number
MPU-401 number
(28h,
MPU-401 number (alias address with register MPU-401 Enable
(mandatory)
(29h,
enable
descriptor (optional)
Activate; activate bit.
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
Table Logical Device Summary (Continued)
Range Check. base address, bits 11:8. zero, this device disabled. locations. base address, bits 7:0. Interrupt Request Select. Interrupt Request Type Select (returns CD-ROM device Activate; activate bit. Range Check. base address address range, bits 11:8. zero, this device accessible. Eight locations. base address address range, bits 7:0. base address address range, bits 11:8. zero, this device accessible. locations. base address address range, bits 7:0. Interrupt Request CD-ROM Select. Interrupt Request Type Select (returns Channel Select CD-ROM (default Modem device Device
After reset after written reset card's configuration control bit, default this register
Definitions: Bits Name Activate Description Activate. Deactivate (default).
Range Check
(31h,
Enable range check Pattern select
(optional)
This register verifies that range assigned logical device does conflict with range used another device.
Definitions: Bits Name Enable range check Pattern select Description Enable range check. Disable. 55h. AAh.
(optional) Range Check.
Decoder Base Address
A[11:8]
(60h,
Activate; activate bit. base address, bits 11:8. zero, this device accessible. Eight locations. base address, bits 7:0. Interrupt Request Modem Select. Interrupt Request Type Select (returns Channel Select Modem (default General-Purpose device
This register used assign base address decoder logical device. base address, bits 11:8. Decoder Base Address
A[7:3]
(61h,
(optional) Range Check.
Activate; activate bit. base address, bits 11:8. zero, this device accessible. Four, eight, sixteen locations. base address, bits 7:0. Interrupt Request General-Purpose Device Select. Interrupt Request Type Select (returns Channel Select General-Purpose Device (default
base address, bits 7:3. Channel Select
Data
(74h,
Returns channel selected).
Definitions: Bits Name Data Description Select which channel
Configuration Device Activate
Channel Select (30h, R/W)
Activate Data
(75h,
Returns channel selected).
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
Definitions: Bits Name Data Description Select which channel
Alias Base Address
A[11:8]
(62h, R/W)
Audio Device This device actually supports three functions: audio, MPU-401. Audio requires sixteen locations, interrupt which shared with MPU-401, channels. requires four locations. MPU-401 requires locations. Activate
base address alias, bits 11:8. Four locations. Alias Base Address
A[7:2]
(63h, R/W)
(30h, R/W)
Activate
base address alias, bits 7:2. MPU-401 Base Address
A[11:8]
(64h, R/W)
After reset after written reset card's configuration control bit, default this register
Definitions: Bits Name Activate Description Activate. Deactivate (default).
base address MPU-401, bits 11:8. (MPU-401 also accessible through locations. MPU-401 Base Address
A[7:2]
(65h, R/W)
Range Check
(31h,
Enable range check Pattern select
base address MPU-401, bits 7:2. Interrupt Request Channel Select
Data
(70h, R/W)
This register verifies that range assigned logical device does conflict with range used another device.
Definitions: Bits Name Enable range check Pattern select Description Enable range check. Disable. 55h. AAh.
Interrupt request channel select.
Definitions: Bits Name Data Description Select which interrupt used channel IRQ.
Interrupt Request Type Select
(71h,
Audio Processor Base Address
A[11:8]
(60h, R/W)
Interrupt request type select Returns (low-to-high transition). Interrupt Request Channel Select
Data
base address audio processor, bits 11:8. Sixteen locations. Audio Processor Base Address
A[7:4]
(72h, R/W)
(61h, R/W)
Interrupt request channel select.
Definitions: Bits Name Data Description Select which interrupt used channel IRQ.
base address audio processor, bits 7:4.
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
Interrupt Request Type Select
(73h,
Definitions: Bits Name Enable range check Pattern select Description Enable range check. Disable. 55h. AAh.
Interrupt request type select Returns (low-to-high transition). Channel Select
Data
(74h, Decoder Base Address
A[11:8]
(60h, R/W)
Returns channel selected).
Definitions: Bits Name Data Description Select which channel channel DRQ.
base address, bits 11:8. location. Decoder Base Address
A[7:0]
(61h, R/W)
Channel Select
Data
(75h,
base address, bits 7:0.
Returns channel selected).
Definitions: Bits Name Data Description Select which channel channel DRQ.
MPU-401 Device MPU-401, independent device, optional; normally MPU-401 part AudioDrive® solution. Activate
(30h, R/W)
Activate
Joystick Device Activate
After reset after written reset card's configuration control bit, default this register (30h, R/W)
Activate
Definitions: Bits Name Activate Description Activate. Deactivate (default).
After reset after written reset card's configuration control bit, default this register
Definitions: Bits Name Activate Description Activate. Deactivate (default).
Range Check
(31h,
Enable range check Pattern select
Range Check
(31h,
Enable range check Pattern select
This register verifies that range assigned logical device does conflict with range used another device.
Definitions: Bits Name Enable range check Pattern select Description Enable range check. Disable. 55h. AAh.
This register verifies that range assigned logical device does conflict with range used another device.
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
Decoder Base Address
A[11:8]
(60h, R/W)
Definitions: Bits Name Enable range check Pattern select Description Enable range check. Disable. 55h. AAh.
base address, bits 11:8. locations.
Decoder Base Address
A[7:0]
(61h, R/W)
Decoder Base Address
A[11:8]
(60h, R/W)
base address, bits 7:0. Interrupt Request Select
Data
(70h, R/W)
base address first address range, bits 11:8. Eight locations. Decoder Base Address (61h, R/W)
Interrupt request select.
Definitions: Bits Name Data Description Select which interrupt used IRQ.
A[7:0]
base address first address range, bits 7:0. Decoder Base Address (62h, R/W)
A[11:8]
Interrupt Request Type Select
(71h,
Interrupt request type select Returns (low-to-high transition).
base address second address range, bits 11:8. locations. Decoder Base Address (63h, R/W)
CD-ROM Device CD-ROM Device optional. present, Activate
A[7:0]
base address second address range, bits 7:0. (30h, R/W)
Activate
Interrupt Request CD-ROM Select
Data
(70h, R/W)
After reset after written reset card's configuration control bit, default this register
Definitions: Bits Name Activate Description Activate. Deactivate (default).
Interrupt request CD-ROM select.
Definitions: Bits Name Data Description Select which interrupt used CD-ROM IRQ.
Range Check
(31h,
Enable range check Pattern select
Interrupt Request Type Select
(71h,
This register verifies that range assigned logical device does conflict with range used another device.
Interrupt request type select Returns (low-to-high transition). Channel Select CD-ROM
Data
(74h,
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
Interrupt Request Modem Select
Data
(70h, R/W)
Returns channel selected).
Definitions: Bits Name Data Description Select which channel CD-ROM DRQ.
Interrupt request modem select.
Definitions: Bits Name Data Description Select which interrupt used modem IRQ.
Modem Device Modem Device optional. present, Activate
Interrupt Request Type Select
(71h,
(30h, R/W)
Activate
After reset after written reset card's configuration control bit, default this register
Definitions: Bits Name Activate Description Activate. Deactivate (default).
Interrupt request type select Returns (low-to-high transition). Channel Select Modem
Data
(74h,
Returns channel selected). (31h,
Definitions: Bits Name Data Description Select which channel Modem DRQ.
Range Check
Enable range check Pattern select
This register verifies that range assigned logical device does conflict with range used another device.
Definitions: Bits Name Enable range check Pattern select Description Enable range check. Disable. 55h. AAh.
General-Purpose Device general-purpose device optional. present, Activate
(30h, R/W)
Activate
After reset after written reset card's configuration control bit, default this register (60h, R/W)
A[11:8]
Decoder Base Address
Definitions: Bits Name Activate Description Activate. Deactivate (default).
base address address range, bits 11:8. Eight locations. Decoder Base Address
A[7:0]
Range Check (61h, R/W)
(31h,
Enable range check Pattern select
base address address range, bits 7:0.
This register verifies that range assigned logical device does conflict with range used another device.
SAM0023-122898
ES1869 DATA SHEET CONFIGURATION REGISTERS
Definitions: Bits Name Enable range check Pattern select Description Enable range check. Disable. 55h. AAh.
Decoder Base Address
A[11:8]
(60h, R/W)
base address address range, bits 11:8. Four, eight, sixteen locations. Decoder Base Address
A[7:0]
(61h, R/W)
base address address range, bits 7:0. Interrupt Request General-Purpose Device Select (70h, R/W)
Data
Interrupt request general-purpose device select.
Definitions: Bits Name Data Description Select which interrupt used general-purpose device IRQ.
Interrupt Request Type Select
(71h,
Interrupt request type select Returns (low-to-high transition). Channel Select General-Purpose Device (74h,
Data
Returns channel selected).
Definitions: Bits Name Data Description Select which channel generalpurpose device DRQ.
SAM0023-122898
ES1869 DATA SHEET PORTS
PORTS
Port Summary
Table Ports Configuration, Audio, MPU-401, Joystick Devices
Port Configuration Device Base+0h Base+1h Base+2h Base+3h Base+4h Base+5h Base+6h Base+7h Audio Device Base+0h Base+3h Base+4h Base+5h Base+6h Base+7h Base+8h Base+9h Base+Ah Base+Ch Base+Eh Base+Fh Device Base+0h Base+3h MPU-401 Device Base+0h Base+1h Joystick Device Base+0h Read/write Joystick. Read/write MPU-401 port (x=0,1,2, enabled. Read/write 20-voice synthesizer. Address data registers. Read/write Read/write Read/write Read/write Read/write Read/write Read-only Read/write Read-only Read/write 20-voice synthesizer. Address data registers. Mixer Address register (port address mixer controller registers). Mixer Data register (port data to/from mixer controller registers). Audio reset status flags. Power Management register. Suspend request reset. 11-voice synthesizer. Address data registers. Input data from read buffer command/data I/O. Poll port Audio_Base+Eh test whether read buffer contents valid. Output data write buffer command/data I/O. Read embedded processor status. Data available flag from embedded processor. Address access FIFO Extended mode. Read/write Read/write Read/write Read/write Read/write Read/write Read-only Read/write Configuration Register Address. Configuration Register Data. EEPROM Data register. EEPROM Command register. Reset EEPROM Address. Status register. Interrupt Status register. Interrupt Mask register. Read/Write Function
SAM0023-122898
ES1869 DATA SHEET PORTS
Port Descriptions
Configuration Device EEPROM Command Register (Config_Base+3h, R/W)
EEPROM Command
Interrupt Status Register
(Config_Base+6h,
Reserved Modem CD-ROM MPU-401 Audio Audio
Read this register find which ES1869 interrupt sources active.
Definitions: Bits Name Description General-Purpose. input pin. Modem. MMIRQ input AND'ed with inverse MMIEB input.
Definitions: Bits Name Description Function Write disable Write Erase Write enable Write Read Erase EEPROM EEPROM command options. Command
Reserved Reserved. Modem
CD-ROM CD-ROM interface. CDIRQ input pin. MPU-401 MPU-401. MPU-401 receive interrupt request AND'ed with mixer register 64h. Audio Audio Hardware volume. Hardware volume interrupt request AND'ed with mixer register 64h. Audio Audio interrupt request AND'ed with mixer register 7Ah. Audio Audio interrupt request.
Status Register
Reserved EEPROM type State
(Config_Base+5h, R/W)
PNPOK busy
Interrupt Mask Register
(Config_Base+7h, R/W)
Reserved Modem CD-ROM MPU-401 Audio Audio
Definitions: Bits Name Description Reserved Reserved. EEPROM EEPROM type indicator. type Function State Internal Reserved Reserved 8-bit
mask bits this register used force interrupt source zero without putting interrupt high-impedance state. Each AND'ed with corresponding interrupt source. ones hardware reset.
Definitions: Bits Name Modem Description General-Purpose interrupt mask bit. Modem interrupt mask bit. Reserved Reserved.
ES1869 operating state. Function Wait-for-key Sleep Isolation Configure
CD-ROM CD-ROM interface interrupt mask bit. MPU-401 MPU-401 interrupt mask bit. Audio Audio Hardware volume interrupt mask bit. Audio interrupt mask bit. Audio interrupt mask bit.
PNPOK busy
PNPOK bit. Reset sequence busy bit.
SAM0023-122898
ES1869 DATA SHEET PORTS
Audio Device Mixer Address Register
Definitions: Bits Name Description
(Audio_Base+4h, R/W)
flag reads/writes MPU-401 ports. flag1 reads/writes audio ports Audio_Base+Ch Audio_Base+Eh. flag writes audio ports Audio_Base+2h, Base+3h, Base+6h, Base+Ch. reads from audio ports Audio_Base+2h, Base+3h, Base+Ah. Also accesses ES1869. Serial Serial activity flag. High serial mode flag enabled input high bits register high) external ES689/ ES69x using MCLK/MSD drive DAC. Digital powerdown MIDI mode ES1869 digital section currently powered-down (power mode Power analog section controlled Audio_Base+7h. ES1869 processing MIDI command 30h, 31h, 34h, 35h. this mode, ES1869 monitoring serial input. Poweringdown cause loss data. ES1869 does automatically wake serial input pin. FIFO Reset bit.
ES1869 provides means read back Mixer Address register. Reading back this register useful "hot-key" application that needs change mixer while preserving address register. Mixer Data Register
(Audio_Base+5h, R/W)
Reset Status Flags
(Audio_Base+6h,
FIFO reset reset
Definitions: Bits Name FIFO reset Description Reserved. Always write Hold ES1869 FIFO reset. Release ES1869 FIFO from reset. function Compatibility mode.
reset Hold ES1869 reset. Release ES1869 from reset.
FIFO reset
reset Software Reset bit.
Reset Status Flags
Digital flag flag Serial powerflag flag down
(Audio_Base+6h,
MIDI modes FIFO reset reset
Power Management Register
Suspend request synth reset
(Audio_Base+7h, R/W)
GPO1 GPO0
Analog Powerpower- down down request
Bits port Audio_Base+6h used monitor activity ES1869. Bits high after read from port Audio_Base+6h. Then specific activity these bits low. When port Audio_Base+6h read later time, these bits will indicate whether activity occurred between reads from Audio_Base+6h. addition, used indicate ES689/ES69x serial interface use. high mixer register high (software serial enable serial reset). also high ES689/ ES69x serial interface active, which combination mixer register high MCLK (ES689/ ES69x serial clock) being high periodically.
Reading writing port Audio_Base+7h does automatically wake ES1869.
Definitions: Bits Name Description Suspend Pulse high, then request suspend. request Read-only. Indicates status pin. synth Hold synthesizer reset. reset Release synthesizer from reset. Analog powerdown Powerdown request Reserved. Always write Analog_Stays_On Clear Analog_Stays_On Pulse high, then request power-down.
SAM0023-122898
ES1869 DATA SHEET PORTS
Bits Name GPO1 GPO0
Description GPO1 high (Hardware reset condition). Clear GPO1. GPO0 high. Clear GPO0 (Hardware reset condition).
Read Buffer Status Register
(Audio_Base+Eh,
read from port Audio_Base+Eh will reset interrupt request.
Definitions: Bits Name Description Data available read buffer. Data available read buffer. This flag reset read from port Audio_Base+Ah.
Read Data Register
(Audio_Base+Ah,
Read data from embedded audio processor. Poll port Audio_Base+Eh test whether register contents valid. Write Data Register
(Audio_Base+Ch,
Programmed Access FIFO Register (Audio_Base+Fh, R/W)
Write data embedded audio processor. Sets port Audio_Base+Ch high (write buffer available) until data processed ES1869. Read Data Register
This port used replace Extended mode with programmed I/O.
(Audio_Base+Ch,
Definitions: Bits Name BUSY flag Description write buffer available ES1869 busy. write buffer available ES1869 busy. Data available read buffer. Data available read buffer. This flag reset read from port Audio_Base+Ah. Extended mode FIFO Full (256 bytes loaded). Extended mode FIFO Empty bytes loaded). FIFO Half Empty, Extended mode flag. ES1869 processor generated interrupt request (e.g., from Compatibility mode complete). Interrupt request generated FIFO Half Empty flag change. Used programmed interface FIFO Extended mode. Interrupt request generated counter overflow Extended mode.
Device synthesizer operates different modes: Emulation mode Native mode. Emulation mode synthesizer fully compatible with OPL3 synthesizer. Native mode synthesizer increased capabilities performance more realistic music. following register descriptions Emulation mode only. Status
(FM_Base+0h,
Reading this register returns overflow flags timers "interrupt request" from these timers (this real interrupt request supported status flag backward compatibility with OPL3 synthesizer). Bank Address
(FM_Base+0h,
bank register address. NOTE: write this register will also synthesizer Emulation mode currently Native mode.
SAM0023-122898
ES1869 DATA SHEET PORTS
Data Write
(FM_Base+1h,
MPU-401 Status
(MPU_Base+1h,
register write. data written FM_Base+1h written current address register. Note that register writes must follow timing requirements OPL3 synthesizer. High Bank Address
Definitions: Bits Name Description read data available receive FIFO, pending acknowledge byte read (0FEh). there room transmit FIFO accept another byte.
(FM_Base+2h,
High bank register address. Data Write
(FM_Base+3h,
Joystick Device joystick device uses only single port. device function modes: Analog mode Digital mode. this port different depending mode. This section describes Analog mode. Digital mode described "Joystick MIDI External Interface" page Joystick_Base+0h
register write. Writing this register Emulation mode same writing register FM_Base+1h.
MPU-401 Device MPU-401 Data
(MPU_Base+0h, R/W)
value written Joystick_Base+0h port will restart timing sequence. This should done before reading timer status flags. Joystick_Base+0h
This register used read data from MPU-401 receive FIFO command acknowledge byte (0FEh). This register also used write data MPU-401 transmit FIFO. MPU-401 Command
(MPU_Base+1h,
SW(A-D) return current state joystick switch inputs. T(A-D) return current state four one-shot timers connected resistors dual joysticks.
MPU-401 device accepts only commands: Reset/return Smart mode. This command generates acknowledge byte received when already Smart mode. UART mode. This command generates acknowledge byte received while Smart mode. ignored device already UART mode.
SAM0023-122898
ES1869 DATA SHEET PROGRAMMING ES1869
PROGRAMMING ES1869
Identifying ES1869
ES1869 identified reading mixer register successively. returns following values four successive reads: 18h, 69h, A[11:0], A[7:0] where data reads indicating part number (1869), A[11:0] base address configuration device.
Modes Operation
ES1869 operate first audio channel modes: Compatibility mode Extended mode. both modes, mixer controller registers enables application software control analog mixer, record source, output volume. Programming ES1869 Enhanced Mixer described later this document. "Programming ES1869 Mixer" page Compatibility Mode Description first mode, Compatibility mode, compatible Sound Blaster Pro. This default mode after reset. this mode, ES1869 microcontroller intermediary functions between CODEC. ES1869 microcontroller performs limited FIFO functions using bytes internal memory. Extended Mode Description ES1869 also supports Extended mode operation. this case, 256-byte FIFO used intermediary between Control registers, various Extended mode controller registers used control. ES1869 microcontroller mostly idle this mode. control handled dedicated logic. Programming Extended mode operation requires accessing various control registers with ES1869 commands. Some these commands also useful Compatibility mode, such those that configure channels.
Resetting ES1869 Software
chip reset either ways: hardware software reset. hardware reset signal comes from bus. Software reset controlled port Audio_Base+6h. reset ES1869 software: Write port Audio_Base+6h. Delay short period, example, reading back Audio_Base+6h. Write port Audio_Base+6h. loop that lasts least millisecond, poll port Audio_Base+Eh Read-Data-Available. high, read byte from port Audio_Base+Ah. Exit loop content 0AAh; otherwise, continue polling. Both hardware software reset:
Disable Extended mode. Reset timer divider filter registers
sampling.
Stop transaction progress. Clear active interrupt request. Disable voice input mixer (see D1h/
commands).
Reset Compatibility mode Extended mode
counters 2048 bytes.
analog direction DAC, with value
mid-level.
input volume 8-bit recording with Automatic Gain
Control (AGC) maximum.
input volume 16-bit recording mid-range
addition performing actions above list, hardware reset resets mixer registers default values.
SAM0023-122898
ES1869 DATA SHEET PROGRAMMING ES1869
Table Comparison Operation Modes
Compatibility Mode (Sound Blaster Pro) Sound Blaster compatible FIFO Size Mono 8-bit ADC, Mono 16-bit ADC, Stereo 8-bit Stereo 8-bit Stereo 16-bit Stereo 16-bit Signed/Unsigned Control Automatic Gain Control during recording Programmed block transfer FIFO status flags Auto reload Time base programmable timer jitter bytes (firmware managed) Yes, Yes, Yes, Yes, Yes, Firmware controlled, kHz, mono only microseconds Extended Mode bytes (hardware managed) Yes, Yes, Yes, Yes, Yes, Yes, None
Mixing Modes Recommended Avoid mixing Extended mode commands with Compatibility mode commands. Audio Enable/ Disable commands safe when using Extended mode process DAC. However, other Compatibility mode commands cause problems. Extended mode commands used channels before entering Compatibility mode.
Sound Blaster Compatible Data Formats There four formats available from combination following options:
8-bit 16-bit Mono stereo
8-bit samples unsigned, ranging from 0FFh, with DC-levels around 80h. 16-bit samples unsigned, ranging from 0000h 0FFFFh, with DC-levels around 8000h. Stereo Transfers Compatibility Mode Stereo transfers only available using rather than Direct mode commands. perform stereo transfer, first mixer register high. Then timer divider twice per-channel sample rate. maximum stereo transfer rate 8-bit data channel, this case program timer divider were mono. maximum stereo transfer rate 16-bit data channel. Stereo transfers 16-bit data allowed Compatibility mode. 8-bit data, ES1869 expects first byte transferred right channel, subsequent bytes alternate left, right etc.
Data Formats
This section briefly describes different audio data formats used ES1869. Compressed Data Formats ES1869 supports types compressed sound operations: ESPCM®, which uses variety proprietary compression techniques developed Technology, ADPCM, which supported many other sound cards lower quality. Both ADPCM ESPCM® only transferred using transfer. first block multiple-block transfer uses different command than subsequent blocks. first byte first block called reference byte. Compatibility mode when transferring compressed data.
SAM0023-122898
ES1869 DATA SHEET PROGRAMMING ES1869
16-bit data, ES1869 expects transfers multiple with repeating groups order: left byte left high byte right byte right high byte ES1869 Data Formats (Extended Mode Audio There eight formats available from combination following three options:
such which control Audio mixer input enable/disable status, command D0h, which suspends pauses DMA, acceptable send during this window. ES1869 chip sets Busy flag when command window longer open. Application software must send command within microseconds after Busy flag goes high command will confused with data. Sending command within command window easy polling done with interrupts disabled. example sending command during DMA, consider case where application wants send command middle transfer. application disables interrupts polls Busy flag. Because FIFO rules used determining command window, possible current transfer complete while waiting Busy flag clear. this event, command function, pending interrupt request from completion generated. interrupt request cleared reading port Audio_Base+Eh before enabling interrupts having signaling interrupt handler that inactive that does start transfer. Figure shows timing considerations sending command.
Mono stereo 8-bit 16-bit Signed unsigned
stereo data, data stream always alternates channels successive samples: first left, then right. 16-bit data, byte always precedes high byte. Sending Commands During Operations useful understand detailed operation sending command during DMA. ES1869 uses Audio FIFO transfers from CODEC. When FIFO full case DAC) empty case ADC), requests temporarily suspended Busy flag (bit port Audio_Base+Ch) cleared. This opens window opportunity send command ES1869. Commands
BUSY FLAG POLL BUSY WRITE COMMAND WRITE COMMAND
Figure Command Transfer Timing
µsec
Compatibility Mode Programming
This section describes Compatibility mode programming. Compatibility Mode Operation Reset Write port Audio_Base+6h. play sound without resetting ES1869 beforehand, when status analog circuits clear, mute input mixer with command prevent pops.
Enable stereo mode (optional). mixer register high. only mode. Clear mixer register after transfer. sample rate filter clock. commands sample rate filter clock divider. filter clock independent from sample rate, command addition 41h.
SAM0023-122898
ES1869 DATA SHEET PROGRAMMING ES1869
stereo transfers, timer divider twice per-channel sample rate. maximum stereo transfer rate 8-bit data channel; this case, program first timer divider were transferring data mono. maximum stereo transfer rate 16-bit data channel. block size. Only this command (48h) with High-Speed transfer modes (commands 91h). Configure system interrupt controller system controller. Start DMA. Start transfer sending command desired transfer type data length. uncompressed modes shown Table Table description commands addition commands transfers compressed data. Table Uncompressed Transfer Modes
Transfer Mode Direct mode Normal High-Speed mode Auto-Initialize High-Speed Data Length 8-bit 16-bit 8-bit 16-bit 8-bit 8-bit 16-bit 8-bit Command
only sent during certain windows opportunity. "Stereo Transfers Compatibility Mode" page After finished, restore system interrupt controller controller their idle state. Monitor FIFO Empty status flag port Audio_Base+Ch sure that data transfer completed. Delay milliseconds filter outputs settle DC-levels, then disable Audio input mixer with command D3h. 10.Issue another software reset ES1869 initialize appropriate registers. Compatibility Mode Operation ES1869 analog circuitry switched from direction direction first direct mode command (2xh). Discard first milliseconds samples because pops might occur data change from direction. direction voice input mixer automatically muted. Reset Write port Audio_Base+6h. play sound without resetting ES1869 beforehand, when status analog circuits clear, mute input mixer with command prevent pops. Select input source using register Sound Blaster three recording sources: microphone, line, auxiliary (CD). Microphone input default source after reset. ES1869 four recording sources: microphone, line, auxiliary (CD), mixer. mixer register choose additional source. Program input volume. selected source passes through input volume stage that programmed with levels gain from +22.5 steps 8-bit recordings (other than High-Speed mode), volume stage controlled ES1869 firmware purposes automatic gain control (AGC). 16-bit recordings well High-Speed mode 8-bit recordings, input volume stage controllable from application software. command change input volume level from reset default mid-range, Enable stereo mode (optional). mixer register high. only mode. Clear mixer register after transfer.
Delay approximately milliseconds allow analog circuits settle, then enable Audio input mixer with command D1h. During DMA. Auto-Initialize mode, necessary send commands ES1869 interrupt time, except read Audio_Base+Eh clear interrupt request. Normal mode, initialize system controller with address count next block size changes. command 48h. start next transfer, command D4h. stop after current auto-initialize block finished, command D0h. Commands such D3h, which control Audio mixer input enable/disable status, command D0h, which suspends DMA, acceptable send during transfers. These commands
SAM0023-122898
ES1869 DATA SHEET PROGRAMMING ES1869
sample rate filter clock. commands sample rate filter clock divider. want filter clock independent from sample rate, command addition 41h. stereo transfers, timer divider twice per-channel sample rate. maximum stereo transfer rate 8-bit data channel; this case, program first timer divider were transferring data mono. maximum stereo transfer rate 16-bit data channel. block size. Only this command (48h) with High-Speed transfer modes (commands 99h). Configure system interrupt controller system controller. Start DMA. Start transfer sending command desired transfer type data length. uncompressed modes shown Table Table description commands addition commands transfers compressed data. Table Uncompressed Transfer Modes
Transfer Mode Direct mode Normal High-Speed mode Auto-Initialize High-Speed Data Length 8-bit 16-bit 8-bit 16-bit 8-bit 8-bit 16-bit 8-bit Command
stop after current auto-initialize block finished, command D0h. Commands such D0h, which suspends DMA, acceptable send during transfers. These commands only sent during certain windows opportunity. "Writing Commands ES1869 Controller Registers" page After finished, restore system interrupt controller controller their idle state. Monitor FIFO Empty status flag port Audio_Base+Ch sure that data transfer completed. 12.Issue another software reset ES1869 initialize appropriate registers. maximum sample rate Direct mode kHz. maximum sample rate both 8-bit 16-bit kHz, using commands 24h, 25h, 2Ch, 2Dh. There special High-Speed mode that allows 8-bit sampling kHz. This mode uses commands (auto-initialize) (normal). performed input volume controlled with command DDh.
Extended Mode Programming
This section describes Extended mode programming. Commanding ES1869 Controller Registers Controller registers written read from using commands sent ports Audio_Base+Ch Audio_Base+Ah. Commands format Axh, Bxh, Cxh, where numeric value, used Extended mode programming first audio channel. Commands format used access ES1869 controller registers. convenience, registers named after commands used access them. example "register A4h," Audio Transfer Count Reload (low-byte) register, written "command A4h."
Enabling Extended Mode Commands
Delay approximately milliseconds allow analog circuits settle, then enable Audio input mixer with command D1h. 10.During DMA. Auto-Initialize mode, necessary send commands ES1869 interrupt time, except read Audio_Base+Eh clear interrupt request. Normal mode, initialize system controller with address count next block size changes. command 48h. start next transfer, command D4h.
After reset, before using Extended mode commands first send command enable Extended mode commands. ES1869 Command/Data Handshaking Protocol This section describes write commands read data from ES1869 controller registers.
Writing Commands ES1869 Controller Registers
Commands written ES1869 enter write buffer. Before writing command, make sure buffer busy.
SAM0023-122898
ES1869 DATA SHEET PROGRAMMING ES1869
port Audio_Base+Ch ES1869 Busy flag. when write buffer full when ES1869 otherwise busy (for example, during initialization after reset during Compatibility mode requests). write command data byte ES1869 microcontroller: Poll port Audio_Base+Ch until clear. Write command/data byte port Audio_Base+Ch. following example writing ES1869 controller registers. Audio Transfer Count Reload register F800h, send following command/data bytes:
A4h, 00h; register A5h, F8h; register
Extended Mode Audio Operation Follow steps below program first audio channel Extended mode operation: Reset Write port Audio_Base+6h, instead Compatibility mode. high specifically clears FIFO. remainder software reset identical Compatibility mode. Reset disables Audio input mixer. This intended mask pops created during setup transfer. After reset, send command enable Extended mode commands. Program direction type: registers B8h, A8h, B9h: Register B8h: Normal mode, high Auto-Initialize mode. Leave CODEC direction. Register A8h: read this register preserve bits then modify only bits Bits Bits Mono Stereo
NOTE: port Audio_Base+Ch write buffer shared with Compatibility mode write operations. When active, Busy flag cleared during windows time when command received. Normally, only commands that should sent during operations commands such pause/continue Audio enable/disable. this situation recommended disable interrupts between time that Busy polled command written. Also, minimize time between these instructions. "Sending Commands During Operations" page more information.
Reading Read Data Buffer ES1869
register B9h: Bits Bits Bits Single transfer DMA. Demand Transfer DMA: bytes request. Demand transfer DMA: bytes request.
Command used read ES1869 controller registers used Extended mode. Send command followed register number, Bxh. example, read register A4h, send following command bytes:
C0h,
Clocks counters: registers A1h, A2h, A5h: Register A1h: Sample Rate Clock Divider Register A2h: Filter Clock Divider Registers A4h/A5h: Audio Transfer Count Reload register low/high byte, two's complement Initialize configure DACs: registers B7h: Table Register B6h: signed data unsigned data. This also initializes CODEC transfer. Register B7h: programs FIFO (16-bit/8-bit, signed/ unsigned, stereo/mono).
Then poll Read-Data-Buffer-Status bit, port Audio_Base+Eh, before reading register contents from port Audio_Base+Ah. Read-Data-Buffer-Status flag polled reading port Audio_Base+Eh. When byte available, high. NOTE: read port Audio_Base+Eh also clears active interrupt request from ES1869. alternate polling Read-Data-Buffer-Status through port Audio_Base+Ch, which same flag. Read-Data-Buffer-Status flag cleared automatically reading byte from port Audio_Base+Ah.
SAM0023-122898
ES1869 DATA SHEET PROGRAMMING ES1869
Table Command Sequences Playback
Mono Stereo 8-bits 16-bits Unsigned Signed Sequence 80h, 51h, 00h, 71h, 80h, 51h, 00h, 71h, 80h, 51h, 00h, 71h, 80h, 51h, 00h, 71h,
Normal mode, initialize system controller with address count next block transfer. Update ES1869 Transfer Count registers count changed. start next transfer, clear register B8h, then high again. stop transaction progress, clear register B8h. stop transaction after current auto-initialize block finished, clear register B8h, wait interrupt, then clear register B8h. After finished: Restore system interrupt controller controller their idle state. Monitor FIFO Empty status flag port Audio_Base+Ch sure data transfer completed. delay milliseconds required filter outputs settle DC-levels, then disable first input mixer with command D3h. 12.Finally: Issue another software reset ES1869 initialize appropriate registers. Extended Mode Audio Operation Follow steps below program first audio channel Extended mode operation: NOTE: Extended mode, there Automatic Gain Control (AGC) performed while recording. necessary, 16-bit recordings perform system software. Reset Write port Audio_Base+6h instead Compatibility mode. high specifically clears FIFO. remainder software reset identical Compatibility mode. Reset disables Audio input mixer. This intended mask pops created during setup transfer. Send command enable Extended mode commands. Select input source: ES1869 four recording sources: microphone, line, auxiliary mixer. mixer source playback mixer record mixer. Bits mixer register selects mixer source. record mixer default. Microphone input default after reset. Select source using mixer control register 1Ch. Program input volume register B4h. Program direction type: registers B8h, A8h:
Enable/select channel channel, registers B2h: Register B1h: Interrupt Configuration register. Make sure bits high. Clear bits Register B2h: Configuration register. Make sure bits high. Clear bits Configure system interrupt controller controller. start DMA: register high while preserving other bits. Delay approximately milliseconds allow analog circuits settle, then enable Audio input mixer with command D1h. 10.During Auto-Initialize transfers, read Audio_Base+Eh clear interrupt request. send other commands ES1869 interrupt time.
SAM0023-122898
ES1869 DATA SHEET PROGRAMMING ES1869
Register B8h: high program CODEC direction. Normal mode, high Auto-Initialize mode. this point direction analog circuits rather than DAC. Unless recording monitor enabled, there will output from AOUT_L AOUT_R until direction restored DAC. Register A8h: read this register first preserve bits modify only bits Bits Bits Register B9h: Bits Bits Bits Single Transfer Demand Transfer: bytes request Demand Transfer: bytes request Mono Stereo Disable Record Monitor
Table Command Sequence Record
Mono Stereo 8-bits 16-bits Unsigned Signed Sequence 51h, 71h, 51h, 71h, 51h, 71h, 51h, 71h,
10.Enable/select channel channel, registers B2h: Register B1h: Interrupt Configuration register. Verify that bits high. Clear bits Register B2h: Configuration register: Verify that bits high. Clear bits Configure system interrupt controller controller. 12.To start DMA: register high. Leave other bits unchanged. 13.During Auto-Initialize transfers, send commands ES1869 interrupt time, except reading Audio_Base+Eh clear interrupt request. Normal mode, initialize system controller with address count next block transfer. Update ES1869 Transfer Count registers count changed. start next transfer, clear register B8h, then high again. stop transaction progress, clear register B8h. stop transaction after current auto-initialize block finished, clear register B8h, wait interrupt, then clear register B8h.
Clocks counters: registers A1h, A2h, A5h: Register A1h: Sample Rate Clock Divider. high sample rates greater than kHz. Register A2h: Filter Clock Divider. Registers A4h/A5h: Audio Transfer Count Reload register low/high, two's complement Delay milliseconds allow analog circuits settle. Enable Record Monitor desired: Register Enable Record Monitor (optional). Initialize configure ADC: register B7h. Table first command sent register initializes prevents pops. Register B7h: programs FIFO (16-bit/8-bit, signed/ unsigned, stereo/mono).
SAM0023-122898
ES1869 DATA SHEET PROGRAMMING ES1869
14.After finished: Restore system interrupt controller controller their idle state. 15.Finally: Issue another software reset ES1869 initialize appropriate registers. This returns ES1869 direction turns record monitor. Extended Mode Programmed Operation OUTSB instruction 80x86 family transfers data from memory port specified register. INSB instruction complementary function. ES1869 port Audio_Base+Fh block transfers. transfers FIFO nearly identical process, except that access port Audio_Base+Fh replaces cycle. Some differences described here. program this mode useful understand FIFO Half-Empty flag generates interrupt request. interrupt request generated rising edge FIFO Half-Empty flag. This flag polled reading port Audio_Base+Ch. meaning this flag depends direction transfer: FIFOHE flag high 0-127 bytes FIFO FIFOHE flag high 128-256 bytes FIFO
NOTE: ES1869 designed block transfer speed 8.33 MHz.
Programmed Operation
Programmed operation done just explained under "Extended Mode Audio Operation" page with following exceptions:
step programming register
unnecessary.
step leave bits register low.
register high enable interrupt FIFO half-empty transitions. Keep register low.
step addition setting register
high, send OUTSB command.
Programmed Operation
Programmed operation done just explained under "Extended Mode Audio Operation" page with following exceptions:
step programming register
unnecessary.
step leave bits register low.
register high enable interrupt FIFO half-empty transitions. Keep register low.
step addition setting register
high, send OUTSB command. Second Audio Channel Operation Follow steps below program second audio channel operation. Reset Write port Audio_Base+6h, instead Compatibility mode. high specifically clears FIFO. remainder software reset identical Compatibility mode. reset playback mixer volume second audio channel zero, register 7Ch. This masks pops that might occur during setup process. Program transfer type: register 78h: Register 78h: Normal mode, high Auto-Initialize mode. Bits Bits Bits Bits Single Transfer Demand Transfer DMA: bytes request. Demand transfer DMA: bytes request. Demand transfer DMA: bytes request.
SAM0023-122898
Therefore, operations, interrupt request generated when number bytes FIFO changes from 128. This indicates system processor that bytes safely transferred without over-filling FIFO. Before first interrupt generated, FIFO needs primed, filled, with more than bytes. Keep mind that data taken FIFO while being filled system processor. that case, there never bytes FIFO unless somewhat more than bytes transferred. Polling ES1869 FIFOHE flag sure goes interrupt handler when priming FIFO) perhaps sending second block bytes solution this problem. ADC, interrupt request generated when number bytes FIFO changes from 128, indicating that system processor safely read bytes from FIFO. Before first interrupt generated, FIFO should emptied mostly reading from Audio_Base+Fh polling FIFOHE flag. safe FIFO reset port Audio_Base+6h indiscriminately clear FIFO, because data out-of-sync. mode, register enables transfers between system FIFO inside ES1869.
ES1869 DATA SHEET PROGRAMMING ES1869
Clocks counters: registers 70h, 72h, 76h: Register 70h: Sample Rate Generator Register 72h: Filter Clock Divider Registers 74h/76h: Audio Transfer Count Reload register low/high, two's complement Initialize configure DAC: register 7Ah. Register 7Ah: high signed data, unsigned. high stereo, mono. high 16-bit samples, 8-bit. Enable channel, register 7Ah: Register 7Ah: Audio Control register. unmasks channel IRQ. Configure system interrupt controller controller. start DMA: bits register high. Delay approximately milliseconds allow analog circuits settle,
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