BW1217X bw1217x CMOS 10-bit converter video applications. three-s

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BW1217X bw1217x CMOS 10-bit converter video applications. three-s

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0.35µm 10-BIT 30MSPS
BW1217X
bw1217x CMOS 10-bit converter video applications. three-step pipelined converter which consists sample hold, multiplying DACs, three 4-bit flash ADCs. maximum conversion rate bw1217x 30MSPS supply voltage 3.3V single.
TYPICAL APPLICATIONS
computer based video signal processing such multi-media, scanner, etc. General Purpose video applications including camcorder, digital video, broad-casting studio equipments. Medical electronics such digital scope, transit recorder, radar.
FEATURES
Resolution: 10Bit Differential Linearity Error: ±1.0 Integral Linearity Error: ±2.0 Maximum Conversion Rate: 30MSPS Sample Hold Function Implemented Power Consumption: 82.5mW(Typ) Power Supply: 3.3V Single Operation Temperature Range: 0°C~70°C
BW1217X
0.35µm 10-BIT 30MSPS
FUNCTIONAL BLOCK DIAGRAM
VDDA AINT AINC REFTOP REFBOT Flash Flash Flash MDAC MDAC VSSA VBBA VDDD VSSD VBBD DO[9] DO[8] GEN. DO[7] DO[6] DO[5] ITEST STBY CKIN Main Bias Clock GEN. Digital Logic DO[4] DO[3] DO[2] DO[1] DO[0]
0.35µm 10-BIT 30MSPS
BW1217X
CORE DESCRIPTION
Name AINT AINC REFMID REFTOP REFBOT VDDA VSSA VBBA ITEST STBY CKIN DO[9:0] VBBD VSSD VDDD Type Abbr. Analog Input Digital Input Analog Output Digital Output Analog Bidirectional Digital Bidirectional Analog Power Digital Power Analog Ground Digital Ground Type piar50_bb piar50_bb pia_bb pia_bb pia_bb vdda vssa vbba pia_bb picc_bb picc_bb pia_bb pot2_bb pot2_bb pot2_bb vbba vssd vddd Description Analog Input Input Range: 1.9V 1.4V Analog Input Input Range: 1.4V 1.9V Reference Point (Test Pin) Reference (1.9V) Reference Bottom(1.4V) Analog Power (3.3V) Analog Ground Analog Bias open internal bias point high power saving standby mode (normally gnd) Sampling Clock Input Internal Bias Point (Test Pin) Digital Output Overflow Underflow Digital Bias Digital Ground Digital Power
BW1217X
0.35µm 10-BIT 30MSPS
CODE CONFIGURATION
VDDD
VDDA
VSSD
VBBD
VSSA
VBBA
AINT AINC REFTOP REFBOT CKIN STBY
BW1217X
DO[9:0]
REFMID
ITEST
0.35µm 10-BIT 30MSPS
BW1217X
ABSOLUTE MAXIMUM RATINGS
Characteristic Supply Voltage Analog Input Voltage Digital Input Voltage Digital Output Voltage Storage Temperature Range Symbol VOH, Tstg Value Unit
NOTES: ABSOLUTE MAXIMUM RATING specifies values beyond which device damaged permanently. Exposure ABSOLUTE MAXIMUM RATING conditions extended periods affect reliability. Each condition value applied with other values kept within following operating conditions function operation under these conditions implied. voltages measured with respect unless otherwise specified. 100pF capacitor discharged through 1.5K resistor (Human body model)
RECOMMENDED OPERATING CONDITIONS
Characteristics Supply Voltage Supply Voltage Difference Reference Input Voltage(Externally) Analog Input Voltage Analog Input Voltage Operating Temperature Symbol VDDA VSSA VDDD VSSD VDDA VDDD REFTOP REFBOT AINT AINC Topr 3.15 -0.1 3.45 Unit
NOTE: strongly recommended that supply pins (VDDA, VDDD) powered from same source avoid power latch-up.
BW1217X
0.35µm 10-BIT 30MSPS
ELECTRICAL CHARACTERISTICS
Characteristics Resolution Reference Current Differential Linearity Error Integral Linearity Error Bottom Offset Voltage Error Offset Voltage Error Symbol IREF ±1.0 ±2.0 Unit Bits AINT: 1.2V (Ramp Input) Fck: 1MHz Conditions
NOTES: Converter Specifications (unless otherwise specified) VDDA=3.3V VDDD=3.3V VSSA=GND VSSD=GND Ta=25°C TBD: Determined
ELECTRICAL CHARACTERISTICS
Characteristics Maximum Conversion Rate Symbol Unit MSPS Conditions AINT: 1MHz Sine Signal (source resolution 12bit) 30MHz (without system load) AINT 1MHz 30MHz
Dynamic Supply Current Signal Noise Ratio
Ivdd
0.35µm 10-BIT 30MSPS
BW1217X
TIMING DIAGRAM (MAIN FUNCTION)
AINT
CLOCK
hold
track
hold
track
hold
track
hold
track
hold
track
FLASH1
sample amplify precharge
latch track
latch encoding input sample residue amplify
MDAC1
input sample
residue amplify
FLASH2
sample amplify precharge
latch track
latch encoding input sample residue amplify
MDAC2
input sample
residue amplify
FLASH3
sample amplify precharge
latch track
latch encoding DATA
DATA
BW1217X
0.35µm 10-BIT 30MSPS
FUNCTIONAL DESCRIPTION
bw1217x three step Converter comprising three 4-bit flash multiplying DAC. N-bit flash composed 2(n-1) latching comparators, multiplying composed 2*(N+2) capacitors fully-differential amplifier. bw1217x operates follows. During first cycle external clock analog input data tracked sampled, input held from rising edge external clock, which first 4-bit flash ADC, first multiplying DAC. Multiplying reconstructs voltage corresponding first 4-bit ADC's output, finally amplifies residue voltage second 4-bit flash ADC, MDAC worked same manner, finally amplifiers residue voltage, which difference between first MDAC's output reconstructed voltage third 4-bit flash ADC, MDAC worked previous stages. bw1217x error correction scheme, which handles output from mismatch first, second third flash ADC.
MAIN BLOCK DESCRIPTION
SAH(track hold) circuit that samples analog input signal holds that value until next sampletime. good small different value between analog input signal output signal. gain must higher than 66dB least less than 1/2LSB error voltage 10bit conversion frequency 30MHz, settling-time must shorten than 12ns. This consist fully differential amp, switching sampling capacitor. sampling clock non-overlapping clocks(Q1,Q2) sampling capacitor value 1.2pF. uses independentbias protect interruption other circuit. designed that open-loop gain higher than 70dB, phase margin higher than 60degree. input block designed rail-to-rail architecture using complementary differential pair. FLASH 4-bit flash converter compares analog signal(SAH output) with reference voltage, that result transfers MDAC digital correction logic block. realized fully differential comparators 15EA. Considering selfoffset, dynamic feed through error, should distinguish 40mV least. First, comparators charge reference voltage sampling capacitors before transferred output. works this process discharges this sampling capacitors. That comparators compare relative different values dual input voltage with dual reference voltage. output during operation stored pre-latch block Q1P. MDAC MDAC most important block this decides characteristics. MDAC consist amp1,amp2, selection logic capacitor array(c_array). C_array's compositions capacitors charge analog input reference voltage, Switches control path. Selection logic controls c_array internal switches. high, selection's output low, switches tsw1 off, switches tsw2 Therefore capacitors c_array charges analog input values held SAH. high, reversed final MDAC output voltage described following equation. Vout (AIN Vref)*8-Vref/2 AIN=AINT-1.5V
0.35µm 10-BIT 30MSPS
BW1217X
CORE EVALUATION GUIDE
function evaluated external check bidirectional pads connected input nodes HOST back-end circuit. reference voltages biased internally through resistor divider.
1.9V
1.4V
REFTOP STBY AINT AINC CKIN
REFBOT Power Used: VDDA, VDDD, VBBD, VSSA, VSSD, VBBA DO[9:0] Digital DO[9:0] HOST CORE
BW1217X
REFMID ITEST
DO[9:0] Bidirectional (ADC Function Test Externally Forced Digital Input)
NOTES: 10uF electrolytic capacitor unless otherwise specified 0.1uF ceramic capacitor unless otherwise specifed
BW1217X
0.35µm 10-BIT 30MSPS
PACKAGE CONFIGURATION
NOTES test function checking external bidirectional connected internal signal path. (Electro Static Discharge) sensitive device. Although digital control inputs diode protected, permanent damage occur devices subjected high electrostatic discharges. recommended that unused devices stored conductive foam shunts avoid performance degradation loss functionality. protective foam should discharged destination socket before devices inserted. denotes Connection".
Reference Reference Bottom
3.3V Digital Power
VDDD
VDDD
VSSD
VSSD
REFBOT
REFTOP
3.3V Analog Power Video-in
VDDA VDDA VBBA VSSA
VBBD
VSSA AINT REFMID ITEST STBY VDDR TRISTATE VSSR CKIN
BW1217X
D<9> D<8> D<7> D<6> D<5> D<4> D<3> D<2> D<0> D<1> Digital Output Bits Through
NOTES: 10uF electrolytic capacitor unless otherwise specified 0.1uF ceramic capacitor unless otherwise specifed
Digital Output Bits
0.35µm 10-BIT 30MSPS
BW1217X
PACKAGE DESCRIPTION
Name REFTOP REFBOT VDDA VBBA VSSA AINT AINC REFMID ITEST STBY VDDR VSSR CKIN TRISTATE DO[9:0] VBBD VSSD VDDD 9,10 27~36 45,46 47,48 Type Description External Reference Bias.(1.9V) External Reference Bottom Bias.(1.4V) Internal Bias Point (Test Pin) 3.3V Analog Power Analog Bias Analog Ground Analog Input Input Range: 1.4~1.9V Analog Input. Input Range: 1.9~1.4V Reference Point (Test Pin) open=use internal bias point High power saving standby mode (normally gnd) Ouput Driver Power (3.3V) Output Driver Ground Sampling Clock Input high high impedance digital output (normally gnd) Digital Output Underflow Overflow Digital Substrate Bias Digital Ground Digital Power(3.3V)
NOTE: TYPE denote Power Ground respectively.
BW1217X
0.35µm 10-BIT 30MSPS
USER GUIDE
Resolution Control. Modular structure most important feature bw1217x. resolution want combining each primary module (MDAC FLASH) without major circuit change. means don't have redesign most difficult analog block another resolution. this simple resolution control method limit 10bits, otherwise internal op-amp must redesigned.
module
mdac1
mdac2
flash1
flash2
flash3
dclogic
10-bit
Speed initial target speed bw1217x 30MHz, proved operate well 35MHz more design margin. Input Range Variation. default input this differential -0.5V +0.5V. bias voltages both AINT AINC 0.2V~1.2V, their offset 0.7V. order change another input voltage range, alter voltage values AINT AINC after setting Reftop Refbot maximum value input range. want single ended input, AINC 0.7V ground internal input voltage level V(aint)-0.7V. Verilog Modeling Verilog modeling needs 64bits only analog real signal.
0.35µm 10-BIT 30MSPS
BW1217X
FEEDBACK REQUEST
should quite helpful core development specify your system requirements following characteristic cheking table fill additional questions. appreciate your interest products. Thank very much. Characteristic Analog Power Supply Voltage Digital Power Supply Voltage Resolution Reference Input Voltage Analog Input Voltage Operating Temperature Integral Non-linearity Error Differential Non-linearity Error Bottom Offset Voltage Error Offset Voltage Error Maximum Conversion Rate Dynamic Supply Current Power Dissipation Signal-to-noise Ratio Pipeline Delay Digital Output Format (Provide detailed description timing diagram) Between single input-output differential input-output configurations, which suitable your system why? Please comment internal/external configurations want have, have reason prefer some type configuration. Freely list those functions want implemented ADC, have any. Unit MSPS Remarks
BW1217X
0.35µm 10-BIT 30MSPS
NOTES

BW1217X bw1217x CMOS 10-bit converter video applications. three-s

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