| The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers. |
FN1243 converter MODEL FN1243 Specifications DIGIT
Top Searches for this datasheetNSdap FN1243 converter MODEL FN1243 Specifications DIGITAL AUDIO FLUENCY TYPE DATA COMPENSATION FILTER BUILT-IN D-class HEADPHONE AMPLIFIER BUILT-IN NIIGATA SEIMITSU CO., LTD. FDS01221001 001214 1/16 FN1243 SUMMERY NSdap FN1243 2CH-1 converter 24-bit digital audio. fluency type data compensation filter built-in. Output designed drive headphone. Simple external components make this D-class amplifier. Various functions controlled with 3-wire serial interface. FEATURES 24-bit, over sampling Fluency type data compensation digital filter built-in. 90dB load=33 THD+N load=33 0.01 load=20 Sampling frequency32 KHz96 Left justified MSB, Right justified MSB, format (16//18/20/24 interface). System clock Functions Attenuator (8-bit step, independent, taper) Digital De-emphasis 44.1 Soft mute Equalizer BASS TREBLE Power down function Power supply voltage Digital (VDD) 2.7V 3.6V Analog (VCC) 2.7V 5.5V Package 16pin TSSOP/CSP (chip size package) APPLICATIONS converter Class-D Headphone(or small Speaker) Portable audio equipment like CD/DVD/MP3 players, player Celluar Phone Combination with Class-AB Note-book Mini-compo other digital audio system. Connect Switching Power output line make high power audio-amp with power-consumption FDS01221001 001214 2/16 NIIGATA SEIMITSU CO., LTD. NSdap Block diagram FN1243 DIGITAL ANALOG DRIVER LRCK SERIAL INTERFACE FLUENCY INTERPOLATOR with FUNCTION CONTROLLER OUTL MODULATOR DRIVER DRIVER OUTR MODE CONTROL INTERFACE POWER SUPPLY SYSCLK DGND Layout TSSOP Terminals Name SYSCLK DGND LRCK OUTR AGND OUTL RSTB Function Function control data Function control clock System clock Digital power supply (3.3V) Digital ground clock Audio data clock input Power down signal analog audio output Analog ground Common output Analog power supply, analog audio output Internal reset signal Function control latch SYSCLK DGND LRCK RSTB OUTL AGND OUTR NIIGATA SEIMITSU CO., LTD. RSTB AGND FDS01221001 001214 3/16 FN1243 Electrical characteristics NSdap Absolute maximum ratings Ta=25VSS=0V Item Symbol Ratings UNIT -0.3 +4.0 Power supply voltage -0.3 +6.5 -0.2 Input voltage -0.2 Output voltage Storage Temperature Tstg Note: Absolute maximum ratings highest value which doesn't harm chip. doesn't guarantee normal function. Recommended operational conditions Item Digital power supply Power supply voltage Analog power supply Environmental temp. Load resistance Analog characteristics Unless otherwise specified, Ta=25, AVDD/DVDD=3.3V, fs=44.1KHz, RL=33, Signal 1KHz bit, Measuring range 20KHz Item Condition THD+N Dynamic characteristics Dynamic range ratio Channel separation output On-state resistance Maximum range Center voltage RL=20K A-Weight A-Weight 1KHz RL=20K RL=20K 0.01 0.66*VCC VCC/2 UNIT mW/ch Symbol UNIT characteristics Analog output Maximum output power Ivdd Power supply current Ivcc Note-3 Note-1 When external coil Precision System2 Casecade. Note-3 This current value mesured without load. currency will increase according load. Note-2 above items were measured with evaluation board EVB1243, Audio When FN1243 used, FDS01221001 001214 4/16 NIIGATA SEIMITSU CO., LTD. NSdap characteristics Item Input logic level Output logic level Symbol 0.7*VDD VCC-0.6 FN1243 0.3*VDD UNIT characteristics Item Sampling frequency System clock frequency Symbol fsck 44.1 UNIT LRCK tDCY tDCH tDCL Item pulse cycle pulse width level pulse width level rise LRCK edge LRCK edge edge setup time hold time Symbol tDCY tDCH tDCL tSDS tSDH UNIT LRCK tSCY SYSCLK tSCH tSCL NIIGATA SEIMITSU CO., LTD. FDS01221001 001214 5/16 FN1243 Item SYSCLK pulse cycle SYSCLK pulse width level SYSCLK pulse width level SYSCLK rise LRCK edge LRCK edge SYSCLK rise Symbol tSCY tSCH tSCL NSdap UNIT RSTB tRSTB Item RSTB pulse width Symbol tRSTB UNIT FDS01221001 001214 6/16 NIIGATA SEIMITSU CO., LTD. NSdap Terminals RSTB FN1243 Reset internal circuit setting this terminal "Low". Function setup register initialized. this terminal "Low" fixes OUTL OUTR terminals level when overload detected external driver circuit. terminal also fixed level. While time RSTB terminal change makes output terminal level, internal circuit delays. there influence clock. this terminal "Low" enables power down function. While this terminal "Low", OUTL OUTR terminals kept "GND" level. Operation after terminal changed from "Low" "High" shown below. Note SYSCLK, LRCK inputs shall applied normally. Start internal operation. Outputs fixed GND. Operate input data "-FS" /fs. output shifts from "-FS" "BPZ" time 1024/fs Attenuation value shifts from -db. Operation after terminal changed form "High" "Low" shown below Attenuation value shifts from current value output value shifts from "-BPZ" "-FS" time 1024/fs outputs level. Stop internal clock SYSCLK Setup value Attenuation value 256/fs 256/fs Output value 1024/fs 1024/fs 128/fs NIIGATA SEIMITSU CO., LTD. FDS01221001 001214 7/16 FN1243 System clock Reference sample 32kHz 44.1kHz 48kHz 96kHz Function setting 512fs system frequency (MHz) 16.384 22.5792 24.576 49.152 NSdap Transmitting serial data terminals enables function control.Serial control data with 16-bit data. Register mapping below: MODE0 MODE1 MODE2 MODE3 D-MUT MODE4 signals input timing below: tMC(min) 200ns, tDC(min) tCD(min) tML(min) 100ns Control register mode control basically basic mode registers (MODE0 MODE4). 16-bit serial data selects register contents. Choose first register with bit, then other controls desired functions. Selection control register mode Register MODE0 MODE1 MODE2 MODE3 MODE4 FDS01221001 001214 8/16 NIIGATA SEIMITSU CO., LTD. NSdap IW2, IW1, These control registers choose audio input data format data length. Audio Format right justified right justified right justified right justified left justified left justified left justified left justified FN1243 Default Attenuator MODE0 MODE1 digital control registers. AL7-AL0(Lch)AR7-AR0(Rch) each (AL7, MSB, control attenuator with steps respectively. used attenuator value. enables attenuator setup value. When both "0", Attenuator value setup valid, actual attenuator value keeps previous value. It's updated when becomes Shift time from 256/fs. Attenuation values given with this formula. DATA: Attenuator setup value FFh6B FEh5.75B F7h0B 01h5.75B 00h-(MUTE) NIIGATA SEIMITSU CO., LTD. FDS01221001 001214 9/16 FN1243 Driver mute control D-MUT Soft mute Default Enables drivers soft mute. NSdap Soft mute Soft mute Enables soft mute. Default Attenuator control Attenuator control Default Lch/Rch Independent Lch/Rch Common AL7-0 used attenuation level AR7-0 attenuation level when ATC=0. AL7-0 used Attenuation Level both Lch/Rch when ATC=1. Common signal output control signal output Default Outputs signal drive common terminal headphone when BPZ=1.This terminal drive headphone direct without adding capacitor filter. LRCK polarity control LRCK polarity Default Lch:H, Rch:L Lch:L, Rch:H register inverse LRCK clock polarity normal data form LRCK clock polarity select control. FDS01221001 001214 10/16 NIIGATA SEIMITSU CO., LTD. NSdap FN1243 De-emphais sontrol De-emphais De-emphais sontrol Default 48kHz 44.1kHz 32kHz Select coefficient according de-emphasis filter On/Off sampling frequencies. Audio input signal Logic inverse control LRCK, BCK, logic Default Positive logic input Negative logic input Inverse logic input signal LRCK, BCK, DIN. Normal logic when INV=0. Take "not" from input signal internally when INV=1. Output control output output Defaul data data data output inversed output inversed data (L+R)/2 output inversed Select 0M1, corresponds single output output. Normal stereo output when 0M1, 0M0=00. exclusive output when 0M1, 0M0=01. exclusive output when 0M1, 0M0=10 Monaural data generated output when 0M1, 0M0=11 NIIGATA SEIMITSU CO., LTD. FDS01221001 001214 11/16 FN1243 Equalizer characteristics Bass boost level +2dB +4dB +6dB +8dB +10dB +12dB +12dB -2dB -4dB -6dB -8dB -10dB -12dB -12dB Default NSdap Bass boost level +2dB +4dB +6dB +8dB +10dB +12dB +12dB -2dB -4dB -6dB -8dB -10dB -12dB -12dB Default next page equalizer frequency characteristics FDS01221001 001214 12/16 NIIGATA SEIMITSU CO., LTD. NSdap Equalizer frequency characteristics 44.1 sampling FN1243 44.1kHzBass Equalizer Bass characteristics Amplitude [dB] [dB] 0.01 [kHz] Frequency [KHz] 44.1kHz Treble Equalizer Treble characteristics Amplitude [dB] [dB] 0.01 Frequency [KHz] [KHz] NIIGATA SEIMITSU CO., LTD. FDS01221001 001214 13/16 FN1243 Audio format LRCK LRCK NSdap Justified Justified 16bit 16-bit 18-bit 20-bit 18bit 20bit 24bit 24-bit 16bit 16-bit 18-bit 20-bit 24-bit 18bit 20bit 24bit Operation synchronic phase SYSCLK+/-10 clock max. allowable when LRCK shifts against SYSCLK, there definition about phase between LRCK SYSCLK though. Operation becomes intermittent when more shift appears because internal synchronization recovery starts This intermittent operation influences analog outputs. digital filter output order suppress this influence minimum. When synchronizing recovered, attenuation reset pre-determined value with digital attenuator Internal condition Normal operation Setup value Synchronizing Normal operation Setup value Attenuation value FDS01221001 001214 14/16 NIIGATA SEIMITSU CO., LTD. NSdap Application example FN1243 OUTL/R 100uH Filmac TU02M TU02M 220F 0.1F Headphone Fc=40kHz Filmac TU02M TU02M Fc=28Hz OUTL/R 100uH 0.1uF 100uF 10uH Headphone Filmac TU02M TU02M Filmac TU02M Frequency characteristics Filmac improves Gain[dB] Frequency [MHz] 1000 NIIGATA SEIMITSU CO., LTD. FDS01221001 001214 15/16 FN1243 Package Marking NSdap TSSOP16 Year code Week code FDS01221001 001214 16/16 NIIGATA SEIMITSU CO., LTD. Other recent searchesTS9015 - TS9015 TS9015 Datasheet N32T1630C1C - N32T1630C1C N32T1630C1C Datasheet MAX5089 - MAX5089 MAX5089 Datasheet ECS6416AHCN-A - ECS6416AHCN-A ECS6416AHCN-A Datasheet BAT54WS - BAT54WS BAT54WS Datasheet
Privacy Policy | Disclaimer |