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34x2G Multistandard Sound Processor Family with Dolby Logic
Edition June 2003 6251-520-1DS
34x2G
Contents Page Section 1.1. 1.2. 1.3. 1.4. 2.1. 2.2. 2.2.1. 2.2.2. 2.2.3. 2.2.4. 2.2.5. 2.3. 2.4. 2.5. 2.5.1. 2.5.2. 2.5.3. 2.5.4. 2.5.5. 2.5.6. 2.5.6.1. 2.5.6.2. 2.5.6.3. 2.6. 2.6.1. 2.6.1.1. 2.6.1.2. 2.6.2. 2.6.2.1. 2.6.2.2. 2.6.2.3. 2.6.2.4. 2.6.3. 2.6.4. 2.6.4.1. 2.6.4.2. 2.6.4.3. 2.6.4.4. 2.6.5. 2.6.6. 2.6.7. 2.7. 2.7.1. 2.7.2. Title Introduction Features Features 34x2G Family 34x2G Version List 34x2G Versions their Application Fields Functional Description Architecture 34x2G Family Sound Processing Analog Sound Input Demodulator: Standards Features Preprocessing Demodulator Signals Automatic Sound Select Manual Mode Preprocessing SCART Input Signals Source Selection Output Channel Matrix Audio Baseband Processing (optional) Automatic Volume Correction (AVC) Loudspeaker Headphone Outputs Subwoofer Output Quasi-Peak Detector Micronas BASS (MB) Dynamic Amplification Adding Harmonics Micronas BASS Parameters Surround Processing Output Configuration AUX/CS Switch Channel Configuration Surround Processing Mode Decoder Matrix Surround Reproduction Center Modes Useful Combinations Surround Processing Modes Examples Application Tips using 3D-PANORAMA Sweet Spot Clipping Loudspeaker Requirements Cabinet Requirements Input Output Levels Dolby Surround Logic Mode Subwoofer Surround Mode Equalizer Surround Mode SCART Signal Routing SCART SCART Select Stand-by Mode
June 2003; 6251-520-1DS
Micronas
34x2G
Contents, continued Page Section 2.8. 2.9. 2.10. 2.11. 3.1. 3.1.1. 3.1.2. 3.1.3. 3.1.4. 3.1.4.1. 3.1.4.2. 3.1.4.3. 3.1.4.4. 3.2. 3.3. 3.3.1. 3.3.2. 3.3.2.1. 3.3.2.2. 3.3.2.3. 3.3.2.4. 3.3.2.5. 3.3.2.6. 3.3.2.7. 3.4. 3.5. 3.5.1. 3.5.2. 3.5.3. 3.5.4. 3.5.5. 3.5.6. 3.5.7. 3.5.8. 3.5.9. 3.5.10. Title Interface Interface Digital Control Pins Status Change Indication Clock Oscillator Crystal Specifications Control Interface Device Subaddresses Internal Hardware Error Handling Description CONTROL Register Protocol Description Proposals General 34x2G Telegrams Symbols Write Telegrams Read Telegrams Examples Start-Up Sequence: Power-Up Controlling 34x2G Programming Interface User Registers Overview Description User Registers STANDARD SELECT Register Refresh STANDARD SELECT Register STANDARD RESULT Register Write Registers Subaddress 10hex Read Registers Subaddress 11hex Write Registers Subaddress 12hex Read Registers Subaddress 13hex Programming Tips Examples Minimum Initialization Codes SCART1 Input Loudspeaker Stereo Sound B/G-FM NICAM) BTSC-Stereo BTSC-SAP with Loudspeaker Channel FM-Stereo Radio Automatic Standard Detection Dolby Surround Logic Example Virtual Dolby Surround Example Noise Sequencer Dolby Logic Software Flow Interrupt driven STATUS Check
Micronas
June 2003; 6251-520-1DS
34x2G
Contents, continued Page Section 4.1. 4.2. 4.3. 4.4. 4.5. 4.6. 4.6.1. 4.6.2. 4.6.2.1. 4.6.2.2. 4.6.2.3. 4.6.2.4. 4.6.3. 4.6.3.1. 4.6.3.2. 4.6.3.3. 4.6.3.4. 4.6.3.5. 4.6.3.6. 4.6.3.7. 4.6.3.8. 4.6.3.9. 4.6.3.10. 5.1. 5.2. 5.3. 5.4. 5.5. 5.6. Title Specifications Outline Dimensions Connections Short Descriptions Descriptions Configurations Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions General Recommended Operating Conditions Analog Input Output Recommendations Recommendations Analog Sound Input Signal Crystal Recommendations Characteristics General Characteristics Digital Inputs, Digital Outputs Reset Input Power-Up I2C-Bus Characteristics I2S-Bus Characteristics Analog Baseband Inputs Outputs, AGNDC Sound Inputs Power Supply Rejection Analog Performance Sound Standard Dependent Characteristics Appendix Overview TV-Sound Standards NICAM A2-Systems BTSC-Sound System Japanese Stereo System (EIA-J) Satellite Sound FM-Stereo Radio
June 2003; 6251-520-1DS
Micronas
34x2G
Contents, continued Page Section 6.1. 6.2. 6.3. 6.3.1. 6.3.1.1. 6.3.1.2. 6.3.2. 6.3.3. 6.3.4. 6.3.5. 6.3.6. 6.3.7. 6.4. 6.4.1. 6.4.2. 6.4.3. 6.4.4. 6.4.5. 6.4.6. 6.4.7. 6.5. 6.5.1. 6.5.2. 6.5.3. 6.5.4. 6.5.5. 6.5.6. 6.5.7. 6.6. 6.6.1. 6.6.2. 6.7. 6.7.1. 6.7.2. 6.8. 6.9. Title Appendix Manual/Compatibility Mode Demodulator Write Read Registers Manual/Compatibility Mode Write Read Registers Manual/Compatibility Mode Manual/Compatibility Mode: Description Demodulator Write Registers Automatic Switching between NICAM Analog Sound Function Automatic Sound Select Mode Function Manual Mode Threshold Carrier-Mute Threshold Register AD_CV Register MODE_REG FIR-Parameter, Registers FIR1 FIR2 DCO-Registers Manual/Compatibility Mode: Description Demodulator Read Registers NICAM Mode Control/Additional Data Bits Register Additional Data Bits Register Bits Register NICAM Error Rate Register PLL_CAPS Readback Register AGC_GAIN Readback Register Automatic Search Function FM-Carrier Detection Satellite Mode Manual/Compatibility Mode: Description Write Registers Additional Channel Matrix Modes Volume Modes SCART1/2 Outputs Fixed Deemphasis Adaptive Deemphasis NICAM Deemphasis Identification Mode Stereo Systems Notch Manual/Compatibility Mode: Description Read Registers Stereo Detection Register Stereo Systems Level Register Demodulator Source Channels Manual Mode Terrestric Sound Standards Sound Standards Exclusions Audio Baseband Features Compatibility Restrictions 34x0D
Micronas
June 2003; 6251-520-1DS
34x2G
Contents, continued Page Section 7.1. 7.2. Title Appendix Application Information Phase Relationship Analog Outputs Application Circuit Appendix 34x2G Version History Data Sheet History
License Notice:
"Dolby", "Virtual Dolby Surround", double-D Symbol trademarks Dolby Laboratories.
Supply this implementation Dolby Technology does convey license imply right under patent, other industrial intellectual property right Dolby Laboratories, this implementation finished end-user ready-to-use final product. Companies planning this implementation products must obtain license from Dolby Laboratories Licensing Corporation before designing such products.
June 2003; 6251-520-1DS
Micronas
34x2G
Surround sound reproduced certain extent with only loudspeakers. 34x2G includes Micronas virtualizer algorithm which been approved Dolby1) Laboratories compliance with "Virtual Dolby Surround" technology. This algorithm called 3D-PANORAMA® enables convincing acoustical sensations. Virtual Dolby Surround processed together with headphone signals. produced submicron CMOS technology. 34x2G available following packages: PMQFP80-11, PMQFP64-2, PSDIP64-1.
Multistandard Sound Processor Family with Dolby Logic Release Note: Revision bars indicate significant changes previous edition. hardware software description this document valid 34x2G version following versions. Introduction 34x2G family single-chip Multistandard Sound Processors covers sound processing analog TV-Standards worldwide, well NICAM digital sound standards. full sound processing, starting with analog sound signal-in, down processed analog AF-out, performed single chip. family's latest member, 34x2G functions 34x0G with addition Dolby Logic Virtual Dolby Surround sound processing (See License Notice page 34x2G forms superset functions 34x1G, which contains virtualizer algorithms does contain multi-channel processing. Additional output pins DACM_C DACM_S have been defined which deliver Dolby Logic processed Center Surround channels. When DACM_C DACM_S active, headphone outputs DACA_L DACA_R muted vice versa. Simultaneous processing Headphone signals Dolby Logic possible.
1.1. Features 34x0G standard features 34x1G standard features: 3D-PANORAMA® virtualizer algorithm used Virtual Dolby Surround) PANORAMA virtualizer algorithm Noise Generator Virtualizer able work with front loudspeakers Dolby Logic processing Various other multichannel sound modes Additional pins Center Surround channels software compatible 34x0G
Sound Sound
Demodulator
Preprocessing
Loudspeaker Sound Processing Headphone/ Surround Sound Processing
Loudspeaker Subwoofer Center Surround
Source Select
Headphone
I2S1 I2S2 SCART1 SCART2 SCART3 SCART4 MONO SCART Input Select
Prescale
SCART1 Prescale SCART Output Select SCART2
Fig. 1-1: Block diagram 34x2G
Micronas
June 2003; 6251-520-1DS
34x2G
1.2. Features 34x2G Family
Feature Dolby Logic Virtual Dolby Surround Processing with 3D-PANORAMA virtualizer PANORAMA virtualizer algorithm Standard Selection with single transmission Automatic Standard Detection terrestrial standards/Automatic Carrier Mute function Automatic Sound Selection (mono/stereo/bilingual) selectable sound (SIF) inputs Interrupt output programmable (indicating status change) Loudspeaker Headphone channel with volume, balance, bass, treble, loudness AVC: Automatic Volume Correction Subwoofer output with programmable low-pass complementary high-pass filter Micronas BASS (MB) 5-band graphic equalizer loudspeaker channel Spatial effect loudspeaker channel Four Stereo SCART (line) inputs, Mono input; Stereo SCART outputs Complete SCART in/out switching matrix inputs; output analog Mono sound carriers including AM-SECAM analog FM-Stereo satellite standards Simultaneous demodulation (very) high-deviation FM-Mono NICAM Adaptive deemphasis satellite (Wegener-Panda, acc. ASTRA specification) ASTRA Digital Radio (ADR) together with 3510A NICAM standards Demodulation BTSC multiplex signal channel Alignment free digital noise reduction BTSC Stereo Alignment free digital Micronas Noise Reduction (MNR) BTSC Stereo BTSC stereo separation (MSP 3422/42G also EIA-J) significantly better than spec. stereo detection BTSC system Korean FM-Stereo standard Alignment-free Japanese standard EIA-J Demodulation FM-Radio multiplex signal
3402
3412
3422
3442
3452
1.3. 34x2G Version List
Version 3402G 3412G 3422G 3442G 3452G Status confirmed available confirmed confirmed available Description Stereo (A2) Version NICAM Stereo (A2) Version NTSC Version Korea, BTSC with Micronas Noise Reduction (MNR), Japanese EIA-J system) NTSC Version Korea, BTSC with noise reduction, Japanese EIA-J system) Global Version (all sound standards)
June 2003; 6251-520-1DS
Micronas
34x2G
1.4. 34x2G Versions their Application Fields Table provides overview sound standards that processed 34x2G family. addition, 34x2G able handle FM-Radio standard. With 34x2G, complete multimedia receiver covering sound standards together with terrestrial/cable satellite radio sound built; even ASTRA Digital Radio processed (with 3510A coprocessor).
Table 1-1: Stereo Sound Standards covered 34x2G Family (details Appendix
Version 3402 TVSystem 5.5/5.85 6.5/5.85 6.0/6.552 6.5/6.2578125 3402 3412 6.5/6.7421875 6.5/5.7421875 3452 6.5/5.85 7.02/7.2 7.38/7.56 etc. 4.5/4.724212 3422, 3442 FM-Radio 10.7 FM-Stereo (A2, D/K3) FM-Mono/NICAM (D/K, NICAM) FM-Mono FM-Stereo ASTRA Digital Radio (ADR) with 3510A FM-Stereo (A2) FM-FM (EIA-J) BTSC-Stereo FM-Stereo Radio NTSC NTSC NTSC, Korea Japan USA, Argentina USA, Europe SECAM-East Poland China, Hungary Europe Sat. ASTRA FM-Mono/NICAM AM-Mono/NICAM FM-Mono/NICAM FM-Stereo (A2, D/K1) FM-Stereo (A2, D/K2) SECAM-L SECAM-East Scandinavia, Spain France Hong Kong Slovak. Rep. currently broadcast Position Sound Carrier /MHz 5.5/5.7421875 Sound Modulation FM-Stereo (A2) Color System Broadcast e.g. Germany
3402
Satellite
Loudspeaker Filter Tuner Sound Mixer Subwoofer Center
Mono Vision Demodulator SCART Inputs Composite Video SCART1 SCART2 SCART3 SCART4
34x2G
Surround
I2S2
Headphone
SCART1 SCART2
SCART Outputs
Decoder 3510A
Fig. 1-2: Typical 34x2G application
Micronas
June 2003; 6251-520-1DS
Functional Description
ANA_IN1+ Standard Selection DEMODULATOR (incl. Carrier Mute)
Deemphasis: 50/75 DBX/MNR, Panda1 FM/AM FM/AM
ANA_IN2+
Source Select
ADR-Bus Interface
SCART Input Select
SC1_IN_L SC1_IN_R SC2_IN_L SC2_IN_R SC3_IN_L SC3_IN_R SC4_IN_L SC4_IN_R MONO_IN
(13hex)
(41hex)
(40hex)
SCART Output Select
Micronas
June 2003; 6251-520-1DS
Automatic Sound Select
Prescale (0Ehex) NICAM Stereo Stereo
Configurable Output Section
Decoded Standards: NICAM BTSC EIA-J FM-Radio
Loud speaker Channel Matrix
(08hex)
(29hex)
Bass/ Treble Equalize
(02hex) (03hex)
Loudness
Comple mentary Highpass
(2Dhex)
DACM_L Balance
(01hex)
Volume
Acoustical Compens.
(26/27/28hex)
DACM_R DACM_SUB
Deemphasis: Prescale (10hex) Stereo
(04hex)
Lowpass Beeper
(14hex) (2Dhex)
Level Adjust
(2Chex)
(00hex) (68.6Chex)
Standard Sound Detection
Read Register
DACA_C Acoustical Compens.
(34/35/36hex)
DACA_S DACA_L
I2S1 I2S_DA_IN1 Interface Prescale
(16hex)
Headphone Channel Matrix
(09hex)
Volume Bass/ Treble
(31/32 hex)
Loudness
Balance
(30hex) (06hex)
DACA_R
(33hex)
I2S2 I2S_DA_IN2 Interface Prescale
(12hex) (16hex
Channel Matrix
(0Bhex)
Interface
I2S_DA_OUT
Quasi-Peak Channel Matrix
(0Chex)
Quasi-Peak Detector
Read Register
(19hex) (1Ahex)
SCART
Prescale
(0Dhex)
SCART1 Channel Matrix
(0Ahex)
Volume
SCART1_L/R
(07hex)
SCART2 Channel Matrix
Volume
SCART2_L/R
SC1_OUT_L
SC1_OUT_R
34x2G
SC2_OUT_L
SC2_OUT_R
(13hex)
Fig. 2-1: Signal flow block diagram 34x2G
34x2G
Configurable Output Section
Loud speaker Channel Matrix
(08hex)
Virtualizer
(29hex)
Bass/ Treble Equal.
(02hex) (03hex)
Loudness
Comple mentary Highpass
(2Dhex)
DACM_L Balance
(01hex)
Volume
Acoustical Compens.
(26/27/28hex)
DACM_R DACM_SUB
(04hex)
Noise Generator
Lowpass Beeper
(14hex) (2Dhex)
Level Adjust
(2Chex)
(00hex) (68.6Chex)
DACA_C DACA_S Acoustical Compens.
(34/35/36hex)
Headphone Channel Matrix
(09hex)
Volume Bass/ Treble
(31/32hex)
DACA_L
Loudness
Balance
(30hex) (06hex)
DACA_R
(33hex)
Fig. 2-2: Output section virtual mode: Output Configuration (register 48hex) 0100hex
Configurable Output Section
Loud speaker Channel Matrix
(08hex)
Bass/ Treble Equal. Dolby Logic optional Virtualizer
(02hex) (03hex)
Loudness
Comple mentary Highpass
(2Dhex)
DACM_L Balance
(01hex)
Volume
Acoustical Compens.
(26/27/28hex)
DACM_R DACM_SUB
(04hex)
Noise Generator
Lowpass Equal. Beeper
(14hex) (2Dhex)
Level Adjust
(2Chex)
(00hex) (68.6Chex)
DACA_L DACA_R Acoustical Compens.
(34/35/36hex)
Complementary Highpass Loudness Balance
(30hex)
Volume
DACA_C
Bass/ Treble
(29hex) (31/32hex)
DACA_S
(33hex)
(06hex)
Fig. 2-3: Output section with multi-channel surround: Output Configuration (register 48hex) 8200hex
Micronas
June 2003; 6251-520-1DS
34x2G
2.1. Architecture 34x2G Family block diagrams Fig. 2-1, Fig. 2-2, Fig. show signal flow 34x2G three modes that Output Configuration register. Standard mode (see Fig. 2-1). compatible 34x0G family. Virtual mode (see Fig. 2-2). compatible Virtual Dolby 34x1G family. Multi-channel mode (see Fig. 2-3). three block diagrams show features 34x2G family member. Other members 34x2G family have complete features: demodulator handles only subset standards presented demodulator block; NICAM processing only possible 3412G 3452G.
BTSC-Stereo: Detection demodulation aural carrier resulting MTS/MPX signal. Detection evaluation pilot carrier, demodulation (L-R)-carrier detection subcarrier. Processing noise reduction Micronas Noise Reduction (MNR). BTSC-Mono SAP: Detection demodulation aural carrier resulting MTS/MPX signal. Detection evaluation pilot carrier, detection demodulation subcarrier. Processing noise reduction Micronas Noise Reduction (MNR). Japan Stereo: Detection demodulation aural carrier resulting signal. Demodulation evaluation identification signal demodulation (L-R)-carrier. FM-Satellite Sound: Demodulation carriers. Processing high-deviation mono narrow bandwidth mono, stereo, bilingual satellite sound according ASTRA specification. FM-Stereo-Radio: Detection demodulation aural carrier resulting signal. Detection evaluation pilot carrier demodulation (L-R)-carrier. demodulator blocks 34x2G versions have identical user interfaces. Even completely different systems like BTSC NICAM systems controlled same way. Standards selected means Standard Codes. Automatic processes handle standard detection identification without controller interaction. features 34x2G demodulator blocks Standard Selection: controlling demodulator minimized: parameters, such tuning frequencies filter bandwidth, adjusted automatically transmitting single value STANDARD SELECT register. standards, specific standard codes defined. Automatic Standard Detection: sound standard unknown, 34x2G automatically detect actual standard, switch that standard, respond actual standard code. Automatic Carrier Mute: prevent noise effects identification problems absence carrier, 34x2G offers configurable carrier mute feature, which activated automatically sound standard selected means STANDARD SELECT register. carrier detected demodulator channels, corresponding demodulator output muted. This indicated STATUS register.
2.2. Sound Processing 2.2.1. Analog Sound Input input pins ANA_IN1+, ANA_IN2+, ANA_IN- offer possibility connect different sound (SIF) sources 34x2G. analog-to-digital conversion preselected sound signal done A/D-converter. analog automatic gain circuit (AGC) allows wide range input levels. highpass filters formed coupling capacitors pins ANA_IN1+ ANA_IN2+ Section 7.2. "Application Circuit" page sufficient most cases suppress video components. Some combinations filters sound mixer ICs, however, show large picture components their outputs. this case, further filtering recommended.
2.2.2. Demodulator: Standards Features 34x2G able demodulate TV-sound standards worldwide including digital NICAM system. Depending 34x2G version, following demodulation modes performed: Systems: Detection demodulation separate carriers (FM1 FM2), demodulation evaluation identification signal carrier FM2. NICAM Systems: Demodulation decoding NICAM carrier, detection demodulation analog carrier. D/K-NICAM, carrier have maximum deviation kHz. Very high deviation FM-Mono: Detection robust demodulation carrier with maximum deviation kHz.
June 2003; 6251-520-1DS
Micronas
34x2G
"Stereo channel: Analog digital mono sound, stereo available. case bilingual broadcast, contains language left right). "Stereo channel: Analog digital mono sound, stereo available. case bilingual broadcast, contains language left right). Fig. Table show source channel assignment demodulated signals case Automatic Sound Select mode sound standards. Note: analog primary input channel contains signal mono FM/AM carrier signal carrier. secondary input channel contains signal second carrier, signal carrier, signal.
2.2.3. Preprocessing Demodulator Signals NICAM signals must processed deemphasis filter adjusted level. analog demodulated signals must processed deemphasis filter, adjusted level, dematrixed. correct deemphasis filters already selected setting standard STANDARD SELECT register. level adjustment done means NICAM prescale registers. necessary dematrix function depends selected sound standard actual broadcasted sound mode (mono, stereo, bilingual). manually Matrix Mode register automatically Automatic Sound Selection.
2.2.4. Automatic Sound Select Automatic Sound Select mode, dematrix function automatically selected based identification information STATUS register. interaction necessary when broadcasted sound mode changes (e.g. from mono stereo). demodulator supports identification check switching between mono compatible standards (standards that have same mono carrier) automatically non-audible. B/G-FM B/G-NICAM selected, will switch between these standards. same action performed standards: D/K1-FM, D/K2-FM, D/K3-FM D/K-NICAM. Switching only done absence stereo bilingual identification. identification found, keeps detected standard. case high bit-error rates, 34x2G automatically falls back from digital NICAM sound analog mono. Table summarizes actions that take place when Automatic Sound Select switched provide more flexibility, Automatic Sound Select block prepares four different source channels demodulated sound (see Fig. 2-4). choosing four demodulator channels, preferred sound mode selected each output channels (loudspeaker, headphone, etc.). This done means Source Select registers. following source channels demodulated sound defined: "FM/AM" channel: Analog mono sound, stereo available. case NICAM, analog mono only mono). "Stereo A/B" channel: Analog digital mono sound, stereo available. case bilingual broadcast, contains both languages (left) (right).
primary channel secondary channel FM/AM FM-Matrix Prescale FM/AM Source Select Output-Ch. Matrices must according standard Matrix Matrix primary channel secondary channel NICAM FM/AM FM/AM Source Select Matrix Output-Ch. Matrices must once stereo
Prescale
NICAM
Automatic Sound Select
Stereo
Stereo
NICAM
Prescale
Stereo
Matrix
Fig. 2-4: Source channel assignment demodulated signals Automatic Sound Select Mode
2.2.5. Manual Mode Fig. shows source channel assignment demodulated signals case manual mode. manual mode required, more information found Section 6.7. "Demodulator Source Channels Manual Mode" page 109.
NICAM
NICAM NICAM (Stereo A/B)
NICAM
Prescale
Fig. 2-5: Source channel assignment demodulated signals Manual Mode
Micronas
June 2003; 6251-520-1DS
34x2G
Table 2-1: Performed actions Automatic Sound Selection
Selected Sound Standard B/G-FM, D/K-FM, M-Korea, M-Japan B/G-NICAM, L-NICAM, I-NICAM, D/K-NICAM Performed Actions
Evaluation identification signal automatic switching mono, stereo, bilingual. Preparing four demodulator source channels according Table 2-2. Evaluation NICAM-C-bits automatic switching mono, stereo, bilingual. Preparing four demodulator source channels according Table 2-2. case NICAM reception, switches automatically FM/AM mono switches back NICAM possible. hysteresis prevents periodical switching.
B/G-FM, B/G-NICAM D/K1-FM, D/K2-FM, D/K3-FM, D/K-NICAM
Automatic searching stereo/bilingual-identification case mono transmission. Automatic nonaudible changes between Dual-FM FM-NICAM standards while listening basic FM-Mono sound carrier. Example: starting with B/G-FM-Stereo, there will periodical alternation B/G-NICAM absence FM-Stereo/Bilingual NICAM-identification. Once identification detected, keeps corresponding standard. Evaluation pilot signal automatic switching mono stereo. Preparing four demodulator source channels according Table 2-2. Detection carrier. absence SAP, switches BTSC-Stereo available. detected, switches automatically (see Table 2-2).
BTSC-STEREO, Radio BTSC-SAP
Table 2-2: Sound modes demodulator source channels with Automatic Sound Select
Source Channels Automatic Sound Select Mode Broadcasted Sound Standard M-Korea B/G-FM D/K-FM M-Japan Selected Standard Code3) 081) 0B1) Broadcasted Sound Mode MONO STEREO BILINGUAL: Languages B/G-NICAM L-NICAM I-NICAM D/K-NICAM D/K-NICAM
(with high deviation
FM/AM
(source select:
Stereo
(source select:
Stereo
(source select:
Stereo
(source select:
Mono Stereo Left Right analog Mono analog Mono analog Mono analog Mono Mono Stereo Mono Stereo Left Mono Right Left Mono Right Mono Stereo
Mono Stereo Left Right analog Mono NICAM Mono NICAM Stereo Left NICAM Right NICAM Mono Stereo Mono Stereo Left Mono Right Left Mono Right Mono Stereo
Mono Stereo analog Mono NICAM Mono NICAM Stereo NICAM Mono Stereo Mono Stereo Mono Mono Mono Stereo
Mono Stereo analog Mono NICAM Mono NICAM Stereo NICAM Mono Stereo Mono Stereo Mono Stereo
032) 042), 052)
NICAM available error rate high MONO STEREO BILINGUAL: Languages
BTSC
MONO STEREO
MONO+SAP STEREO+SAP
MONO+SAP STEREO+SAP
Radio
MONO STEREO
Automatic Sound Select process will automatically switch mono compatible analog standard. Automatic Sound Select process will automatically switch mono compatible digital standard. Standard Codes defined Table page
June 2003; 6251-520-1DS
Micronas
34x2G
34x2G shipped without except otherwise ordered. When SRS-version 34x2G ordered, carries special marking chip identification. functionality must enabled writing "license key" into 34x2G. information obtain this license from Micronas, please contact your Micronas sales representative.
2.3. Preprocessing SCART Input Signals SCART inputs need only adjusted level means SCART prescale registers.
2.4. Source Selection Output Channel Matrix Source Selector makes possible distribute source signals (one demodulator source channels, SCART, input) desired output channels (loudspeaker, headphone, etc.). input output signals processed simultaneously. Each source channel identified unique source address. each output channel, sound mode sound sound stereo, mono means output channel matrix. Automatic Sound Select output channel matrix stay fixed stereo (transparent) demodulated signals. 2.5.2. Automatic Volume Correction (AVC) Different sound sources (e.g. terrestrial channels, channels, SCART) fairly often have same volume level. Advertisements during movies usually have higher volume level than movie itself. This results annoying volume changes. solves this problem equalizing volume level. prevent clipping, AVC's gain decreases quickly dynamic boost conditions. suppress oscillation effects, gain increases rather slowly low-level inputs. decay time programmable means register (see page 39). input signals ranging from dBr, maintains adjustable output level between dBr. Fig. shows output level versus input level with output level dBr, maximum attentuation maximum gain prescale volume registers level corresponds full scale input/output. This SCART input/output Vrms Loudspeaker output Vrms output level [dBr]
2.5. Audio Baseband Processing 2.5.1. (optional) License Notice: SRS, WOW, Logo trademarks Labs, Inc. license from Labs, Inc. required before SRS-version 34x2G purchased. Labs' technology enlarges sound image field improves bass performance television speakers. Manufacturers save costs licensing while utilizing smaller speakers still provide higher quality audio experience. consists three sections: Clarity Improvement, 3D-Audio (SRS, Sound Retrieval System), Bass Enhancement (TruBass).
input level [dBr]
Fig. 2-6: Simplified characteristics
features include: Wider taller sound image field Larger sweet spot Deep, rich bass tones Quality improvements audio listening experience Improved clarity speech
Micronas
June 2003; 6251-520-1DS
34x2G
2.5.3. Loudspeaker Headphone Outputs following baseband features implemented loudspeaker headphone output channels: bass/treble, loudness, balance, volume. square wave beeper added loudspeaker headphone channel. loudspeaker channel additionally performs: equalizer (not simultaneously with bass/treble), spatial effects, subwoofer crossover filter. 2.5.5. Quasi-Peak Detector
quasi-peak readout register used read quasi-peak level input source. feature based following filter time constants: attack time: decay time:
2.5.6. Micronas BASS (MB) 2.5.4. Subwoofer Output subwoofer signal created combining left right channels directly behind loudness block using formula (L+R)/2. division converter will overloaded, even with full scale input signals. subwoofer signal filtered third-order low-pass with programmable corner frequency followed level adjustment. loudspeaker channels, complementary high-pass filter switched Subwoofer loudspeaker output same volume (Loudspeaker Volume Register). Micronas BASS system extends frequency range loudspeakers headphones. After adaption loudspeakers cabinet, further customizing allows individual fine tuning sound. Micronas BASS placed subwoofer path. applications without subwoofer, enhanced bass signal added back onto Left/Right channels (see Fig. page 10). combines effects: dynamic amplification adding harmonics.
2.5.6.1. Dynamic Amplification frequency signals boosted while output signal amplitude measured. amplitude comes close definable limit, gain reduced automatically dynamic Volume mode. Therefore, system adapts signal amplitude which really present output device. Clipping effects avoided.
Amplitude (db) MB_LIMIT
Frequency MB_HP MB_LP SUBW_FREQ
Fig. 2-7: Dynamic amplification
June 2003; 6251-520-1DS
Micronas
Signal Level
34x2G
2.6.1.1. AUX/CS Switch This switch defines which output pair driven converters that used headphone surround processing. unselected pins muted. This makes convenient connect center/surround amplifiers outputs 34x2G without external switches. Mute Headphone/Surround channel setting register 06hex 0000hex before switching. Allow least settling avoid audible plops.
2.5.6.2. Adding Harmonics Micronas BASS exploits psychoacoustic phenomenon `missing fundamental'. Adding harmonics frequency components below cutoff frequency gives impression actually hearing frequency fundamental. other words: listener impression that loudspeaker system seems reproduce frequencies although physically possible.
Amplitude (db)
2.6.1.2. Channel Configuration channel configuration defines whether surround processing switched what resources used surround sound processing. There options:
Frequency MB_HP_CFRQ
Fig. 2-8: Adding harmonics
STEREO: normal stereo processing mode. surround processing takes place. this mode, compatible 34x0G. TWO_CHANNEL: Surround sound processing switched only left right loudspeaker channels used output. This mode used virtual surround sound. MULTI_CHANNEL: Surround sound processing switched left right loudspeaker channels together with left right headphone channels used output. following relationship applies: Center corresponds left headphone channel; Surround corresponds right headphone channel.
2.5.6.3. Micronas BASS Parameters Several parameters allow tuning characteristics Micronas BASS according loudspeaker, cabinet, personal preferences (see Table 3-11 page 35). more detailed information please refer corresponding application note Micronas homepage.
2.6. Surround Processing 2.6.1. Output Configuration Like 34x1G ICs, 34x2G used virtual surround sound left right loudspeaker outputs. multichannel outputs (more than channels), extra output pins have been defined (DACM_C DACM_S pins). processing these output channels, internal resources shared with headphone processing. result, headphone output possible together with multi-channel surround processing. When headphone output pins active, surround outputs muted vice versa. There options: AUX/CS switch channel configuration. output configuration controlled means register 48hex subaddress 12hex.
2.6.2. Surround Processing Mode Surround sound processing controlled three functions: "Decoder Matrix" defines which method should used create multichannel signal stereo input. "Surround Reproduction" determines whether surround signal surround speakers. surround speaker actually connected, defines method that should used create surround effects. "Center Mode" determines center signal processed. left unmodified, distributed left right, discarded high pass filtered, whereby pass signals distributed left right. surround processing mode controlled means register 4Bhex subaddress 12hex.
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2.6.2.1. Decoder Matrix Decoder Matrix allows three settings: ADAPTIVE: adaptive matrix used Dolby Surround Logic Virtual Dolby Surround. Even sound material encoded Dolby Surround will produce good surround effects this mode. adaptive matrix requires license from Dolby Laboratories (See License Notice page PASSIVE: simple fixed matrix used other surround modes (Micronas AROUND). EFFECT: fixed matrix that used mono sound special effects. adaptive passive mode surround signal present case mono, moreover adaptive mode even left right output channels carry signal just frequency signals case Center Mode NORMAL). surround sound still required mono signals, effect mode used. This forces surround channel active. effect mode used together with 3D-PANORAMA. result will pseudo stereo effect broadened stereo image respectively. 2.6.2.3. Center Modes Four center modes supported:
NORMAL: small center speaker connected, speakers have better bass capability. WIDE: L,R, speakers have good bass capability. PHANTOM: center speaker used. Center signal distributed (Note: center output channel muted). OFF: center speaker used. Center signal discarded (Note: center output channel muted).
2.6.2.4. Useful Combinations Surround Processing Modes principle, "Decoder Matrix", "Surround Reproduction", "Center Modes" independent settings (all "Decoder Matrix" settings used with "Surround Reproduction" "Center Modes") there some combinations that create "good" sound. Useful combinations Surround Reproduction Center Modes REAR_SPEAKER: This mode used surround speakers available. Useful center modes NORMAL, WIDE, PHANTOM, OFF. FRONT_SPEAKER: This mode used surround speaker center speaker connected. Useful center modes NORMAL WIDE. PANORAMA 3D-PANORAMA: surround speaker used. three loudspeakers used. Useful center modes NORMAL, WIDE, PHANTOM, OFF. Center Modes Decoder Matrix PHANTOM: Should only used together with ADAPTIVE Decoder Matrix. NORMAL WIDE: used together with Surround Decoder Matrix. OFF: special cases, this mode used together with PASSIVE EFFECT Decoder Matrix center speaker connected).
2.6.2.2. Surround Reproduction Surround sound reproduced with four choices: REAR_SPEAKER: there surround speakers connected system, this mode should used. Useful loudspeaker combinations are: FRONT_SPEAKER: there surround speaker connected, this mode used. Surround information mixed left right output without creating illusion virtual speaker. similar stereo additional center speaker used. This mode should used with adaptive decoder matrix only. Useful loudspeaker combinations are: (Note: surround output channel muted). PANORAMA: surround information mixed left right order create illusion virtual surround speaker. Useful loudspeaker combinations are: (Note: surround output channel muted). 3D-PANORAMA: Like PANORAMA with improved effect. This algorithm been approved Dolby Laboratories compliance with "Virtual Dolby Surround" technology. Useful loudspeaker combinations are: (Note: surround output channel muted).
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2.6.3. Examples Table shows some examples these modes used configure list intended complete, more modes possible.
Table 2-3: Examples Surround Configurations
Configurations
Speaker Configuration1)
Output Configuration
Register (48hex) AUX/CS Switch [15] Channel Configuration [14:8]
Surround Processing Mode
Register (4Bhex) Decoder Matrix [15:8] Surround Reproduction [7:4] Center Mode [3:0]
Stereo compatible MSP34x0G. Stereo
(L,R) STEREO
Surround Modes defined Dolby Laboratories Dolby Logic
(L,C,R,S) MULTI_CHANNEL ADAPTIVE REAR_ SPEAKER REAR_ SPEAKER FRONT_ SPEAKER 3D_PANORAMA NORMAL WIDE PHANTOM
(L,R,S)
MULTI_CHANNEL
ADAPTIVE
Dolby Stereo Virtual Dolby Surround
(L,C,R)
MULTI_CHANNEL
ADAPTIVE
NORMAL WIDE PHANTOM
(L,R)
TWO_CHANNEL
ADAPTIVE
Surround Modes that Dolby Logic Matrix2) 3-Channel Virtual Surround Passive Matrix Surround Sound Micronas AROUND Multi-channel (4-channel configuration) Micronas AROUND Multi-channel (3-channel configuration) Micronas AROUND Virtual (2-channel configuration) Micronas AROUND Virtual (3-channel configuration) Special Effects Surround Sound Micronas AROUND mono (4-channel configuration) Micronas AROUND Virtual mono (2-channel configuration) Micronas AROUND Virtual mono (3-channel configuration)
(L,C,R)
MULTI_CHANNEL
ADAPTIVE
3D_PANORAMA
NORMAL WIDE
(L,C,R,S)
MULTI_CHANNEL
PASSIVE
REAR_ SPEAKER REAR_ SPEAKER 3D_PANORAMA
NORMAL WIDE
(L,R,S)
MULTI_CHANNEL
PASSIVE
(L,R)
TWO_CHANNEL
PASSIVE
(L,C,R)
MULTI_CHANNEL
PASSIVE
3D_PANORAMA
NORMAL WIDE
(L,C,R,S)
MULTI_CHANNEL
EFFECT
REAR_ SPEAKER 3D_PANORAMA
NORMAL WIDE
(L,R)
TWO_CHANNEL
EFFECT
(L,C,R)
MULTI_CHANNEL
EFFECT
3D_PANORAMA
NORMAL WIDE
Speakers muted automatically. implementation products requires license from Dolby Laboratories Licensing Corporation (see note page
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2.6.4. Application Tips using 3D-PANORAMA 2.6.4.1. Sweet Spot Good results only obtained rather close area along middle axis between loudspeakers: sweet spot. Moving away from this position degrades effect.
Great care taken with systems that common subwoofer: single loudspeaker cannot reproduce virtual sound locations. crossover frequency must lower than
2.6.4.4. Cabinet Requirements During listening tests Dolby Laboratories, resonances cabinet should occur.
2.6.4.2. Clipping test Dolby Labs, very important have clipping effects even with worst case signals. That Vrms input signal must clip. SCART input prescale register values 19hex (25dec). This sufficient terms clipping. However, found, that reducing prescale value lower than 25dec more convincing effects generated case very high dynamic signals. value 18dec good compromise between overall volume additional headroom. Test signals: sine sweep with VRMS; only, only, equal phase, anti phase. Listening tests: Dolby Trailers (train trailer, city trailer, canyon trailer.) Good material check resonances Dolby Trailers other dynamic sound tracks.
2.6.5. Input Output Levels Dolby Surround Logic Mode analog inputs able accept Vrms input level without overloading stage before volume control. nominal input level (input sensitivity) This gives headroom. scart prescale value should (max 25dec). I2S-Inputs should have same headroom when entering 34x2G. highest possible input level dBFS accepted without internal overflow. I2S-prescale value should (16dec). With higher prescale values lower input sensitivities accommodated. higher input sensitivity possible, because least headroom required every input according Dolby specifications. full-scale left only input Vrms) will produce fullscale left only output volume). typical output level 1.37 Vrms DACM_L. same holds true right only signals (1.37 Vrms DACM_R). full-scale input level both inputs (Lin=Rin=2 Vrms) will give center only output with maximum level. typical output level 1.37 Vrms DACM_C. fullscale input level both inputs (but with inverted phases) will give surround-only signal with maximum level (1.37 Vrms DACM_S). reproducing Dolby Logic according specifications, center surround outputs must amplified with respect output signals. This done ways: implementing more amplification center surround loudspeaker outputs. always selecting volume lower than center surround. Method preferable, method lowers achievable left right signals
2.6.4.3. Loudspeaker Requirements loudspeakers used their positioning inside will greatly influence performance virtualizer. algorithm works with direct sound path. Reflected sound waves reduce effect. it's most important have much direct sound possible, compared indirect sound. obtain approval set, Dolby Laboratories require mounting loudspeakers front set. Loudspeakers radiating side will produce convincing effects. Good directionality loudspeakers towards listener optimal. virtualizer specially developed implementation sets. Even rather small stereo TV's, sufficient sound effects obtained. small sets, loudspeaker placement should side CRT; large screen sets 16:9 sets), mounting loudspeakers below acceptable (large separation preferred, frequency speakers should outmost avoid cancellation effects). Using external loudspeakers with large stereo base will create optimal effects. loudspeakers should able reproduce wide frequency range. most important frequency range starts from ranges kHz.
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mitting register first, reset state redefined. 2.8. Interface 34x2G synchronous master/slave input/output interface running kHz. interface accepts formats: I2S_WS changes word boundary I2S_WS changes I2S-clock period before word boundaries. options means MODUS I2S_CONFIG registers. interface consists five pins: I2S_DA_IN1, I2S_DA_IN2: serial data input: 18.32 bits sample I2S_DA_OUT: serial data output: 18.32 bits sample I2S_CL: serial clock I2S_WS: word strobe signal defines left right sample 34x2G serves master interface, clock word strobe lines driven this mode, only bits sample selected. slave mode, these lines input clock synchronized times I2S_WS rate kHz). NICAM operation possible slave mode. timing diagram shown Fig. 4-24 page
2.6.6. Subwoofer Surround Mode channel configuration STEREO TWO_CHANNEL, subwoofer signal created combining left right channels directly behind loudness block using formula (L+R)/2. Note: This identical 34x0G. channel configuration MULTI_CHANNEL, subwoofer signal created combining left right channels loudspeaker channel center signal headphone left) directly behind loudness block using formula (L+R+C)/2. fact, that subwoofer formed behind bass/ treble/loudness filters, strongly recommended have exactly same setting these filters both, loudspeaker center/surround channels when using subwoofer output. mismatch these settings will result unbalanced subwoofer signal.
2.6.7. Equalizer Surround Mode MULTI_CHANNEL Surround mode, equalizer used with common setting left, right, center channels, equalizer cannot used surround channel (see Fig. page 11).
2.7. SCART Signal Routing 2.7.1. SCART SCART Select SCART Input Select SCART Output Select blocks include full matrix switching facilities. design with four pairs SCART-inputs pairs SCART-outputs, external switching hardware required. switches controlled user register (see page 48).
2.7.2. Stand-by Mode 34x2G switched first pulling STANDBYQ then (after delay) switching DVSUP AVSUP, keeping AHVSUP (`Stand-by'-mode), SCART switches maintain their position function. This allows copying from SCART-input SCART-output set's stand-by mode. case power starting from stand-by (switching DVSUP AVSUP, RESETQ going high later), internal registers except register (see page reset default configuration (see Table page 26). reset position register becomes active after first transmission into Baseband Processing part. trans-
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2.9. Interface ASTRA Digital Radio System (ADR), 3402G, 3412G, 3452G performs preprocessing such carrier selection filtering. 3-line ADR-bus, resulting signals transferred 3510A coprocessor, where source decoding performed. prepared upgrade with additional board, following lines 34x2G should provided feature connector: AUD_CL_OUT I2S_DA_IN1 I2S_DA_IN2 I2S_DA_OUT I2S_WS I2S_CL ADR_CL, ADR_WS, ADR_DA more details, please refer 3510A data sheet. 2.11. Clock Oscillator Crystal Specifications
34x2G derives internal system clocks from 18.432 oscillator. NICAM I2SSlave mode, clock phase-locked corresponding source. Therefore, possible NICAM I2S-Slave mode same time. proper performance, on-chip clock oscillator requires 18.432 crystal. Note that phase-locked modes (NICAM, I2S-Slave), crystals with tighter tolerance required.
2.10. Digital Control Pins Status Change Indication static level digital input/output pins D_CTR_I/O_0/1 switchable between HIGH I2C-bus means register (see page 48). This enables controlling external hardware switches other devices I2C-bus. digital input/output pins high impedance means MODUS register (see page 32). this mode, pins used input. current state read STATUS register (see page 34). Optionally, D_CTR_I/O_1 used interrupt request signal controller, indicating changes read register STATUS. This makes polling unnecessary, interactions reduced minimum (see STATUS register page MODUS register page 32).
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response time about cannot accept another byte data (e.g. while servicing internal interrupt), holds clock line I2C_CL force transmitter into wait state. Master must read back clock line detect when ready receive next transmission. positions within transmission where this happen indicated "Wait" Section 3.1.3. maximum wait period during normal operation mode less than
Control Interface 3.1. Device Subaddresses 34x2G controlled slave interface. selected transmitting 34x2G device addresses. order allow three connected single bus, address select (ADR_SEL) been implemented. With ADR_SEL pulled high, low, left open, 34x2G responds different device addresses. device address pair defined write address read address (see Table 3-1). Writing done sending write device address, followed subaddress byte, address bytes, data bytes. Reading done sending write device address, followed subaddress byte address bytes. Without sending stop condition, reading addressed data completed sending device read address reading bytes data. Refer Section 3.1.3. protocol Section 3.4. "Programming Tips" page proposals 34x2G telegrams. Table list available subaddresses. Besides possibility hardware reset, also reset means RESET CONTROL register controller bus. architecture 34x2G, cannot react immediately request. typical Table 3-1: Device Addresses
ADR_SEL Mode device address (connected DVSS) Write 80hex Read 81hex
3.1.1. Internal Hardware Error Handling case hardware problems (e.g. interruption power supply MSP), MSP's wait period extended After this time period elapses, releases data clock lines.
Indicating solving error status: indicate error status, remaining acknowledge bits actual I2C-protocol will left high. Additionally, bit[14] CONTROL one. then reset transmitting reset condition CONTROL.
Indication reset: reset, even caused unstable reset line etc., indicated bit[15] CONTROL. general timing diagram shown Fig. 4-23 page
High (connected DVSUP) Write 84hex Read 85hex Write 88hex
Left Open Read 89hex
Table 3-2: Subaddresses
Name CONTROL WR_DEM RD_DEM WR_DSP RD_DSP Binary Value 0000 0000 0001 0000 0001 0001 0001 0010 0001 0011 Value Mode Read/Write Write Write Write Write Function Write: Software reset (see Table 3-3) Read: Hardware error status write address demodulator read address demodulator write address read address
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3.1.2. Description CONTROL Register
Table 3-3: CONTROL Write Register
Name CONTROL Subaddress Bit[15] (MSB) RESET normal Bits[14:0]
Table 3-4: CONTROL Read Register (only 34x2G-versions from
Name CONTROL Subaddress %LW>@ Reset status after last reading CONTROL: reset occured reset occured Bit>@ Internal hardware status: error occured internal error occured BitV>@ interest
Reading CONTROL will reset bits[15,14] CONTROL. After Power-on, bit[15] CONTROL will set; must read once resetted.
3.1.3. Protocol Description Write Demodulator
Wait write device address sub-addr addr-byte addr-byte data-byte- data-byte high high
Read from Demodulator
Wait write device address sub-addr addr-byte addr-byte high read device address Wait data-byte- data-byte high
Write Control Registers
Wait write device address sub-addr data-byte data-byte high
Read from Control Register
Wait write device address 00hex read device address Wait data-byte- data-byte high
Note: Wait
I2C-Bus Start Condition from master I2C-Bus Stop Condition from master Acknowledge-Bit: I2C_DA from slave MSP, light gray) master controller dark gray) Acknowledge-Bit: HIGH I2C_DA from master (dark gray) indicate `End Read' from indicating internal error state I2C-Clock line held low, while processing command. This waiting time max.
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34x2G
I2C_DA I2C_CL
Fig. 3-1: protocol (MSB first; data must stable while clock high)
3.1.4. Proposals General 34x2G Telegrams 3.1.4.1. Symbols
3.2. Start-Up Sequence: Power-Up Controlling After POWER RESET (see Fig. 4-22), inactive state. registers Reset position (see Table Table 3-6), analog outputs muted. controller initialize registers which non-default setting necessary.
write device address (80hex, 84hex 88hex) read device address (81hex, 85hex 89hex) Start Condition Stop Condition Address Byte Data Byte
3.3. 34x2G Programming Interface 3.3.1. User Registers Overview
3.1.4.2. Write Telegrams
<daw <daw <daw
write CONTROL register write data into demodulator write data into
3.1.4.3. Read Telegrams
read data from CONTROL register <daw <dar read data from demodulator <daw <dar read data from
<daw <dar
34x2G controlled means user registers. complete list user registers given Table Table 3-6. registers partitioned into Demodulator section (Subaddress 10hex writing, 11hex reading) Baseband Processing sections (Subaddress 12hex writing, 13hex reading). Write read registers 16-bit wide, whereby denoted bit[15]. Transmissions have take place 16-bit words (two byte transfers, with most significant byte transferred first). write registers, except demodulator write registers, readable. Unused parts 16-bit write registers must zero. Addresses given this table must accessed. reasons software compatibility 34xxD, Manual/Compatibility Mode available. More read write registers together with detailed description found "Appendix Manual/ Compatibility Mode" page
3.1.4.4. Examples
RESET statically Clear RESET Automatic Sound Select demodulator stand. 03hex Read STATUS loudspeaker channel
source Stereo Matrix Stereo (transparent mode)
More examples typical application protocols listed Section 3.4. "Programming Tips" page
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Table 3-5: List 34x2G Write Registers
Write Register Address (hex) Bits Description Adjustable Range
Reset
Page
Subaddress 10hex Registers readable STANDARD SELECT MODUS CONFIGURATION [15:0] [15:0] [15:0] Initial Programming complete Demodulator Demodulator, Automatic options Configuration format Subaddress 13hex MUTE 00hex
Subaddress 12hex Registers readable
using [15:8] [7:0]
Volume loudspeaker channel Volume Mode loudspeaker channel
[+12 -114 MUTE] Steps, Reduce Volume Tone Control Compromise/ Dynamic [0.100 100% 0.100%] [-127.0 -128.0 [Linear logarithmic mode] [+20 [+15 [NORMAL, SUPER_BASS] [-100%.OFF.+100%] [SBE, SBE+PSE] [+12 -114 MUTE] Steps, Reduce Volume Tone Control Compromise/ Dynamic [+12 -114 MUTE] [FM/AM, NICAM, SCART, I2S1, I2S2] [SOUNDA, SOUNDB, STEREO, MONO.] [FM/AM, NICAM, SCART, I2S1, I2S2] [SOUNDA, SOUNDB, STEREO, MONO.] [FM/AM, NICAM, SCART, I2S1, I2S2]
Balance loudspeaker channel [L/R] Balance mode loudspeaker Bass loudspeaker channel Treble loudspeaker channel Loudness loudspeaker channel Loudness filter characteristic Spatial effect strength loudspeaker Spatial effect mode/customize Volume headphone channel
[15:8] [7:0]
100%/100% linear mode NORMAL SBE+PSE MUTE 00hex
[15:8] [15:8] [15:8] [7:0]
[15:8] [7:0]
[15:8] [7:0]
Volume Mode headphone channel1)
Volume SCART1 output channel Loudspeaker source select Loudspeaker channel matrix Headphone source select1) Headphone channel matrix1) SCART1 source select SCART1 channel matrix source select channel matrix Quasi-peak detector source select Quasi-peak detector matrix Prescale SCART input Prescale FM/AM matrix Prescale NICAM Prescale SCART Switches D_CTR_I/O Beeper
[15:8] [15:8] [7:0]
MUTE FM/AM SOUNDA FM/AM SOUNDA FM/AM SOUNDA FM/AM SOUNDA FM/AM SOUNDA 00hex 00hex NO_MAT 00hex 10hex 00hex
[15:8] [7:0]
[15:8] [7:0]
[SOUNDA, SOUNDB, STEREO, MONO.] [FM/AM, NICAM, SCART, [SOUNDA, SOUNDB, STEREO, MONO.] [FM/AM, NICAM, SCART, I2S1, I2S2] [SOUNDA, SOUNDB, STEREO, MONO.] [00hex 7Fhex] [00hex 7Fhex] [NO_MAT, GSTERERO, KSTEREO] [00hex 7Fhex] (MSP 3412G, 3452G only) [00hex 7Fhex] Bits [15.0] [00hex 7Fhex]/[00hex 7Fhex]
[15:8] [7:0]
[15:8] [7:0]
[15:8] [15:8] [7:0]
[15:8] [15:8] [15:0] [15:0]
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Table 3-5: List 34x2G Write Registers, continued
Write Register Prescale I2S1 Tone control mode Equalizer loudspeaker band Equalizer loudspeaker band Equalizer loudspeaker band Equalizer loudspeaker band Equalizer loudspeaker band Acoustical Compensation loudspeaker Acoustical Compensation loudspeaker Acoustical Compensation loudspeaker Automatic Volume Correction Address (hex) Bits [15:8] [15:8] [15:8] [15:8] [15:8] [15:8] [15:8] [15:0] [15:0] [15:0] [15:12] [11:8] [7:4] [3:2] [1:0] loudspeaker channel mute invert Subwoofer level adjust Subwoofer corner frequency Subwoofer complementary high-pass Balance headphone channel [L/R]1) Balance mode headphone1) Bass headphone channel1) Treble headphone channel1) [7:0] [15:8] [15:8] [7:0] [15:8] [7:0] [15:8] [15:8] [15:8] [7:0] [15:0] [15:0] [15:0] [15:8] [15:8] [7:0] [15] [14:8] [7:0] [15:8] [15:8] Description Adjustable Range [00hex 7Fhex] [Bass/Treble, Equalizer] [+12 [+12 [+12 [+12 [+12 C0_Main C1_Main C2_Main [off, [decay time] [output level] [max attenuation] [max gain] [on, invert, mute] [+12 mute] [off, Micronas BASS Main] [0.100 100% 0.100%] [-127.0 -128.0 [Linear mode logarithmic mode] [+20 [+15 [NORMAL, SUPER_BASS] C0_Center C1_Center C2_Center [+12 -114 MUTE] [FM, NICAM, SCART, I2S1, I2S2] [SOUNDA, SOUNDB, STEREO, MONO.] [AUX, [STEREO, TWO_CHANNEL, MULTI_CHANNEL, MULTI_CHANNEL_CENTER] [Bass/Treble, Equalizer] 100%] 100%] Reset 10hex Bass/Treble 00hex dBFS 00hex 100%/100% linear mode NORMAL 00hex SOUNDA 0hex 00hex Bass/Treble 00hex 00hex Page
Loudness headphone channel1) Loudness filter characteristic
Acoustical Compensation center Acoustical Compensation center Acoustical Compensation center Volume SCART2 output channel SCART2 source select SCART2 channel matrix AUX/CS switch Channel configuration Tone control mode center channel Spatial effect surround processing Virtual surround effect strength
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Table 3-5: List 34x2G Write Registers, continued
Write Register Decoder matrix Surround reproduction Center mode Surround delay Noise Generator Micronas BASS Effect Strength Micronas BASS Amplitude Limit Micronas BASS Harmonic Content Micronas BASS Pass Corner Frequency Micronas BASS High Pass Corner Frequency Address (hex) Bits [15:8] [7:4] [3:0] [15:0] [15:0] [15:8] [15:8] [15:8] [15:8] [15:8] Description Adjustable Range [ADAPTIVE/PASSIVE/EFFECT] 3D_PANORAMA] [PHANTOM/NORMAL/WIDE/OFF] [5.31ms] [NOISEL, NOISEC, NOISER, NOISES] off] 100%]
Reset 00hex 0hex 0hex 00hex 00hex
Page
Multi Channel Mode, these registers used controlling baseband functions center surround channels. Following relationship applies: Center corresponds left headphone channel, Surround corresponds right headphone channel.
Table 3-6: List 34x2G Read Registers
Read Register Address (hex) Bits Description Adjustable Range Page
Subaddress 11hex Registers writable STANDARD RESULT STATUS [15:0] [15:0] Result Automatic Standard Detection Monitoring internal settings e.g. Stereo, Mono, Mute etc.
Subaddress 13hex Registers writable Quasi peak readout left Quasi peak readout right hardware version code major revision code product code version code [15:0] [15:0] [15:8] [7:0] [15:8] [7:0] [00hex 7FFFhex] two's complement [00hex 7FFFhex] two's complement [00hex FFhex] [00hex FFhex] [00hex FFhex] [00hex FFhex]
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3.3.2. Description User Registers Table 3-7: Standard Codes STANDARD SELECT register
Standard Code (Data hex) Sound Standard Automatic Standard Detection Start Automatic Standard Detection detected standard Standard Selection M-Dual FM-Stereo -Dual FM-Stereo1) D/K1-Dual FM-Stereo2) 4.5/4.724212 5.5/5.7421875 6.5/6.2578125 6.5/6.7421875 3402, -12, -22, -42, 3402, -12, Sound Carrier Frequencies 34x2G Version
D/K2-Dual FM-Stereo2) -FM-Mono with HDEV33), detectable Automatic Standard Detection, HDEV33) SAT-Mono (i.e. Eutelsat, Table 6-18) D/K3-Dual FM-Stereo -NICAM-FM -NICAM-AM -NICAM-FM -NICAM-FM
6.5/5.7421875 5.5/5.85 6.5/5.85 6.0/6.552 6.5/5.85 6.5/5.85 6.5/5.85 3422, -42, 3412,
-NICAM-FM with HDEV24), detectable Automatic Standard Detection, China -NICAM-FM with HDEV33), detectable Automatic Standard Detection, China BTSC-Stereo BTSC-Mono M-EIA-J Japan Stereo FM-Stereo Radio with Deemphasis SAT-Mono (see Table 6-18) SAT-Stereo (see Table 6-18) (Astra Digital Radio)
10.7 7.02/7.20 6.12
3422, -42, 3422, -42, 3402, -12,
case Automatic Sound Select, B/G-codes 3hex 8hex equivalent. case Automatic Sound Select, D/K-codes 4hex, 5hex, 7hex, Bhex equivalent. HDEV3: Max. deviation must exceed HDEV2: Max. deviation must exceed
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34x2G
3.3.2.1. STANDARD SELECT Register sound standard 34x2G demodulator determined STANDARD SELECT register. There ways STANDARD SELECT register: Setting demodulator sound standard sending corresponding standard code with single I2C-Bus transmission. Starting Automatic Standard Detection terrestrial standards. This most comfortable demodulator. Within detection set-up actual sound standard performed. detected standard read STANDARD RESULT register control processor. This feature recommended primary set-up set. Outputs should muted during Automatic Standard Detection. Standard Codes listed Table 3-7. 3.3.2.3. STANDARD RESULT Register Selecting sound standard STANDARD SELECT register initializes demodulator. This includes: AGC-settings carrier mute, tuning frequencies, FIR-filter settings, demodulation mode (FM, NICAM), deemphasis identification mode. stereo sound standards that unavailable specific version processed analog mono sound standard. that case, stereo bilingual processing will possible. complete setup sound processing from analog input source selection, transmissions shown Section 3.5. necessary. reasons software compatibility 34x0D, Manual/Compatibility mode available. detailed description this mode found page
3.3.2.2. Refresh STANDARD SELECT Register general refresh STANDARD SELECT register allowed. However, following method enables watching 34x2G "alive" status detection accidental resets (only versions later): After Power-on, bit[15] CONTROL will set; must read once enable reset-detection feature. Reading CONTROL register checking reset indicator bit[15] bit[15] "0", refresh STANDARD SELECT register allowed. bit[15] "1", indicating reset, refresh STANDARD SELECT register other MSPG registers required.
Automatic Standard Detection selected STANDARD SELECT register, status result Automatic Standard Detection process read STANDARD RESULT register. possible results based mentioned Standard Code listed Table 3-8. cases where sound standard been detected standard present, much noise, strong interferers, etc.) STANDARD RESULT register contains 00hex. that case, controller start further actions (for example, standard according preference list manual input). long STANDARD RESULT register contains value greater than FFhex, Automatic Standard Detection still active. During this period, MODUS STANDARD SELECT register must written. STATUS register will updated when Automatic Standard Detection finished. present sound standard unavailable specific version, detects switches analog mono sound this standard. Example: 3442G will detect B/G-NICAM signal standard will switch analog FM-Mono sound.
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-8: Results Automatic Standard Detection
Broadcasted Sound Standard Automatic Standard Detection could find sound standard B/G-FM B/G-NICAM FM-Radio M-Korea M-Japan M-BTSC STANDARD RESULT Register Read 007Ehex 0000hex
0003hex 0008hex 000Ahex 0040hex 0002hex MODUS[14,13]=00) 0020hex MODUS[14,13]=01) 0030hex MODUS[14,13]=10)
L-AM D/K1 D/K2 D/K3 L-NICAM D/K-NICAM Automatic Standard Detection still active
0009hex MODUS[12]=0) 0004hex MODUS[12]=1) 0009hex MODUS[12]=0) 000Bhex MODUS[12]=1) >07FFhex
Micronas
June 2003; 6251-520-1DS
34x2G
3.3.2.4. Write Registers Subaddress 10hex Table 3-9: Write Registers Subaddress 10hex Register Address 20hex Function STANDARD SELECTION Register Defines Sound FM-Radio Standard bit[15:0] 01hex 02hex 60hex start Automatic Standard Detection Standard Codes (see Table 3-7) Name
STANDARD_SEL
30hex
MODUS Register Preference Automatic Standard Detection: bit[15] bit[14:13] bit[12] undefined, must detected carrier interpreted as:1) standard (Korea) standard (BTSC) standard (Japan) chroma carrier (M/N standards ignored) detected carrier interpreted as:1) standard (SECAM) standard D/K1, D/K2, D/K3, NICAM
MODUS
General 34x2G Options bit[11:9] bit[8] bit[7] bit[6] bit[5] bit[4] bit[3] undefined, must ANA_IN1+/ANA_IN2+; select analog sound input active/tristate state audio clock output AUD_CL_OUT word strobe alignment changes data word boundary changes clock cycle advance master/slave mode interface (must Master) case NICAM mode) active/tristate state output pins state digital output pins D_CTR_I/O_0 active: D_CTR_I/O_0 output pins (can means register. also: MODUS[1]) tristate: D_CTR_I/O_0 input pins (level read STATUS[4,3]) undefined, must disable/enable STATUS change indication means digital D_CTR_I/O_1 Necessary condition: MODUS[3] (active) off/on: Automatic Sound Select
bit[2] bit[1]
bit[0]
Valid next start Automatic Standard Detection.
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-9: Write Registers Subaddress 10hex, continued Register Address 40hex Function CONFIGURATION Register bit[15:1] bit[0] used, must I2S_CL frequency data sample length master mode (1.024 MHz) (2.048 MHz)) Name I2S_CONFIG
Micronas
June 2003; 6251-520-1DS
34x2G
3.3.2.5. Read Registers Subaddress 11hex Table 3-10: Read Registers Subaddress 11hex Register Address 7Ehex Function STANDARD RESULT Register Readback detected Sound FM-Radio Standard bit[15:0] 00hex 02hex Automatic Standard Detection could find sound standard Standard Codes (see Table 3-8) Name
STANDARD_RES
40hex FFhex Automatic Standard Detection still active 00hex STATUS Register Contains user relevant internal information about status bit[15:10] bit[8] undefined indicates bilingual sound mode present (internally evaluated from received analog digital identification signal) indicates independent mono sound (only NICAM mono/stereo indication (internally evaluated from received analog digital identification signals) analog sound standard active this pattern will occur digital sound (NICAM) available reception condition digital sound (NICAM) high error rate unimplemented sound code data transmission only low/high level digital D_CTR_I/O_1 low/high level digital D_CTR_I/O_0 detected secondary carrier (2nd carrier) secondary carrier detected detected primary carrier (Mono carrier) primary carrier detected undefined STATUS
bit[7] bit[6]
bit[5,9]
bit[4] bit[3] bit[2] bit[1] bit[0]
STATUS change indication activated means MODUS[1]: Each change STATUS register sets digital D_CTR_I/O_1 high level. Reading STATUS register resets D_CTR_I/O_1.
June 2003; 6251-520-1DS
Micronas
34x2G
3.3.2.6. Write Registers Subaddress 12hex Table 3-11: Write Registers Subaddress 12hex Register Address Function Name
PREPROCESSING 0Ehex FM/AM Prescale bit[15:8] 00hex 7Fhex 00hex Defines input prescale gain demodulated signal (RESET condition) PRE_FM
modes except satellite AM-mode, combinations prescale value deviation listed below lead internal full scale with test signal emphasis. mode bit[15:8] 7Fhex 48hex 30hex 24hex 18hex 13hex 30hex 14hex 20hex 1Ahex 10hex 7Chex deviation deviation deviation deviation deviation deviation (limit)
high deviation mode (HDEV2, Standard Code Chex) bit[15:8] deviation deviation (limit)
very high deviation mode (HDEV3, Standard Code Dhex) bit[15:8] deviation deviation (limit)
Satellite with adaptive deemphasis bit[15:8] recommendation
mode (MSP Standard Code bit[15:8] recommendation input levels from (Due being switched AM-output level remains stable independent actual SIF-level mentioned input range)
Micronas
June 2003; 6251-520-1DS
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address
(continued)
Function Matrix Modes Defines dematrix function demodulated signal bit[7:0] 00hex 01hex 02hex 03hex 04hex matrix (used bilingual unmatrixed stereo sound) German stereo (Standard B/G) Korean stereo (also used BTSC, EIA-J Radio) sound mono (left right channel contain mono sound FM/AM mono carrier) sound mono
Name FM_MATRIX
0Ehex
case Automatic Sound Select Matrix Mode automatically. Writing FM/AM prescale register 0Ehex high part) still allowed. order disturb automatic process, part transmission this register ignored. Therefore, FM-Matrix readback values differ from data written previously. case Automatic Sound Select off, Matrix Mode must shown Table 6-17 Appendix enable Forced Mono Mode THRESHOLD described Section 6.3.2.on page 10hex NICAM Prescale Defines input prescale value digital NICAM signal bit[15:8] 00hex 7Fhex prescale gain examples: 00hex gain 20hex gain (recommendation) 5Ahex gain (maximum gain) 7Fhex 16hex 12hex I2S1 Prescale I2S2 Prescale Defines input prescale value digital input signals bit[15:8] 00hex 7Fhex prescale gain examples: 00hex gain (recommendation) 10hex 7Fhex gain (maximum gain) 0Dhex SCART Input Prescale Defines input prescale value analog SCART input signal bit[15:8] 00hex 7Fhex prescale gain examples: 00hex gain VRMS input leads digital full scale) 19hex Dolby requirements, this maximum value allowed prohibit clipping VRMS input signal. gain (400 mVRMS input leads digital full scale) 7Fhex PRE_SCART PRE_I2S1 PRE_I2S2 PRE_NICAM
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address Function Name
SOURCE SELECT OUTPUT CHANNEL MATRIX 08hex 09hex 0Ahex 41hex 0Bhex 0Chex Source for: Loudspeaker Output Headphone Output SCART1 Output SCART2 Output Output Quasi-Peak Detector bit[15:8] 00hex 01hex "FM/AM": demodulated mono signal "Stereo A/B": demodulator Stereo signal manual mode, this source identical NICAM source 3410D) "Stereo demodulator Stereo Sound Language (only defined Automatic Sound Select) "Stereo demodulator Stereo Sound Language (only defined Automatic Sound Select) SCART input I2S1 input I2S2 input Main channel: processed signal Main channel: baseband processed signal with volume channel: baseband processed signal with volume SRC_MAIN SRC_AUX SRC_SCART1 SRC_SCART2 SRC_I2S SRC_QPEAK
03hex 04hex 02hex 05hex 06hex 0Chex 0Dhex 0Ehex
demodulator sources, Table 2-2. 08hex 09hex 0Ahex 41hex 0Bhex 0Chex Matrix Mode for: Loudspeaker Output Headphone Output SCART1 Output SCART2 Output Output Quasi-Peak Detector bit[7:0] Sound Mono Left Mono) 00hex Sound Mono Right Mono) 10hex 20hex Stereo (transparent mode) Mono (sum left right inputs divided 30hex special modes available (see Section 6.5.1. page 107) MAT_MAIN MAT_AUX MAT_SCART1 MAT_SCART2 MAT_I2S MAT_QPEAK
Automatic Sound Select mode, demodulator source channels according Table 2-2. Therefore, matrix modes corresponding output channels should "Stereo" (transparent).
Micronas
June 2003; 6251-520-1DS
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address Function
Name
LOUDSPEAKER HEADPHONE PROCESSING 00hex 06hex Volume Loudspeaker Volume Headphone bit[15:8] volume table with step size (maximum volume) 7Fhex 7Ehex 74hex 73hex 72hex -113 02hex -114 01hex Mute (reset condition) 00hex FFhex Fast Mute (needs about until signal completely ramped down) higher resolution volume table +0.125 increase addition volume table +0.875 increase addition volume table must VOL_MAIN VOL_AUX
bit[7:5]
bit[4] bit[3:0]
clipping mode reduce volume reduce tone control compromise dynamic
With large scale input signals, positive volume settings lead signal clipping. 34x2G loudspeaker headphone volume function divided into digital analog section. With Fast Mute, volume reduced mute position digital volume only. Analog volume changed. This reduces audible plops. turn volume again, volume step that been used before Fast Mute activated must transmitted. clipping mode "reduce volume", following rule used: prevent severe clipping effects with bass, treble, equalizer boosts, internal volume automatically limited level where, combination with either bass, treble, equalizer setting, amplification does exceed clipping mode "reduce tone control", bass treble value reduced amplification exceeds equalizer switched gain those bands reduced, where amplification together with volume exceeds clipping mode "compromise mode", bass treble value volume reduced half half amplification exceeds equalizer switched gain those bands reduced half half, where amplification together with volume exceeds clipping mode "dynamic", volume reduced automatically signal amplitudes would exceed dBFS within operation Micronas BASS, dynamic mode must switched
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address 29hex Function Automatic Volume Correction (AVC) Loudspeaker Channel bit[15:12] 00hex 08hex bit[11:8] (and reset internal variables) AVC_DECAY Name
decay time decay time 08hex decay time 04hex 02hex decay time decay time (should used approx. 01hex after channel change) output level dBFS 0hex dBFS 1hex fhex dBFS maximum attenuation 0hex 1hex 2hex maximum gain 0hex 1hex 3hex
bit[7:4]
AVC_LEVEL
bit[3:2]
AVC_MIN
bit[1:0]
AVC_MAX
01hex 30hex
Balance Loudspeaker Channel Balance Headphone Channel bit[15:8] Linear Mode Left muted, Right 100% 7Fhex 7Ehex Left 0.8%, Right 100% Left 99.2%, Right 100% 01hex Left 100%, Right 100% 00hex Left 100%, Right 99.2% FFhex 82hex Left 100%, Right 0.8% Left 100%, Right muted 81hex Logarithmic Mode 7Fhex Left -127 Right Left -126 Right 7Ehex 01hex Left Right Left Right 00hex Left Right FFhex Left Right -127 81hex Left Right -128 80hex Balance Mode linear 00hex logarithmic 01hex
BAL_MAIN BAL_AUX
bit[15:8]
bit[7:0]
Positive balance settings reduce left channel without affecting right channel; negative settings reduce right channel leaving left channel unaffected.
Micronas
June 2003; 6251-520-1DS
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address 20hex Function Tone Control Mode Loudspeaker Channel bit[15:8] 00hex FFhex bass treble active equalizer active
Name TONE_MODE
Defines whether Bass/Treble Equalizer activated loudspeaker channel. Bass Equalizer cannot work simultaneously. Equalizer used, Bass, Treble coefficients must zero vice versa. 02hex 31hex Bass Loudspeaker Channel Bass Headphone Channel bit[15:8] extended range 7Fhex 78hex 70hex 68hex normal range 60hex 58hex 08hex 00hex F8hex A8hex A0hex Higher resolution possible: step normal range results gain step about extended range about With positive bass settings, internal clipping occur even with overall volume less than This will lead clipped output signal. Therefore, recommended bass value that, conjunction with volume, would result overall positive gain. BASS_MAIN BASS_AUX
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address 03hex 32hex Function Treble Loudspeaker Channel Treble Headphone Channel bit[15:8] 78hex 70hex 08hex 00hex F8hex A8hex A0hex Name TREB_MAIN TREB_AUX
Higher resolution possible: step results gain step about With positive treble settings, internal clipping occur even with overall volume less than This will lead clipped output signal. Therefore, recommended treble value that, conjunction with volume, would result overall positive gain. 21hex 22hex 23hex 24hex 25hex Equalizer Loudspeaker Channel Band (below Equalizer Loudspeaker Channel Band (center: Equalizer Loudspeaker Channel Band (center: kHz) Equalizer Loudspeaker Channel Band (center: kHz) Equalizer Loudspeaker Channel Band (above: kHz) bit[15:8] 60hex 58hex 08hex 00hex F8hex A8hex A0hex EQUAL_BAND1 EQUAL_BAND2 EQUAL_BAND3 EQUAL_BAND4 EQUAL_BAND5
Higher resolution possible: step results gain step about With positive equalizer settings, internal clipping occur even with overall volume less than This will lead clipped output signal. Therefore, recommended equalizer bands value that, conjunction with volume, would result overall positive gain.
Micronas
June 2003; 6251-520-1DS
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address 04hex 33hex Function Loudness Loudspeaker Channel Loudness Headphone Channel bit[15:8] Loudness Gain 44hex 40hex 04hex +0.75 03hex +0.5 02hex +0.25 01hex 00hex Loudness Mode 00hex normal (constant volume kHz) 04hex Super Bass (constant volume kHz)
Name LOUD_MAIN LOUD_AUX
bit[7:0]
Higher resolution Loudness Gain possible: step results gain step about Loudness increases volume low- high-frequency signals, while keeping amplitude 1-kHz reference frequency constant. intended loudness according actual volume setting. Because loudness introduces gain, recommended loudness value that, conjunction with volume, would result overall positive gain. corner frequency bass amplification different values. Super Bass mode, corner frequency shifted point constant volume shifted from kHz.
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address 05hex Function Spatial Effects Loudspeaker Channel bit[15:8] Effect Strength 7Fhex Enlargement 100% Enlargement 3Fhex Enlargement 0.78% 01hex 00hex Effect reduction 0.78% FFhex reduction C0hex reduction 100% 80hex Spatial Effect Mode 0hex Stereo Basewidth Enlargement (SBE) Pseudo Stereo Effect (PSE). (Mode 2hex Stereo Basewidth Enlargement (SBE) only. (Mode Spatial Effect High-Pass Gain max. high-pass gain 0hex high-pass gain 2hex high-pass gain 4hex 6hex min. high-pass gain automatic 8hex Name SPAT_MAIN
bit[7:4]
bit[3:0]
Spatial effects should used together with 3D-PANORAMA PANORAMA. There several spatial effect modes available: mode (low byte 00hex), spatial effect depends source mode. incoming signal mono, Pseudo Stereo Effect active; stereo signals, Pseudo Stereo Effect Stereo Basewidth Enlargement effective. strength effect controllable upper byte. negative value reduces stereo image. strong spatial effect recommended small sets where loudspeaker spacing rather close. large screen sets, more moderate spatial effect recommended. mode only Stereo Basewidth Enlargement effective. mono input signals, Pseudo Stereo Effect switched worth mentioning, that spatial effects affect amplitude phase response. With lower bits, frequency response customized. value 0hex yields flat response center signals high-pass function only signals. value 6hex flat response only signals, low-pass function center signals. using 8hex, frequency response automatically adapted sound material choosing optimal high-pass gain. 2Bhex Mute Invert Loudspeaker Output bit[15:2] bit[1:0] must zero 0hex 1hex 2hex modification invert left channel output mute ouput MUT_INV_M
Micronas
June 2003; 6251-520-1DS
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address 26hex 27hex 28hex 34hex 35hex 36hex Function Acoustical Compensation Filter Loudspeaker Channel: C0_Main C1_Main C2_Main Acoustical Compensation Filter Headphone Left Channel (Center): C0_Center C1_Center C2_Center These cells determine coefficients second order filter acoustical compensation loudspeaker responses. transfer function this filter
Name
ACF_M0 ACF_M1 ACF_M2
ACF_C0 ACF_C1 ACF_C2
transfer function must have more than gain. Micronas will supply design tool these coefficients. This feature switched setting coefficients zero (reset state). mute fastmute operation should precede change these coefficients. coefficients two's complement numbers. bit[15:6] bit[5:3] bit[2:0] 10-bit coefficient LSBs coefficient (together with this forms 9-bit coefficient LSBs coefficient (together with this forms 9-bit coefficient
bit[15:6] bit[5:0] bit[15:6] bit[5:0] 10-bit coefficient MSBs coefficient 10-bit coefficient MSBs coefficient
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address Function Name
SUBWOOFER OUTPUT CHANNEL 2Chex Subwoofer Level Adjustment bit[15:8] 0Chex 01hex 00hex FFhex E3hex E2hex 80hex 00hex (default) Mute must zero SUBW_LEVEL
bit[7:0]
Micronas BASS added onto main channel, this register should 00hex 2Dhex Subwoofer Corner Frequency bit[15:8] 5.40dec corner frequency steps (range: 50.400 SUBW_FREQ
Micronas BASS active, SUBW_FREQ must value higher than Lowpass Frequency (MB_LP). Choosing corner frequency subwoofer closer MB_LP results narrower frequency range. Recommended value: Subwoofer Complementary High-Pass Filter bit[7:0] 0hex 1hex 2hex loudspeaker channel unfiltered complementary high-pass processed loudspeaker output channel added onto main channel SUBW_HP
MICRONAS BASS (MB) CONTROL REGISTERS 68hex Micronas BASS Effect Strength bit[15:8] bit[7:0] 00hex 7Fhex 00hex Micronas BASS (default) maximum Micronas BASS must zero MB_STR
Micronas BASS effect strength adjusted steps. value 44hex will yield medium Micronas BASS effect.
Micronas
June 2003; 6251-520-1DS
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address 69hex Function Micronas BASS Amplitude Limit bit[15:8] 00hex FFhex E0hex 00hex dBFS (default limitation) dBFS dBFS must zero
Name MB_LIM
bit[7:0]
Micronas BASS Amplitude Limit defines maximum allowed amplitude output relative dbFS. amplitude exceeds MB_LIM, gain automatically reduced. Note that Volume Clipping Mode must "dynamic" (see page 38). 6Ahex Micronas BASS Harmonic Content bit[15:8] 00hex 3Fhex 7Fhex 00hex harmonics added (default) fundamentals harmonics 100% harmonics must zero MB_HMC
bit[7:0]
Micronas BASS creates harmonics frequencies below highpass frequency (MB_HP). variable MB_HMC describes ratio harmonics towards original signal. 6Bhex Micronas BASS Pass Corner Frequency bit[15:8] 5dec 6dec 30dec 00hex must zero MB_LP
bit[7:0]
lowpass corner frequency (range 50.300 defines upper corner frequency bandpass filter. Recommended values same highpass corner frequency (MB_HP). 6Chex Micronas BASS High Pass Corner Frequency bit[15:8] 3dec 4dec 30dec 00hex must zero MB_HP
bit[7:0]
Micronas BASS highpass corner frequency defines lower corner frequency bandpass filter. highpass filter avoids loading loudspeakers with frequency components that below speakers' frequency. Recommended values subwoofer systems around 5dec (=50 Hz), regular sets around 10dec (=100 Hz).
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address Function Name
SCART OUTPUT CHANNEL 07hex 40hex Volume SCART1 Output Channel Volume SCART2 Output Channel bit[15:8] volume table with step size (maximum volume) 7Fhex 7Ehex 74hex 73hex 72hex -113 02hex -114 01hex Mute (reset condition) 00hex higher resolution volume table +0.125 increase addition volume table +0.875 increase addition volume table 01hex this must 01hex VOL_SCART1 VOL_SCART2
bit[7:5]
bit[4:0]
Micronas
June 2003; 6251-520-1DS
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address Function
Name
SCART SWITCHES DIGITAL PINS 13hex Register Defines level digital output pins position SCART switches bit[15] bit[14] bit[13:5] low/high digital output D_CTR_I/O_1 (MODUS[3]=0) low/high digital output D_CTR_I/O_0 (MODUS[3]=0) ACB_REG
SCART Input Select xxxx00xx0 SCART1 input (RESET position) xxxx01xx0 MONO input (Set Sound Mono channel matrix mode corresponding output channels) xxxx10xx0 SCART2 input xxxx11xx0 SCART3 input xxxx00xx1 SCART4 input xxxx11xx1 mute input
xx00xxx0x xx01xxx0x xx10xxx0x xx11xxx0x xx00xxx1x xx01xxx1x xx10xxx1x xx11xxx1x
bit[13:5]
SCART1 Output Select SCART3 input SCART1 output (RESET position) SCART2 input SCART1 output MONO input SCART1 output SCART1 SCART1 output SCART2 SCART1 output SCART1 input SCART1 output SCART4 input SCART1 output mute SCART1 output
bit[13:5]
SCART2 Output Select 00xxxx0xx SCART1 SCART2 output (RESET position) 01xxxx0xx SCART1 input SCART2 output 10xxxx0xx MONO input SCART2 output 00xxxx1xx SCART2 SCART2 output 01xxxx1xx SCART2 input SCART2 output 10xxxx1xx SCART3 input SCART2 output 11xxxx1xx SCART4 input SCART2 output 11xxxx0xx mute SCART2 output must zero
bit[4:0]
RESET position becomes active time first write transmission control audio processing part. writing register first, RESET state redefined. BEEPER 14hex Beeper Volume Frequency bit[15:8] Beeper Volume 00hex maximum volume 7Fhex Beeper Frequency 01hex (lowest) 40hex FFhex BEEPER
bit[7:0]
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address Function Name
SURROUND PROCESSING 48hex Output Configuration bit[15] AUX/CS Switch Headphone outputs active (pin names: DACA_L, DACA_R), outputs muted (Center/Surround) outputs active (pin names: DACM_C, DACM_S), outputs muted corresponds MA_CONF AUX_CS
AUX/CS switch defines which output pair driven converters that used headphone surround processing. unselected pins muted. This makes convenient connect center/surround amplifiers outputs 34x2G without external switches. Headphone/Surround channel should muted before switching (set register 06hex 0000hex). Allow least settling. bit[14:8] Channel Configuration STEREO: This mode used plain stereo mode. Stan00hex dard processing applies loudspeaker headphone channels. Surround processing switched off. this mode, compatible 34x0G bit[15] equal TWO_CHANNEL: This mode used virtual surround 01hex sound. surround processing block active left right outputs distributed loudspeaker output channel. processing headphone channel remains standard. this mode, comparable 34x1G. MULTI_CHANNEL: This mode used surround sound 02hex with more than channels. surround processing block active left right outputs distributed loudspeaker output channel, center surround outputs distributed headphone output channel. headphone processing possible. this mode, convenient select pins setting bit[15] MULTI_CHANNEL_CENTER: This mode used sur03hex round sound with more than channels. surround processing block active left right outputs distributed loudspeaker output channel, center surround outputs distributed headphone output channel. Just after volume control, center signal distributed left right loudspeaker outputs well center outputs. left right signals accessed feedback path source selector. headphone processing possible. this mode, convenient select pins setting bit[15] Tone control mode center channel Bass/Treble center channel (same setting surround chan.) 00hex 01hex center signal processed with equalizer using same band setting loudspeaker equalizer. surround channel processed with bass/treble. This mode only allowed channel configurations CHAN_CONF
bit[7:0]
C_TONE_MODE
Micronas
June 2003; 6251-520-1DS
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address 49hex Function Spatial Effects Surround Processing bit[15:8] Spatial Effect Strength 7Fhex Enlargement 100% Enlargement 3Fhex Enlargement 0.78% 01hex 00hex Effect 00hex must
Name SUR_SPAT
bit[7:0]
Increases perceived basewidth reproduced left right front channels. Recommended value: 3Fhex. contrast spatial effect loudspeaker channel, surround spatial effect optimized surround sound. Note: surround sound processing active, spatial effect loudspeaker channel (Register 05hex) switched off. 4Ahex Virtual Surround Effect Strength bit[15:8] Virtual Surround Effect Strength Effect 100% 7Fhex Effect 54hex Effect 3Fhex 01hex 00hex bit[7:0] 00hex Effect 0.78% Effect must SUR_3DEFF
Strength surround effect PANORAMA 3D-PANORAMA mode. other Surround Reproduction Modes, this value must Recommended value: 54hex.
June 2003; 6251-520-1DS
Micronas
34x2G
Table 3-11: Write Registers Subaddress 12hex, continued Register Address 4Bhex Function Surround Processing Mode bit[15:8] Decoder Matrix 00hex ADAPTIVE (for Dolby Logic Virtual Dolby Surround) PASSIVE (for Micronas AROUND) 10hex EFFECT (used special effects monophonic 20hex Micronas AROUND) Surround Reproduction 0hex 3hex REAR_SPEAKER: surround signal reproduced rear speaker. FRONT_SPEAKER: surround signal redirected front channels. There physical rear speaker connected. PANORAMA: surround signal processed redirected left right front speakers order create illusion virtual rear speaker, although physical rear speaker connected. 3D-PANORAMA® (approved Dolby Laboratories compliant with Virtual Dolby Surround technology): surround signal processed redirected left right front speakers order create illusion virtual rear speaker, although physical rear speaker connected. Name SUR_MODE DEC_MAT
bit[7:4]
SUR_REPRO
5hex
6hex
C_MODE
bit[3:0]
Center Mode 0hex 1hex 2hex 3hex PHANTOM mode Center speaker connected) NORMAL mode (small Center speaker) WIDE mode (large Center speaker) mode (Center output Surround Decoder discarded. Useful only special effect modes) SUR_DELAY delay surround path (lowest) delay surround path delay surround path (highest)) must
4Chex
Surround Delay bit[15:8] 05hex 06hex 1Fhex 00hex
bit[7:0]
Dolby Surround Logic designs, only fixed 15-30 variable delay must used. This register effect 3D-PANORAMA PANORAMA mode. 4Dhex Noise Generator bit[15:8] bit[7:0] 00hex 80hex A0hex B0hex C0hex D0hex Noise generator Noise generator Noise left channel Noise center channel Noise right channel Noise surround channel SUR_NOISE
Determines active channel noise generator.
Micronas
June 2003; 6251-520-1DS
34x2G
3.3.2.7. Read Registers Subaddress 13hex Table 3-12: Read Registers Subaddress 13hex Register Address Function
Name
QUASI-PEAK DETECTOR READOUT 19hex 1Ahex Quasi-Peak Detector Readout Left Quasi-Peak Detector Readout Right bit[15:0] 0hex. 7FFFhex QPEAK_L QPEAK_R
Values two's complement (only positive). value 4000hex corresponds internal full scale. 34x2G VERSION READOUT Registers 1Ehex Hardware Version Code bit[15:8] 02hex 3452G MSP_HARD
change hardware version code defines hardware optimizations that have influence chip's behavior. readout this register identical hardware version code chip's imprint. Major Revision Code bit[7:0] 07hex 3452G MSP_REVISION
major revision code 3452G 1Fhex Product Code bit[15:8] 02hex 0Chex 16hex 2Ahex 34hex 3Ehex 3402G 3412G 3422G 3442G 3452G 3462G MSP_PRODUCT
means MSP-Product Code, control processor able decide which sound standards audio baseband features have considered. Version Code bit[7:0] 43hex 3452G MSP_ROM
change version code defines internal software optimizations, that have influence chip's behavior, e.g. features have been included. While software change intended create compatibility problems, customers that want functions identify 34x2G versions according this number. avoid compatibility problems with 3410B 34x0D, offset 40hex added version code chip's imprint.
June 2003; 6251-520-1DS
Micronas
34x2G
3.5. Examples Minimum Initialization Codes Initialization 34x2G according these listings reproduces sound selected standard loudspeaker output. numbers hexadecimal. examples have following structure: Perform controlled reset Write MODUS register (with Automatic Sound Select). Source Selection loudspeaker channel (with matrix STEREO). Prescale and/or NICAM dummy matrix).
3.4. Programming Tips This section describes preferred method initializing 34x2G. initialization grouped into four sections: SCART Signal Path (analog signal path) Demodulator Input SCART Inputs Output Channels Fig. page complete signal flow.
SCART Signal Path Select analog input SCART baseband processing (SCART Input Select) means register. Select source each analog SCART output (SCART Output Select) means register.
Write STANDARD SELECT register. Volume loudspeaker channel
3.5.1. SCART1 Input Loudspeaker Stereo Sound
reset source loudspeaker scart, stereo prescale scart volume main
Demodulator Input complete setup sound processing from analog input source selection, following steps must performed: MODUS register preferred mode Sound input. Choose preferred prescale NICAM) values. Write STANDARD SELECT register. Automatic Sound Select active: Choose matrix repeatedly according sound mode indicated STATUS register. SCART Inputs Select preferred prescale SCART. Select preferred prescale inputs (set after RESET).
3.5.2. B/G-FM NICAM)
MODUS-Register: Automatic Source Sel. Matr. FM/AM-Prescale 24hex, FM-Matrix MONO/SOUNDA NICAM-Prescale 5Ahex Standard Select: NICAM Softreset
Loudspeaker Volume
3.5.3. BTSC-Stereo
Softreset MODUS-Register: Automatic Source Sel. Matr. FM/AM-Prescale 24hex, FM-Matrix Sound Mono Standard Select: BTSC-STEREO Loudspeaker Volume
Output Channels Select source channel matrix each output channel. audio baseband processing. Select volume each output channel.
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June 2003; 6251-520-1DS
34x2G
3.5.4. BTSC-SAP with Loudspeaker Channel
MODUS-Register: Automatic Source Sel. Matr. FM/AM-Prescale 24hex, FM-Matrix Sound Mono Standard Select: BTSC-SAP Loudspeaker Volume Softreset
panorama sound effect Dolby Surround Logic Normal mode Delay Noise Sequencer
3.5.8. Virtual Dolby Surround Example SCART1 Input Loudspeaker 3D-PANORAMA Sound
reset source loudspeaker scart, stereo prescale scart with some loss volume main channel virtual surround mode Surround spatial effect panorama sound effect adaptive, 3d_panorama, phantom Noise Sequencer
3.5.5. FM-Stereo Radio
MODUS-Register: Automatic Source Sel. Matr. FM/AM-Prescale 24hex, FM-Matrix Sound Mono Standard Select: FM-STEREO-RADIO Loudspeaker Volume Softreset
3.5.9. Noise Sequencer Dolby Logic 3.5.6. Automatic Standard Detection detailed software flow diagram shown Fig. page
MODUS-Register: Automatic Source Sel. Matr. FM/AM-Prescale 24hex, FM-Matrix Sound Mono NICAM-Prescale 5Ahex Standard Select: Automatic Standard Detection Softreset switch into Dolby Logic sound (s.a.). Then: [wait seconds] [wait seconds] [wait seconds] [wait seconds] switch back normal operation Noise Sequencer noise noise noise noise
Wait till STANDARD RESULT contains value 07FF STANDARD RESULT contains 0000 some error handling ELSE Loudspeaker Volume
3.5.10. Software Flow Interrupt driven STATUS Check detailed software flow diagram shown Fig. page D_CTR_I/O_1 34x2G connected interrupt input controller, following interrupt handler applied automatically called with each status change 34x2G. interrupt handler adjust display according status information.
Interrupt Handler: Read STATUS adjust display with given status information Return from Interrupt
3.5.7. Dolby Surround Logic Example SCART1 Input Loudspeaker Center/Surround Output Pins Dolby Surround Logic (Normal mode).
source loudspeaker scart, stereo prescale scart volume main volume center/surround multi channel mode with outputs used Surround spatial effect reset
June 2003; 6251-520-1DS
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34x2G
@hyr essential bits:
Enable interrupt STATUS changes ANA_IN1+ selected Define Preference Automatic Standard Detection: [12] MHz, SECAM-L [14:13] Ignore carrier
:ULWH 02'86 5HJLVWHU:
@hyr)
:ULWH 6285&( 6(/(&7 6HWWLQJV
loudspeaker Source Select "Stereo headphone Source Select "Stereo SCART_Out Source Select "Stereo A/B" Channel Matrix mode outputs "Stereo"
Write FM/AM-Prescale Write NICAM-Prescale
:ULWH LQWR 67$1'$5' 6(/(&7 5HJLVWHU
(Start Automatic Standard Detection)
previous standard standard manually according picture information
Result
expecting MSPG-interrupt
FDVH LQWHUUXSW IURP &RQWUROOHU
Read STATUS
Adjust TV-Display
Bilingual, adjust Source Select setting required
Fig. 3-2: Software flow diagram Minimum demodulator setup European Multistandard applying Automatic Sound Select feature
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June 2003; 6251-520-1DS
34x2G
Specifications 4.1. Outline Dimensions
Fig. 4-1: PMQFP80-11: Plastic Metric Quad Flat Package, leads, mm3, high standoff Ordering code: Weight approximately 1.68
June 2003; 6251-520-1DS
Micronas
34x2G
Fig. 4-2: PMQFP64-2: Plastic Metric Quad Flat Package, leads, Ordering code: Weight approximately
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June 2003; 6251-520-1DS
34x2G
Fig. 4-3: PSDIP64-1: Plastic Shrink Dual In-line Package, leads, Ordering code: Weight approximately 8.77
June 2003; 6251-520-1DS
Micronas
34x2G
4.2. Connections Short Descriptions connected; leave vacant used, leave vacant obligatory; connect described circuit diagram DVSS: used, connect DVSS AHVSS: connect AHVSS
PMQFP 80-11 PMQFP 64-2 PSDIP 64-1
Name
Type
Connection
used)
Short Description
I2C_CL I2C_DA I2S_CL I2S_WS I2S_DA_OUT I2S_DA_IN1 ADR_DA ADR_WS ADR_CL DVSUP DVSUP DVSUP DVSS DVSS DVSS I2S_DA_IN2 RESETQ DACA_R DACA_L VREF2 DACM_R IN/OUT IN/OUT IN/OUT IN/OUT
connected clock data clock word strobe data output I2S1 data input data output word strobe clock Digital power supply Digital power supply Digital power supply Digital ground Digital ground Digital ground I2S2-data input connected connected connected Power-on-reset connected connected Headphone out, right Headphone out, left Reference ground Loudspeaker out, right
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June 2003; 6251-520-1DS
34x2G
PMQFP 80-11 PMQFP 64-2 PSDIP 64-1
Name
Type
Connection
used)
Short Description
DACM_L DACM_C DACM_SUB DACM_S SC2_OUT_R SC2_OUT_L VREF1 SC1_OUT_R SC1_OUT_L CAPL_A AHVSUP CAPL_M AHVSS AHVSS AGNDC SC4_IN_L SC4_IN_R SC3_IN_L SC3_IN_R SC2_IN_L SC2_IN_R SC1_IN_L SC1_IN_R
Loudspeaker out, left Center output Subwoofer output Surround output connected SCART output right SCART output left Reference ground SCART output right SCART output left Volume capacitor Analog power supply Volume capacitor MAIN connected connected Analog ground Analog ground Analog reference voltage connected SCART input, left SCART input, right Analog Shield Ground SCART input, left SCART input, right Analog Shield Ground SCART input, left SCART input, right Analog Shield Ground SCART input, left SCART input, right
AHVSS
AHVSS
AHVSS
AHVSS
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34x2G
PMQFP 80-11 PMQFP 64-2 PSDIP 64-1
Name
Type
Connection
used)
Short Description
VREFTOP MONO_IN AVSS AVSS AVSUP AVSUP ANA_IN1+ ANA_IN-
AVSS AVSS IN/OUT IN/OUT
Reference voltage converter connected Mono input Analog ground Analog ground connected connected Analog power supply Analog power supply input common (can left vacant, only input also use) input (can left vacant, only input also use) Test Crystal oscillator Crystal oscillator Test Audio clock output (18.432 MHz) connected connected D_CTR_I/O_1 D_CTR_I/O_0 address select Stand-by (low-active)
ANA_IN2+
TESTEN XTAL_IN XTAL_OUT AUD_CL_OUT D_CTR_I/O_1 D_CTR_I/O_0 ADR_SEL STANDBYQ
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June 2003; 6251-520-1DS
34x2G
4.3. Descriptions numbers refer PMQFP80-11 package. connected. I2C_CL Clock Input/Output (Fig. 4-14) this pin, I2C-bus clock signal supplied. signal pulled down case wait conditions. I2C_DA Data Input/Output (Fig. 4-14) this pin, I2C-bus data written read from MSP. I2S_CL Clock Input/Output (Fig. 4-15) Clock line bus. master mode, this line driven MSP; slave mode, external clock supplied. I2S_WS Word Strobe Input/Output (Fig. 4-15) Word strobe line bus. master mode, this line driven MSP; slave mode, external word strobe supplied. I2S_DA_OUT Data Output (Fig. 4-19) Output digital serial sound data bus. I2S_DA_IN1 Data Input (Fig. 4-11) First input digital serial sound data bus. ADR_DA Data Output (Fig. 4-19) Output digital serial data 3510A bus. ADR_WS Word Strobe Output (Fig. 4-19) Word strobe output bus. ADR_CL Clock Output (Fig. 4-19) Clock line bus. Pins DVSUP* Digital Supply Voltage Power supply digital circuitry MSP. Must connected power supply. Pins DVSS* Digital Ground Ground connection digital circuitry MSP. I2S_DA_IN2 Data Input (Fig. 4-11) Second input digital serial sound data bus. Pins Pins connected. RESETQ Reset Input (Fig. 4-11) steady state, high level required. level resets 34x2G. Pins Pins connected.
Pins DACA_R/L Headphone Outputs (Fig. 4-17) Output headphone signal. 1-nF capacitor AHVSS must connected these pins. offset these pins depends selected headphone volume. VREF2 Reference Ground Reference analog ground. This must connected separately single ground point (AHVSS). VREF2 serves clean ground should used reference analog connections loudspeaker headphone outputs. Pins DACM_R/L Loudspeaker Outputs (Fig. 4-17) Output loudspeaker signal. 1-nF capacitor AHVSS must connected these pins. offset these pins depends selected loudspeaker volume. DACM_C Center Output (Fig. 4-17) Output center loudspeaker signal. 1-nF capacitor AHVSS must connected these pins. active (HP/CS offset these pins depends selected headphone volume. DACM_SUB Subwoofer Output (Fig. 4-17) Output subwoofer signal. 1-nF capacitor AHVSS must connected this pin. frequency content subwoofer output, value capacitor increased better suppression high-frequency noise. offset this depends selected loudspeaker volume. Pins DACM_S Surround Output (Fig. 4-17) Output surround loudspeaker signal. 1-nF capacitor AHVSS must connected these pins. active (HP/CS offset these pins depends selected headphone volume. connected. Pins SC2_OUT_R/L SCART2 Outputs (Fig. 4-18) Output SCART2 signal. Connections these pins must 100- series resistor intended AC-coupled. VREF1 Reference Ground Reference analog ground. This must connected separately single ground point (AHVSS). VREF1 serves clean ground should used reference analog connections SCART outputs.
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34x2G
Pins SC3_IN_L/R SCART3 Inputs (Fig. 4-10) analog input signal SCART3 this pin. Analog input connection must AC-coupled. Analog Shield Ground Analog ground (AHVSS) should connected this reduce cross-coupling between SCART inputs. Pins SC2_IN_L/R SCART2 Inputs (Fig. 4-10) analog input signal SCART2 this pin. Analog input connection must AC-coupled. Analog Shield Ground Analog ground (AHVSS) should connected this reduce cross-coupling between SCART inputs. Pins SC1_IN_L/R SCART1 Inputs (Fig. 4-10) analog input signal SCART1 this pin. Analog input connection must AC-coupled. VREFTOP Reference Voltage Converter (Fig. 4-12) this pin, reference voltage converter decoupled. must connected AVSS pins with 10-µF 100-nF capacitor parallel. Traces must kept short. connected. MONO_IN Mono Input (Fig. 4-9) analog mono input signal this pin. Analog input connection must AC-coupled. Pins AVSS* Ground Analog Power Supply Voltage Ground connection analog input circuitry MSP. Pins Pins connected. Pins AVSUP* Analog Power Supply Voltage Power supplied this analog input circuitry MSP. This must connected supply. ANA_IN1+ Input (Fig. 4-12) analog sound signal supplied this pin. Inputs must AC-coupled. This designed symmetrical input: ANA_IN1+ internally connected input symmetrical amp, ANA_IN- other. ANA_IN- Common (Fig. 4-12) This pins serves common reference ANA_IN1/ inputs.
Pins SC1_OUT_R/L SCART1 Outputs (Fig. 4-18) Output SCART1 signal. Connections these pins must 100- series resistor intended AC-coupled. CAPL_A Volume Capacitor Headphone (Fig. 4-20) 10-µF capacitor AHVSUP must connected this pin. serves smoothing filter headphone volume changes order suppress audible plops. value capacitor lowered 1-µF faster response required. area encircled trace lines should minimized; keep traces short possible. This input sensitive magnetic induction. AHVSUP* Analog Power Supply High Voltage Power supplied this analog circuitry (except input). This must connected supply. CAPL_M Volume Capacitor Loudspeaker (Fig. 4-20) 10-µF capacitor AHVSUP must connected this pin. serves smoothing filter loudspeaker volume changes order suppress audible plops. value capacitor lowered faster response required. area encircled trace lines should minimized; keep traces short possible. This input sensitive magnetic induction. Pins Pins connected. Pins AHVSS* Ground Analog Power Supply High Voltage Ground connection analog circuitry (except input). AGNDC Internal Analog Reference Voltage This serves internal ground connection analog circuitry (except input). must connected VREF pins with 3.3-µF 100-nF capacitor parallel. This pins shows level typically 3.73 connected. Pins SC4_IN_L/R SCART4 Inputs (Fig. 4-10) analog input signal SCART4 this pin. Analog input connection must AC-coupled. Analog Shield Ground Analog ground (AHVSS) should connected this reduce cross-coupling between SCART inputs.
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June 2003; 6251-520-1DS
34x2G
ANA_IN2+ Input (Fig. 4-12) analog sound signal supplied this pin. Inputs must AC-coupled. This designed symmetrical input: ANA_IN2+ internally connected input symmetrical amp, ANA_IN- other. TESTEN Test Enable (Fig. 4-11) This enables factory test modes. normal operation, must connected ground. Pins XTAL_IN, XTAL_OUT Crystal Input Output Pins (Fig. 4-16) These pins connected 18.432 crystal oscillator which digitally tuned integrated shunt capacitances. external clock into XTAL_IN. audio clock output signal AUD_CL_OUT derived from oscillator. External capacitors each crystal ground (AVSS) required. should verified layout, that supply current digital circuitry flowing through ground connection point. This enables factory test modes. normal operation, must left vacant. AUD_CL_OUT Audio Clock Output (Fig. 4-16) This 18.432 main clock output. Pins Pins connected. Pins D_CTR_I/O_1/0 Digital Control Input/ Output Pins (Fig. 4-15) These pins serve general purpose input/output pins. D_CTR_I/O_1 used interrupt request controller. ADR_SEL Address Select (Fig. 4-13) means this pin, three device addresses selected. connected ground (I2C device addresses 80/81hex), supply (84/85hex), left open (88/89hex). STANDBYQ Stand-by normal operation, this must High. 34x2G switched first pulling STANDBYQ then (after delay) switching keeping power supply (`Stand-by'-mode), SCART switches maintain their position function.
Application Note: ground pins should connected low-resistive ground plane. supply pins should connected separately with short low-resistive lines power supply. Decoupling capacitors from DVSUP DVSS, AVSUP AVSS, AHVSUP AHVSS recommended closely possible these pins. Decoupling DVSUP DVSS most important. recommend using more than capacitor. choosing different values, frequency range active decoupling extended. application boards use: capacitor with lowest value should placed nearest DVSUP DVSS pins. pins should connected closely possible ground. they lead with SCART-inputs shielding lines, they should connected ground SCART connector.
June 2003; 6251-520-1DS
Micronas
34x2G
4.4. Configurations
SC2_IN_L SC2_IN_R SC1_IN_L SC1_IN_R VREFTOP MONO_IN AVSS AVSS
SC3_IN_R SC3_IN_L SC4_IN_R SC4_IN_L AGNDC AHVSS AHVSS
AVSUP AVSUP ANA_IN1+ ANA_IN- ANA_IN2+ TESTEN XTAL_IN XTAL_OUT AUD_CL_OUT D_CTR_I/O_1 D_CTR_I/O_0 ADR_SEL STANDBYQ
CAPL_M AHVSUP CAPL_A SC1_OUT_L SC1_OUT_R VREF1 SC2_OUT_L SC2_OUT_R DACM_S DACM_SUB DACM_C DACM_L DACM_R VREF2 DACA_L
34x2G
I2C_CL I2C_DA I2S_CL I2S_WS I2S_DA_OUT I2S_DA_IN1 ADR_DA ADR_WS ADR_CL DVSUP DVSUP I2S_DA_IN2 DVSS DVSS DVSS DVSUP RESETQ
DACA_R
Fig. 4-4: PMQFP80-11 package
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June 2003; 6251-520-1DS
34x2G
SC2_IN_L SC2_IN_R SC1_IN_L SC1_IN_R VREFTOP MONO_IN AVSS
SC3_IN_R SC3_IN_L SC4_IN_R SC4_IN_L AGNDC AHVSS
AVSUP ANA_IN1+ ANA_IN- ANA_IN2+ TESTEN XTAL_IN XTAL_OUT AUD_CL_OUT D_CTR_I/O1 D_CTR_I/O0 ADR_SEL STANDBYQ I2C_CL I2C_DA I2S_CL I2S_WS I2S_DA_OUT I2S_DA_IN1 ADR_DA ADR_WS I2S_DA_IN2 DVSS DVSUP ADR_CL RESETQ CAPL_M AHVSUP CAPL_A SC1_OUT_L SC1_OUT_R VREF1 SC2_OUT_L SC2_OUT_R DACM_S DACM_SUB DACM_C DACM_L DACM_R VREF2 DACA_L DACA_R
34x2G
Fig. 4-5: PMQFP64-2 package
June 2003; 6251-520-1DS
Micronas
34x2G
AUD_CL_OUT D_CTR_I/O_1 D_CTR_I/O_0 ADR_SEL STANDBYQ I2C_CL I2C_DA I2S_CL I2S_WS I2S_DA_OUT I2S_DA_IN1 ADR_DA ADR_WS ADR_CL DVSUP DVSS I2S_DA_IN2 RESETQ DACA_R DACA_L VREF2 DACM_R DACM_L DACM_C DACM_SUB DACM_S
XTAL_OUT XTAL_IN TESTEN ANA_IN2+ ANA_IN- ANA_IN+ AVSUP AVSS MONO_IN VREFTOP SC1_IN_R SC1_IN_L SC2_IN_R SC2_IN_L SC3_IN_R SC3_IN_L SC4_IN_R SC4_IN_L AGNDC AHVSS CAPL_M AHVSUP CAPL_A SC1_OUT_L SC1_OUT_R VREF1 SC2_OUT_L SC2_OUT_R
34x2G
Fig. 4-6: PSDIP64-1 package
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June 2003; 6251-520-1DS
34x2G
4.5. Circuits ANA_IN1+ ANA_IN2+
>300
DVSS Fig. 4-7: Input Pin: RESETQ ANA_IN- VREFTOP
AVSUP
Fig. 4-12: Input Pins VREFTOP, ANA_IN1+, ANA_IN-, ANA_IN2+
Fig. 4-8: Input Pin: TESTEN DVSUP
3.75
Fig. 4-9: Input Pin: MONO_IN
ADR_SEL Fig. 4-13: Input Pin: ADR_SEL
3.75
Fig. 4-10: Input Pins: SC4-1_IN_L/R
Fig. 4-14: Input/Output Pins: I2C_CL, I2C_DA
Fig. 4-11: Input Pins: I2S_DA_IN1, I2S_DA_IN2, STANDBYQ
DVSUP Fig. 4-15: Input/Output Pins: I2S_CL, I2S_WS, D_CTR_I/O_1, D_CTR_I/O_0
June 2003; 6251-520-1DS
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34x2G
3-30
Fig. 4-20: Capacitor Pins: CAPL_A, CAPL_M
3-30
3.75
Fig. 4-16: Input/Output Pins: XTAL_IN, XTAL_OUT, AUD_CL_OUT
Fig. 4-21: Pin: AGNDC
AHVSUP
0.1.2
Fig. 4-17: Output Pins: DACA_R/L, DACM_R/L, DACM_SUB, DACM_C/S
3.75
Fig. 4-18: Output Pins: SC_2_OUT_R/L, SC_1_OUT_R/L
DVSUP Fig. 4-19: Output Pins: I2S_DA_OUT, ADR_DA, ADR_WS, ADR_CL
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June 2003; 6251-520-1DS
34x2G
4.6. Electrical Characteristics Abbreviations: defined vacant applicable positive current values mean current flowing into chip
4.6.1. Absolute Maximum Ratings Stresses beyond those listed "Absolute Maximum Ratings" cause permanent damage device. This stress rating only. Functional operation device these conditions implied. Exposure absolut maximum rating conditions extended periods will affect device reliability. voltages listed referenced ground except where noted. grounds must externally connected ohmic. This device contains circuitry protect inputs outputs against damage high static voltages electric fields; however, advised that normal precautions taken avoid application voltage higher than absolut maximum-rated voltages this high-impedance circuit.
Table 4-1: Absolute Maximum Ratings Symbol Parameter Name Min. TA1) Ambient Operating Temperature PSDIP64-1 PMQFP80-11 PMQFP64-2 Case Operating Temperature PSDIP64-1 PMQFP80-11 PMQFP64-2 Storage Temperature Maximum Power Dissipation PSDIP64-1 PMQFP80-11 PMQFP64-2 Supply Voltage Supply Voltage Supply Voltage Input Voltage, Digital Inputs Input Current, Digital Pins AHVSUP DVSUP AVSUP -0.3 -0.3 -0.3 -0.3 1300 1000 VSUP2+0.3 Limit Values Max. Unit
PMAX
VSUP1 VSUP2 VSUP3 VIdig IIdig
Measured standard board according JESD Standard with maximum power consumption allowed this package.
June 2003; 6251-520-1DS
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34x2G
Table 4-1: Absolute Maximum Ratings, continued Symbol Parameter Name Min. VIana IIana IOana IOana ICana Input Voltage, Analog Inputs Input Current, Analog Inputs Output Current, SCART Outputs Output Current, Analog Outputs except SCART Outputs Output Current, other pins connected capacitors SCn_IN_s,1) MONO_IN SCn_IN_s,1) MONO_IN SCn_OUT_s1) DACM_r,1) DACA_s CAPL_A, CAPL_M, AGNDC -0.3
Limit Values Max. VSUP1+0.3
Unit
means "1", "2", "3", "4"; means "L", "R", "C", "S"; means analog outputs sh
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