Semiconductor MSC1162A Semiconductor 40-Bit Vacuum Fluorescent Di

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Semiconductor MSC1162A Semiconductor 40-Bit Vacuum Fluorescent Di

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E2C0034-27-Y5
Semiconductor MSC1162A
Semiconductor 40-Bit Vacuum Fluorescent Display Tube Grid/Anode Driver
This version: Nov. 1997 MSC1162A Previous version: Jul. 1996
GENERAL DESCRIPTION
MSC1162A monolithic designed directly driving grid anode vacuum fluorescent display tube. device contains 40-bit bidirectional shift register, 40-bit latch circuit, 40-output circuit single chip. Display data serially stored shift register rising edge clock pulse. Setting allows driver outputs driven low, which makes possible display blanking. Also, setting both pins high allows driver outputs driven high, which provides easy testing lights after final assembly tube panel. MSC1162A compatible with MSC1162.
FEATURES
Logic Supply Voltage (VCC) Driver Supply Voltage (VHV): Driver Output Current IOHVH1 (Only driver output "H") -40mA IOHVH2 (All driver outputs "H") -2mA IOHVL:1mA Directly connected tube without pull-down resistors Data Transfer Speed: 4MHz Package 60-pin plastic SSOP (SSOP60-P-700-0.65-BK) (Product name MSC1162AGS-BK)
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Semiconductor
MSC1162A
BLOCK DIAGRAM
HVO1 HVO2 40-Bit Bidirectional Shift Register
40-Bit Latch
HVO40 PO40 GND1 GND2 DOUT I-40 O-40
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Semiconductor
MSC1162A
INPUT OUTPUT CONFIGURATION
Schematic Diagrams Logic portion Input/Output Circuits Driver Output Circuits Input
INPUT
GND1
GND2
Output
DOUT
GND2
GND1
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Semiconductor Driver Output Circuit
MSC1162A
Output
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Semiconductor
CONFIGURATION (TOP VIEW)
No-connection 60-Pin Plastic SSOP
MSC1162A
DOUT
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MSC1162A
DESCRIPTION
Symbol Type Description Shift register clock input pin. Shift register reads data through while state data shift register shifted from stage next stage rising edge clock. Serial data input shift register. Display data (positive logic) input through synchronization with clock. Serial data output shift register. Data output through DOUT synchronization with signal. When High, data PO40 shift register output through DOUT pin. When Low, data shift register output through DOUT pin. Latch strobe input When high, parallel output data (PO1-40) shift register read out. When goes from high low, parallel output data (PO1-40) shift register held. Clear input with built-in pull-up resistor normally being high. high low, driver outputs (HV01 HV40) phase with corresponding latch outputs O40). high high, driver outputs (HV01 HV40) high irrespective states latch outputs. low, driver outputs driven irrespective states latch outputs. This allows display blanking set. Input testing (with pull-down resistor) normally being low. high, driver outputs (HV01 HV40) phase with corresponding latch outputs O40). low, driver outputs (HV01 HV40) irrespective states latch outputs. high, driver outputs driven high irrespective states latch outputs. This provides easy testing lights after final assembly. High voltage driver outputs driving tube driver outputs phase with corresponding latch outputs O40). direct connection grid anode tube eliminates pull-down resistors. Power supply driver circuits tube Power supply logic driver circuits tube. (D-GND) Since GND1 connected L-GND, connect this external L-GND. logic circuits. (L-GND) Since GND2 connected D-GND, connect this external D-GND.
DOUT
VHO1-40 GND1 GND2
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MSC1162A
ABSOLUTE MAXIMUM RATINGS
Parameter Logic Supply Voltage Driver Supply Voltage Input Voltage Output Voltage Driver Driving Frequency Withstand Output Voltage Power Dissipation Package Thermal Resistance Storage Temperature Symbol fDRV VHVO Rj-a TSTG Condition Applicable logic supply Applicable driver supply Applicable input pins Applicable data output Applicable driver output Applicable driver output 25°C 25°C Rating -0.3 +6.5 -0.3 -0.3 +0.3 -0.3 +0.3 -0.3 +0.3 +150 Unit °C/W
Notes: Maximum Supply Voltage with respect L-GND D-GND Permanent damage caused voltage supplied over rating value. Package Thermal Resistance (between junction ambient) junction temperature (Tj) expressed equation indicated below should exceed 150°C. Tj=P Rj-a+Ta Maximum power consumption)
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MSC1162A
RECOMMENDED OPERATING CONDITIONS
Parameter Logic Supply Voltage Driver Supply Voltage High Level Input Voltage Level Input Voltage High Level Driver Output Current Level Driver Output Current Frequency Pulse Width Data Setup Time Data Hold Time Data Pulse Width Latch Probe Pulse Width Symbol IOHVH1 IOHVH2 IOHVL fCLK tw(CLK) tSU(D-CLK) th(CLK-D) tw(D) tw(LS) timing diagram Condition Applicable logic supply voltage Applicable driver supply voltage Applicable input pins Applicable input pins Applicable driver output Only output high outputs high Min. Max. Unit
Applicable driver output pins
CLK-LS tsu(CLK-LS) Setup Time LS-CLK tsu(LS-CLK) LS-CHG tsu(LS-CHG) LS-CL Pulse Width tsu(LS-CL) tw(CHG) tw(CL)
Operating Temperature
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MSC1162A
ELECTRICAL CHARACTERISTICS
Characteristics
(VCC=4.5 5.5V, VHV=10 65V, Ta=-40 +85°C) Parameter Logic Supply Current Symbol ICC1 ICC2 IHV1 Driver Supply Current IHV2 load VCC=5.5V load VCC=5.5V Condition input: input: High, Ta=25°C input: input: High Ta=25°C VCC=5.5V, VIN=5.5V Inputs excluding VCC=5.5V, VIN=5.5V input VCC=5.5V, VIN=0V Inputs excluding VCC=5.5V, VIN=0V input Ta=25°C IOH=-0.1mA IOL=0.1mA VCC=4.5V VCC=5.5V VCC=4.5V VCC=5.5V IOH=-40mA IOH=-2mA IOL=1mA Min. Typ. 2.45 Max. 6.65 Unit
VHV-4 VHV-4
High Level Input Current
Level Input Current
Input Capacitance High Level Data Output Voltage Level Data Output Voltage High Level Driver Output Voltage Level Driver Output Voltage
VODH VODL VOHVH1 VOHVH2 VOHVL
Characteristics
(VCC=5V, VHV=65V, Ta=25°C) Parameter CLK-DOUT Delay Time Delay Time High Transit Time High Delay Time High Transit Time High Symbol tDLH tTLH tDHL tTHL Condition Min. Typ. Max. Unit
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TIMING DIAGRAM
Semiconductor
1/fCLK T1/2 tsu(D-CLK) th(CLK-D) tw(D) DOUT tsu(CLK-LS) tsu(LS-CHG) tw(CHG) tsu(LS-CL) tDLH tDLH tw(CL) tw(CL) tw(CHG) tw(LS) tsu(LS-CLK) T3/4 T39/40 T1/2 tw(CLK) T3/4
tDHL
tDHL
(OTHERS)
MSC1162A
tTLH
tTLH
tTHL
tTHL
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MSC1162A
FUNCTIONAL DESCRIPTION
Function Table Shift register
Input PO2n PO2n PO1n PO1n PO3n PO3n Shift Register Parallel changed PO38n PO38n PO40n PO40n PO39n PO39n PO39 PO40 Output DOUT changed PO40 PO40
Don't Care PO1n PO40n PO40 data just before CLOCK rises.
Latch
Input Don't Care, Shift Register Parallel Latch Output changed
Driver output
Input Latch Output Driver Output HVOm
Don't Care,
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NOTES
Connect GND1 GND2 externally equal potential voltage. contents shift register undefined when power applied. Therefore, unnecessary driver outputs driven high just after power-on, tube flicker. avoid this, follow procedures: Apply driver power supply after applying logic power supply, with remained low. Start displaying setting high after putting display data shift register through pin.
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Semiconductor Test circuit
MSC1162A
20pF HVO1 1.5kW HVO2
5.0V HVO40
GND1,
DOUT
30pF
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Semiconductor
MSC1162A
PACKAGE DIMENSIONS
(Unit
SSOP60-P-700-0.65-BK
Mirror finish
Package material Lead frame material treatment Solder plate thickness Package weight
Epoxy resin alloy Solder plating more 1.21 TYP.
Notes Mounting Surface Mount Type Package SOP, QFP, TSOP, SOJ, (PLCC), surface mount type packages, which very susceptible heat reflow mounting humidity absorbed storage. Therefore, before perform reflow mounting, contact Oki's responsible sales person product name, package name, number, package code desired mounting conditions (reflow method, temperature times).
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Semiconductor MSC1162A Semiconductor 40-Bit Vacuum Fluorescent Di

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