APPLICATION NOTE #101 Proposal Cost X-Ray Tomography Using R4430

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APPLICATION NOTE #101 Proposal Cost X-Ray Tomography Using R4430

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APPLICATION NOTE #101
Proposal Cost X-Ray Tomography Using R4430 Microprocessor MCMs Parallel Processing Elements
Aeroflex Laboratories Inc. teamed with State University N.Y. Stony Brook
Technical Administrative Points Contact: Aeroflex Laboratories Inc., South Service Road, Plainview N.Y. 11803 Terlizzi, TEL: (516) 752-2418, FAX: (516) 694-6715 State University York Stony Brook Larry Wittie, TEL: (516) 632-8456, (email: lw@sbcs.sunysb.edu).
APPLICATION NOTE #101
Revised 6/96
Innovative Claims Proposed Research
Aeroflex-Stony Brook team proposing development demonstration model parallel computing system with capability providing computing power required real time X-Ray tomography. cost RISC microprocessor multichip modules will used basis design. system design will utilize microprocessors linked innovative latency-hiding cache-update interfaces fast eager copying individual changes variables shared between processors. system allows rapid writer-initiated sending cache lines processors that have copy cache line. Compile-time analysis tools will used determine minimum data sharing between processors sufficient produce accurate results. proposed processor assembly will contain microprocessor modules, SRAM megabytes) modules associated control interface modules. system deliver GFLOPS, peak power GLFOPS, parallel computations, allowing realtime calculation display high resolution medical tomographic scans. processor chassis with internal convective cooling would market less than $200,000 production quantities. would equal performance processor Cray applications.
Deliverables Associated with Proposed Research
Deliverables will demonstration model hardware software commercially viable real-time, X-Ray tomography system, parallel computer capable rendering voxels second less, voxels 1/24 second less. processor demonstration model will prototype scalable cost parallel computers with microprocessors. software will demonstrate effectiveness efficiency "Eagersharing" concept.
Technical Rationale, Technical Approach
recent commercial availability high speed 100mHz, MIPS, MFLOPS) RISC microprocessors advanced cost technology, made series cost high speed multiprocessor systems feasible. R4430MC RISC multiprocessor designed MIPS current choice fast processors. operates with volts power supply power dissipation. Speeds expected exceed 1000 MIPS processor within next five years. basic concept proposed cost microprocessor module along with associated memory that stacked vertically with heat sinking along edges electrical connections other two. Stacks tiled horizontally parallel processor applications. modules 1/8" size cooled conduction cooling tower edges. Each stack contains following modules Four GFLOPS, MHz, R4430 modules containing microprocessor, megabyte secondary cache SRAM, assorted buffers circuitry aluminum-based substrate Four memory modules each containing Mbyte shared SRAM module direct memory access local shared memory input from sensor arrays, output external display systems. link controller modules rapid passing single cache lines neighboring stacks. modules each stack connected MHz, wide memory access(Z) capable passing Mbytes second word (256 bit) cache lines. Each cache line address, which upper bits used routing cache lines among stacks lower bits used addressing cache lines shared memory blocks anywhere multistack system. Each stack connected four pairs MHz, wide interstack links, which form end-around mesh intersections stacks processors. Figure shows proposed modules.
APPLICATION NOTE #101
Revised 6/96
FIGURE Multiprocessor Stacks
R4430 Module
Memory Module
Heat Sink
Heat Sink Base/Cold Plate
microprocessors linked innovative latency-hiding cache-update interfaces fast eager copying changes variables individual cache lines shared between processors. fast joins caches within each vertical stack interstack links. Four mesh parallel connections link neighboring stacks eagersharing remote memory accesses. planned custom ASICs will allow microsecond shorter delays cache lines sent after local write received most distant processors sharing values. Seitz' router chips gigabit interfaces also being considered interstack links. Write orders preserved across groups processors allow safe overhead synchronization using availability flags distributed with shared data. Fast Fourier Transforms (FFT) their inverses (IFFT) needed signal processing integrate X-Ray projections from multiple angles form 3-dimensional tomographic model. Preliminary simulations indicate that FFTs, fast cache-update (eagersharing) interfaces will allow nearly linear speedup roughly peak processor rates) ensembles from 2048 computer modules. This sharp contrast more traditional demand fetch mechanisms, which deliver improved performance ensembles more than processors. 256x256 calculation, eagersharing among processors times faster than demand fetch; 2048 processors, eagersharing gives results times faster. Figure compares speedups eagersharing demand fetch 2048 computers calculations
APPLICATION NOTE #101
Revised 6/96
FIGURE Network Power with 65536 Data Points
Network Power Speed-up 2048 1024 1024 2048 Eager Sharing Demand Fetch
Number CPUs
Other simulations show that semiconductor junction heat sink temperature rise held below 33°C with aluminum type substrate internal convective cooling. This substrate design provides cost assembly technology commercial applications. Processor (hot) memory modules (cold) alternated spread heat more uniformly. Volt power supply fast SRAM devices limits maximum power dissipation microprocessor module Watts maximum. This much less thanpreviously designed R4000 type MCMs. average power dissipated module will watts. Even with this reduced dissipation, 1200 watts will generated chassis under peak conditions efficient heat removal will required. anticipated that standard commercial liquid cooled cold plates from companies such R-Theta Buffalo N.Y. McLean Engineering N.J. will adequate task. simplified cross section heat transfer path shown figure FIGURE Module Cross section Alternating Processor Memory modules
Heat Sink
Heat Flow Aluminum Cover Aluminum Substrate
Heat Sink
modules
APPLICATION NOTE #101
Revised 6/96
Figure shows view chassis modules FIGURE Modules Chassis, View
Heat Sink
Conclusion
development parallel processor demonstration model will stimulate market insertion multichip modules following ways;
This processor will capable performing real time, high resolution tomography small physical
size, reduced cost. used prototype development commercial piece hardware medical, industrial scientific applications.
software hardware developed this application will scalable processors
will provide stimulation application multichip modules parallel processing problems.
Aeroflex will offer Processor MCM, Memory associated ASIC devices designed this
program standard product building blocks applications commercial industrial applications. anticipated that selling prices Processor will order $500 production. memory module ASICs will also attractively priced stimulate industrial scientific application.
Since Aeroflex considerable experience selling MCMs military market over years with
Standard Military Drawings custom circuits, anticipated that these MCMs converted military qualified designs offered standard products military systems.
APPLICATION NOTE #101
Revised 6/96
R4430 RISC processor high speed SRAMs this program will stimulate
application development "Known Good Die" these devices accelerate application RISC microprocessors SRAM military industrial MCMs. Figure
multiple sources (currently semiconductor vendors) R4430 will drive
price commercial cost levels proposed parallel processor.
cost ($10/ thin-film-polyimide-aluminium substrate production mode
will gain valuable experience application lower cost type substrate technology industrial applications.
Aeroflex will utilize Hewlett Packard 82000 testing phase modules. This high speed
tester software methodology scaled 200MHz clock rates advanced RISC processor memory modules. This will accelerate "Known Good Die" program products.
FIGURE Cofired Ceramic R4400 with 256K Secondary Cache
Comparison with Related Research This Area
Aeroflex-Stony Brook research substantial improvement current research this area. example, DARPA contract, J-FBI-91-280 placed with Microelectronics Computer Technology Corporation (MCC) development RISC processor modules commercially scalable parallel computing systems. paper presented 1993 International Conference MCMs Denver, April 14-16, 1993, Robert Smith Paul Hunter, entitled "MCMs Parallel Computers", (ICEMM Proceedings, 1993) describes program current state research. Aeroflex-Stony Brook approach offers following advantages:
volt microprocessor memory results maximum power dissipation module Watts average Watts. This factor three less than dissipation modules proposed paper.
reduced power supply current heat load Aeroflex-Stony Brook design allows more
compact design reduced size weight.
APPLICATION NOTE #101
Revised 6/96
compact single chassis design reduces wiring delays power dissipation driving excessive shunt cable wiring capacitances.
modular approach permits ease repair trouble shooting during operation during
development phase program.
thin-film-polyimide-aluminium substrate technology (available from vendors such
Technology Aeroflex Division) provides fast, thermal resistance substrate microprocessor with resulting lower temperature rise improved reliability. Other systems market take advantage "Eagersharing "technology developed Stony Brook University, with result that Aeroflex-Stony Brook system will utilize processors more effectively. Greater efficiency will reduce proposed system cost, size weight.
APPLICATION NOTE #101
Revised 6/96

APPLICATION NOTE #101 Proposal Cost X-Ray Tomography Using R4430

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