Very Fast, Complete 12-Bit Converters AD578/AD579 AD578/AD579
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FEATURES Complete 12-Bit Converter with Reference Clock Fast Conversion: Buried Zener Reference Long-Term Stability Gain ppm/ (AD578) ppm/ (AD579) Nonlinearity: 0.012% Missing Codes over Temperature Power: (AD578); (AD579) Available MIL-STD-883 Positive-True Parallel Serial Logic Outputs Short Cycle Capability Precision Reference External Applications Adjustable Internal Clock Models Supplies
Very Fast, Complete 12-Bit Converters AD578/AD579
AD578/AD579
-15V +15V ANALOG ZERO SPAN INPUT SPAN INPUT BIPOLAR OFFSET GAIN (REF SERIAL SERIAL CONVERT START CLOCK COMPARATOR CLOCK CLOCK CLOCK (AD578) (AD578)
SHORT CYCLE DIGITAL
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
AD578 AD579 high speed 12-bit 10-bit successive approximation analog-to-digital converters that include internal clock, reference, comparator. Their hybrid design utilizes digital linear conjunction with 12-bit 10-bit monolithic, monotonic provide superior performance versatility with size, price, reliability. Important performance characteristics AD578 include LSB12 linearity error maximum +25C, maximum gain tempco ppm/C, maximum conversion time typical power dissipation 10-bit AD579 provides ±1/2 LSB10 maximum linearity error maximum, typical Both AD578 AD579 include scaling resistors that provide analog input signal ranges Both contained 32-lead ceramic side-brazed packages, available with MIL-STD-883 Class processing. serial output function longer supported this product after date code 9623.
Both AD578 AD579 complete analog-to-digital converters. external components required perform conversion. fast conversion rates-3 AD578, AD579-make them ideal candidates high speed data acquisition systems requiring high throughput. internal buried Zener reference laser trimmed high initial accuracy available externally. Precision thin-film scaling resistors provide excellent thermal tracking. Short cycle external clock capabilities provided applications requiring faster conversion speeds and/or lower resolution.
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Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. license granted implication otherwise under patent patent rights Analog Devices. Trademarks registered trademarks property their respective companies.
Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 2003 Analog Devices, Inc. rights reserved.
CONVERTER
AD578/AD579-SPECIFICATIONS (Typical
Parameter RESOLUTION ANALOG INPUTS Voltage Ranges Bipolar Unipolar Input Impedance DIGITAL INPUTS Convert Command1 Clock Input TRANSFER CHARACTERISTICS Gain Error2, Unipolar Offset3 Bipolar Error3, Linearity Error, TMIN TMAX DIFFERENTIAL LINEARITY ERROR (Minimum resolution which missing codes guaranteed) TMIN TMAX POWER SUPPLY SENSITIVITY TEMPERATURE COEFFICIENTS Gain Unipolar Offset Bipolar Offset Differential Linearity CONVERSION TIME5, (max) PARALLEL OUTPUTS Unipolar Code Bipolar Code Output Drive SERIAL OUTPUTS (NRZ FORMAT) Unipolar Code Bipolar Code Output Drive CONVERSION (EOC) Output Drive INTERNAL CLOCK7 Output Drive INTERNAL REFERENCE Voltage Drift External Current POWER SUPPLY REQUIREMENTS8 Range Rated Accuracy Supply Current Power Dissipation TEMPERATURE RANGE Operating Storage
page notes.
unless otherwise noted.)
AD578L Bits
AD578J Bits
AD578K Bits
LSTTL Load LSTTL Load 0.1% FSR, 0.25% 0.1% FSR, 0.25% 0.1% FSR, 0.25%
LSTTL Load LSTTL Load 0.1% FSR, 0.25% 0.1% FSR, 0.25% 0.1% FSR, 0.25%
LSTTL Load LSTTL Load 0.1% FSR, 0.25% 0.1% FSR, 0.25% 0.1% FSR, 0.25%
Bits Bits 0.005%/%DVS 0.005%/%DVS 0.005%/%DVS ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C Binary Offset Binary/Twos Complement LSTTL Loads Binary/Complementary Binary Offset Binary/Comp. Offset Binary LSTTL Loads Logic During Conversion LSTTL Loads LSTTL Loads 10.000 ppm/C, ppm/C 4.75 5.25 13.5 16.5 typ, typ, typ, +70C -65C +150C
Bits Bits 0.005%/%DVS 0.005%/%DVS 0.005%/%DVS ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C
Bits Bits 0.005%/%DVS 0.005%/%DVS 0.005%/%DVS ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C
Binary Binary Offset Binary/Twos Complement Offset Binary/Twos Complement LSTTL Loads LSTTL Loads Binary/Complementary Binary Offset Binary/Comp. Offset Binary LSTTL Loads Logic During Conversion LSTTL Loads LSTTL Loads 10.000 ppm/C, ppm/C 4.75 5.25 13.5 16.5 typ, typ, typ, +70C -65C +150C Binary/Complementary Binary Offset Binary/Comp. Offset Binary LSTTL Loads Logic During Conversion LSTTL Loads LSTTL Loads 10.000 ppm/C, ppm/C 4.75 5.25 13.5 16.5 typ, typ, typ, +70C -65C +150C
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AD578/AD579
Parameter RESOLUTION ANALOG INPUTS Voltage Ranges Bipolar Unipolar Input Impedance DIGITAL INPUTS Convert Command1 Clock Input TRANSFER CHARACTERISTICS Gain Error2, Unipolar Offset3 Bipolar Error3, Linearity Error, TMIN TMAX DIFFERENTIAL LINEARITY ERROR (Minimum resolution which missing codes guaranteed) TMIN TMAX POWER SUPPLY SENSITIVITY TEMPERATURE COEFFICIENTS Gain Unipolar Offset Bipolar Offset Differential Linearity CONVERSION TIME5, (max) PARALLEL OUTPUTS Unipolar Code Bipolar Code Output Drive SERIAL OUTPUTS (NRZ FORMAT) Unipolar Code Bipolar Code Output Drive CONVERSION (EOC) Output Drive INTERNAL CLOCK7 Output Drive INTERNAL REFERENCE Voltage Drift External Current POWER SUPPLY REQUIREMENTS8 Range Rated Accuracy Supply Current Power Dissipation TEMPERATURE RANGE Operating Storage AD578SD Bits
AD578TD Bits
LSTTL Load LSTTL Load 0.1% FSR, 0.25% 0.1% FSR, 0.25% 0.1% FSR, 0.25%
LSTTL Load LSTTL Load 0.1% FSR, 0.25% 0.1% FSR, 0.25% 0.1% FSR, 0.25%
Bits Bits
Bits Bits 0.005%/%DVS 0.005%/%DVS 0.005%/%DVS ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C Binary Offset Binary/Twos Complement LSTTL Loads Binary/Complementary Binary Offset Binary/Comp. Offset Binary LSTTL Loads Logic During Conversion LSTTL Loads LSTTL Loads 10.000 ppm/C, ppm/C 4.75 5.25 13.5 16.5 typ, typ, typ,
0.005%/%DVS 0.005%/%DVS 0.005%/%DVS ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C Binary Offset Binary/Twos Complement LSTTL Loads Binary/Complementary Binary Offset Binary/Comp. Offset Binary LSTTL Loads Logic During Conversion LSTTL Loads LSTTL Loads 10.000 ppm/C, ppm/C 4.75 5.25 13.5 16.5 typ, typ, typ, -55C +125C -65C +150C
-55C +125C -65C +150C
NOTES Positive pulse wide (min) leading edge resets outputs. Trailing edge initiates conversion. With fixed resistor place gain adjust potentiometer. Adjustable With resistor between Bipolar Offset (Pins 26). Conversion time defined time between falling edge convert start falling edge EOC. Each grade specified conversion speed shown. Externally adjustable resistor capacitor (see Figure models, order AD578ZJ, AD578ZK, AD578ZL 11.6 16.5 Available MIL-STD-883, Level Military Products Databook detailed specifications. Specifications subject change without notice.
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AD578/AD579
Parameter RESOLUTION ANALOG INPUTS Voltage Ranges Bipolar Unipolar Input Impedance DIGITAL INPUTS Convert Command1 Clock Input TRANSFER CHARACTERISTICS Gain Error2, Unipolar Offset3 Bipolar Error3, Linearity Error, TMIN TMAX DIFFERENTIAL LINEARITY ERROR (Minimum resolution which missing codes guaranteed) TMIN TMAX POWER SUPPLY SENSITIVITY Versions TEMPERATURE COEFFICIENTS Gain Unipolar Offset Bipolar Offset Differential Linearity CONVERSION TIME5, (max) TMIN TMAX PARALLEL OUTPUTS Unipolar Code Bipolar Code Output Drive SERIAL OUTPUTS (NRZ FORMAT) Unipolar Code Bipolar Code Output Drive CONVERSION (EOC) Output Drive INTERNAL CLOCK7 Output Drive INTERNAL REFERENCE Voltage Temperature Coefficient External Current POWER SUPPLY REQUIREMENTS Range Rated Accuracy Models8 Supply Current Power Dissipation TEMPERATURE RANGE Operating Storage AD579JN Bits 20%) 20%) LSTTL Load LSTTL Load 0.1% FSR, 0.25% 0.1% FSR, 0.25% 0.1% FSR, 0.25% AD579KN Bits 20%) 20%) LSTTL Load LSTTL Load 0.1% FSR, 0.25% 0.1% FSR, 0.25% 0.1% FSR, 0.25%
Bits Bits 0.005%/%DVS 0.005%/%DVS 0.001%/%DVS 0.007%/%DVS 0.007%/%DVS ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C Binary Offset Binary/Twos Complement LSTTL Loads Binary/Complementary Binary Offset Binary/Comp. Offset Binary LSTTL Loads Logic During Conversion LSTTL Loads LSTTL Loads 10.000 ppm/C 4.75 5.25 13.5 16.5 4.75 5.25 11.4 16.5 typ, typ, typ, +70C -65C +150C
Bits Bits 0.005%/%DVS 0.005%/%DVS 0.001%/%DVS 0.007%/%DVS 0.007%/%DVS ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C Binary Offset Binary/Twos Complement LSTTL Loads Binary/Complementary Binary Offset Binary/Comp. Offset Binary LSTTL Loads Logic During Conversion LSTTL Loads LSTTL Loads 10.000 ppm/C 4.75 5.25 13.5 16.5 4.75 5.25 11.4 16.5 typ, typ, typ, +70C -65C +150C
NOTES Positive pulse wide (min) leading edge resets outputs. Trailing edge initiates conversion. With fixed resistor place gain adjust potentiometer. Adjustable zero. With resistor between Bipolar Offset (Pins 26). Conversion time defined time between falling edge convert start falling edge EOC. (Continued page
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AD578/AD579
Parameter RESOLUTION ANALOG INPUTS Voltage Ranges Bipolar Unipolar Input Impedance DIGITAL INPUTS Convert Command1 Clock Input TRANSFER CHARACTERISTICS Gain Error2, Unipolar Offset3 Bipolar Error3, Linearity Error, TMIN TMAX DIFFERENTIAL LINEARITY ERROR (Minimum resolution which missing codes guaranteed) TMIN TMAX POWER SUPPLY SENSITIVITY Versions TEMPERATURE COEFFICIENTS Gain Unipolar Offset Bipolar Offset Differential Linearity CONVERSION TIME5, (max) TMIN TMAX PARALLEL OUTPUTS Unipolar Code Bipolar Code Output Drive SERIAL OUTPUTS (NRZ FORMAT) Unipolar Code Bipolar Code Output Drive CONVERSION (EOC) Output Drive INTERNAL CLOCK7 Output Drive INTERNAL REFERENCE Voltage Temperature Coefficient External Current POWER SUPPLY REQUIREMENTS Range Rated Accuracy Models8 Supply Current Power Dissipation TEMPERATURE RANGE Operating Storage AD579TD9 Bits 20%) 20%) LSTTL Load LSTTL Load 0.1% FSR, 0.25% 0.1% FSR, 0.25% 0.1% FSR, 0.25%
Bits Bits 0.005%/%DVS 0.005%/%DVS 0.001%/%DVS 0.007%/%DVS 0.007%/%DVS ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C ppm/C Binary Offset Binary/Twos Complement LSTTL Loads Binary/Complementary Binary Offset Binary/Comp. Offset Binary LSTTL Loads Logic During Conversion LSTTL Loads LSTTL Loads 10.000 ppm/C 4.75 5.25 13.5 16.5 4.75 5.25 11.4 16.5 typ, typ, typ, -55C +125C -65C +150C
NOTES (continued) Each grade specified conversion speed shown. Externally adjustable resistor capacitor. Figure appropriate connections. models, order AD579ZJN, AD579ZKN, AD579ZTD. Available MIL-STD-883, Level Military Products Databook detailed specifications. Specifications subject change without notice.
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AD578/AD579
ORDERING GUIDE1
Model AD578JN (JD) AD578KN (KD) AD578LN (LD) AD578SD AD578TD AD578SD/883B AD578TD/883B AD579JN AD579KN AD579TD AD579TD/883B
Resolution Bits Bits Bits Bits Bits Bits Bits Bits Bits Bits Bits
Conversion Speed
Temperature Range +70C +70C +70C -55C +125C -55C +125C -55C +125C -55C +125C +70C +70C -55C +125C -55C +125C
Package Option2 DH-32B DH-32B DH-32B DH-32B DH-32B DH-32B DH-32B DH-32B DH-32B DH-32B DH-32B
NOTES operation Version, order AD578ZTD. Side Brazed Ceramic DIP.
THEORY OPERATION
200ns, CONVERT START 200ns CLOCK 160ns 100ns 10ns
AD578 complete pretrimmed 12-bit converter that requires external components provide successive approximation analog-to-digital conversion function. block diagram AD578/AD579 shown Figure
AD578/AD579
-15V +15V
CONVERTER
80ns
(AD578) (AD578)
SERIAL
ANALOG ZERO SPAN INPUT SPAN INPUT
BIPOLAR OFFSET GAIN (REF SERIAL SERIAL CONVERT START
SHORT CYCLE DIGITAL COMPARATOR CLOCK
CLOCK CLOCK CLOCK
Figure AD578/AD579 Functional Block Diagram Pinout
When control section commanded initiate conversion, enables clock resets successive approximation register (SAR). SAR, timed clock, sequences through conversion cycle returns end-of-convert flag control section. control section disables clock brings output status flag low. data bits valid falling edge clock pulse starting with ending with (Figures 2b), accurately represent input signal within LSB.
CLOCK INTERNAL: CONNECT CLOCK (18) CLOCK (19) EXTERNAL: CONNECT EXTERNAL CLOCK CLOCK (19) CLOCK SHOULD LEAST DUTY CYCLE WITH MINIMUM PERIOD, TMIN 100ns. NOTE RISING EDGE CONVERT START PULSE RESETS ZERO, LSBs ONE. TRAILING EDGE INITIATES CONVERSION.
Figure AD578 Timing Diagram
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AD578/AD579
200ns, CONVERT START 125ns GATED CLOCK (MSB) CONVERSION TIME 70ns 100ns ~15ns
UNIPOLAR CALIBRATION
100ns 25ns 75ns
CONVERSION PROGRESS PARALLEL DATA VALID
AD578/AD579 intended have nominal offset that exact analog input given code will middle that code (halfway between transitions codes above below it). Thus, when properly calibrated, first transition (from 0000 0000 0000 0000 0000 0001) will occur input level +1/2 LSB. connected unit will behave this manner, within specifications. Refer Table Table Figure further clarification. offset trim (R1) used, should trimmed above, although different offset particular system requirement. This circuit will give approximately offset trim range. full-scale trim done applying signal below nominal full scale. Trim give last transition (1111 1111 1110 1111 1111 11111).
+15V
ZERO
SERIAL
-15V +20V
BITS 1-12 (AD578) BITS 1-10 (AD579) ANALOG INPUTS +10V
CLOCK INTERNAL: CONNECT CLOCK (18) CLOCK (19) EXTERNAL: CONNECT EXTERNAL CLOCK CLOCK (19) CLOCK SHOULD LEAST DUTY CYCLE WITH MINIMUM PERIOD, TMIN 100ns.
AD578/AD579
Figure AD579 Timing Diagram
temperature-compensated buried Zener reference provides primary voltage reference guarantees excellent stability with both time temperature. reference trimmed 1.0%; buffered supply external load addition current required drive reference input resistor (0.5 bipolar offset resistor mA). thin-film application resistors trimmed match full-scale output current DAC. input scaling resistors allow either span. bipolar offset resistor grounded unipolar operation connected reference bipolar operation.
Figure Unipolar Input Connections
Table AD578 Digital Output Codes Analog Input Unipolar Bipolar Ranges
Analog Input-Volts (Center Quantization Interval) Range +9.9976 +9.9952 +5.0024 +5.0000 +0.0024 +0.0000 REV. Range +19.9951 +19.9902 +10.0049 +10.0000 +0.0051 +0.0000 Range +4.9976 +4.9952 +0.0024 +0.0000 -4.9976 -5.0000 Range +9.9951 +9.9902 +0.0049 +0.0000 -9.9951 -10.0000
Digital Output Code (Binary Unipolar Ranges; Offset Binary Bipolar Ranges) (MSB) (LSB)
AD578/AD579
Table AD579 Digital Output Codes Analog Input Unipolar Bipolar Ranges
Analog Input-Volts (Center Quantization Interval) Range +9.9902 +9.9804 +5.0097 +5.0000 +0.0097 +0.0000 Range +19.9804 +19.9609 +10.0195 +10.0000 +0.0195 +0.0000 Range +4.9902 +4.9804 +0.0097 +0.0000 -4.9902 -5.0000 Range +9.9804 +9.9609 +0.0195 +0.0000 -9.9804 -10.0000
Digital Output Code (Binary Unipolar Ranges; Offset Binary Bipolar Ranges) (MSB) (LSB)
BIPOLAR OPERATION
LAYOUT CONSIDERATIONS
connections bipolar ranges shown Figure Again, unipolar ranges, offset gain specifications sufficient, trimmer shown replaced fixed resistor. analog input applied unipolar ranges. Bipolar calibration similar unipolar calibration. First, signal above negative full scale applied, trimmed give first transition (0000 0000 0000 0000 0000 0001). signal below positive full scale applied trimmed give last transition (1111 1111 1110 1111 1111 1111).
ZERO
BITS 1-12 (AD578) BITS 1-10 (AD579) ANALOG INPUTS
Many data acquisition components have more ground pins that connected together within device. These grounds usually referred Logic Power Return, Analog Common (Analog Power Return), Analog Signal Ground. These grounds must tied together point, usually system power supply ground. Ideally, single solid ground would desirable. However, since current flows through ground wires etch stripes circuit cards, since these paths have resistance inductance, hundreds millivolts generated between system ground point ground AD578 AD579. Separate ground returns should provided minimize current flow path from sensitive points system ground point. this supply currents logic-gate return currents summed into same return path analog signals, where they would cause measurement errors.
-15V +15V ANALOG COMMON
AD578/AD579
Figure Basic Bypassing Practice
Figure Bipolar Input Connections
Each AD578 AD579 supply terminals should capacitively decoupled close possible. large value capacitor such parallel with capacitor usually sufficient. Analog supplies bypassed Analog Power Return logic supply bypassed Digital pin. minimize noise, reference output (Pin should decoupled capacitor
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AD578/AD579
internal clock preset nominal conversion time (AD578) (AD579). adjusted either faster slower conversion rates. faster conversions, connect appropriate resistor between Pins short Figures slower conversions (AD578 only), connect capacitor between Pins Note that Missing Code operation guaranteed when operating this mode particular grade's conversion speed specification exceeded.
CLOCK RATE CONTROL
GRADE GRADES
CONVERSION RATE
CONVERSION RATE
Figure AD579 Clock Rate Control Connection
CONVERSION RATE GRADE
CONVERSION RATE GRADES
CONVERSION RATE GRADES 3.32 SLOW CONVERSION, FROM FIGURE
Short Cycle Input-A short cycle input, permits timing cycle terminated after number desired bits been converted, allowing shorter conversion times applications requiring full 10-bit (AD579) 12-bit (AD578) resolution. Short cycle connections associated conversion times summarized Tables
Table III. AD578 Short Cycle Connections
Resolution (Bits) Connect Conversion Speed (ms)
Figure AD578 Clock Rate Control Connection
CAPACITANCE 1000 13.0
Table AD579 Short Cycle Connections
Resolution (Bits)
CAPACITOR
10.0
CONVERSION TIME
Connect Conversion Speed (ms)
RESISTOR RESISTANCE
External Clock-An external clock connected directly clock input, When operating this mode, convert start should held high minimum clock period order reset synchronize conversion cycle. positive-going pulsewidth will provide continuous string conversions that start first rising edge external clock after output gone low. External Buffer Amplifier-In applications where AD578 AD579 driven from high impedance sources directly from analog multiplexer, fast slewing, wideband like AD711 should used. Figure
Figure AD578 Conversion Times Values
+15V -15V AD711 ANALOG INPUT 0V-10V
AD7506
DATA BITS 1-12
AD578 AD579
Figure Input Buffer
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AD578/AD579
OUTLINE DIMENSIONS
32-Lead Side Brazed Ceramic [SBDIP] (DH-32B)
Dimensions shown inches (millimeters)
1.615 (41.02)
0.910 (23.11) 0.870 (22.10)
0.280 (7.11)
0.060 (1.52) 0.040 (1.02)
0.830 (21.08) 0.823 (20.90)
0.120 (3.05)
0.020 (0.51) 0.016 (0.41)
0.100 (2.54)
0.055 (1.40) 0.035 (0.89)
0.180 (4.57)
0.930 (23.62) 0.890 (22.61)
0.012 (0.30) 0.009 (0.23)
CONTROLLING DIMENSIONS INCHES; MILLIMETER DIMENSIONS PARENTHESES) ROUNDED-OFF INCH EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN
-10-
REV.
AD578/AD579 Revision History
Location 3/03-Data Sheet changed from REV. REV. Added text GENERAL DESCRIPTION Reformatted SPECIFICATIONS Renumbered Figures Updated OUTLINE DIMENSIONS Page
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-11-
-12-
C00524-0-3/03(B)
PRINTED U.S.A.
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