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(NEASCOT-T20TM) 6-PORT APHY Document S14838EJ1V0IFJ1 (1st ed


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µPD98408
(NEASCOT-T20TM)
6-PORT APHY
Document S14838EJ1V0IFJ1 (1st edition) Date Published November 2000 CP(K)
Printed Japan
2000
[MEMO]
Information S14838EJ1V0IF00
SUMMARY CONTENTS
CHAPTER FUNCTIONS OPERATIONS CHAPTER ELECTRIC CHARACTERISTICS. CHAPTER APPLICATION CIRCUITS. CHAPTER OTHERS
Information S14838EJ1V0IF00
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
Information S14838EJ1V0IF00
NEASCOT-T20 trademark Corporation.
information this document current May, 2000. information subject change without notice. actual design-in, refer latest publications NEC's data sheets data books, etc., most up-to-date specifications semiconductor products. products and/or types available every country. Please check with sales representative availability additional information. part this document copied reproduced form means without prior written consent NEC. assumes responsibility errors that appear this document. does assume liability infringement patents, copyrights other intellectual property rights third parties arising from semiconductor products listed this document other liability arising from such products. license, express, implied otherwise, granted under patents, copyrights other intellectual property rights others. Descriptions circuits, software other related information this document provided illustrative purposes semiconductor product operation application examples. incorporation these circuits, software information design customer's equipment shall done under full responsibility customer. assumes responsibility losses incurred customers third parties arising from these circuits, software information. While endeavours enhance quality, reliability safety semiconductor products, customers agree acknowledge that possibility defects thereof cannot eliminated entirely. minimize risks damage property injury (including death) persons arising from defects semiconductor products, customers must incorporate sufficient safety measures their design, such redundancy, fire-containment, anti-failure features. semiconductor products classified into following three quality grades: "Standard", "Special" "Specific". "Specific" quality grade applies only semiconductor products developed based customer-designated "quality assurance program" specific application. recommended applications semiconductor product depend quality grade, indicated below. Customers must check quality grade each semiconductor product before using particular application. "Standard": Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade semiconductor products "Standard" unless otherwise expressly specified NEC's data sheets data books, etc. customers wish semiconductor products applications intended NEC, they must contact sales representative advance determine NEC's willingness support given application. (Note) "NEC" used this statement means Corporation also includes majority-owned subsidiaries. "NEC semiconductor products" means semiconductor product developed manufactured defined above).
Information S14838EJ1V0IF00
[MEMO]
Information S14838EJ1V0IF00
INTRODUCTION
Target Readers
This manual intended engineers wish understand functions
µPD98408 when designing application systems.
Purpose This manual aims answer those questions frequently asked users this product been prepared reference users ever they need clarification certain points. Read This Manual Refer table contents locate topic which require explanation. Readers this manual required have basic understanding electricity, logic circuits, microcontrollers. When performing design, latest version user's manual (abbreviated hereafter) and/or data sheet (abbreviated hereafter). Related Documents Data sheet: S12313E
User's manual: S11409E Conventions Data significance: Active low: Numeric notation: Higher digits left, lower digits right XXX_B following signal name) Binary XXXX XXXXB Decimal XXXX Hexadecimal. XXXXh
Memory address: Lower addresses top, higher addresses bottom
Information S14838EJ1V0IF00
[MEMO]
Information S14838EJ1V0IF00
CONTENTS
CHAPTER FUNCTIONS OPERATIONS
µPD98408 six-port circuit UTP/STP interface. only four ports used, should pins unused ports handled? occurs power application. this normal? Does µPD98408 output random data circuit even idle status (when there command valid transmit data send)?.11 long does take µPD98408 actually output command circuit after pulse signal input transmit command? When command transmitted circuit after power (reset)?.12 data transmitted circuit during-loop back execution data converted into 4B5B? possible specify whether received idle/unassigned cell discarded inside µPD98408?.13 does µPD98408 operate receives short cell less than bytes from circuit?.13 Does µPD98408 automatically reset FIFO discard cells from internal transmit/receive FIFO FIFO overflows?.14 Q.10 transmit FIFO depth three cells. many cells this FIFO cause µPD98408 start transmitting data circuit side?.14
CHAPTER ELECTRIC CHARACTERISTICS
Q.11 ambient operating temperature (TA) range -40°C +85°C supported? Q.12 Isn't logic RW_B signal reversed timing chart interface write operation (BUSMODE Electric Characteristics second edition Data Sheet?.16 Q.13 long DATA determination time (vs. RD_B)?
CHAPTER APPLICATION CIRCUITS
Q.14 recommend transformer module that connected µPD98408?.18 Q.15 Could provide board layout example?
CHAPTER OTHERS
Q.16 BSDL (Boundary Scan Description Language) file available?.23
Information S14838EJ1V0IF00
[MEMO]
Information S14838EJ1V0IF00
CHAPTER FUNCTIONS OPERATIONS
µPD98408 six-port circuit UTP/STP interface. only four ports used, should pins unused ports handled?
Handle unused port pins follows: Receive pins (RDIP0 RDIN0 Pull resistor Send pins (TDOP0 TDON0 Leave open AVDD Connect plane board AGND Connect plane board unused pins standby mode (PMDSTB using standby register (PMDSTBY). Reference: RECOMMENDED CONNECTION UNUSED PINS,
occurs power application. this normal?
Yes. occurs circuits µPD98408 immediately after power applied (reset), takes least clear LOS. Read occurrence information register (LOSERR) after connecting circuit confirm that µPD98408 recovered from (LSn Then, unmask interrupt that occurred result LOS. Reference: Note 3.7.1 (Loss Signal) Detection Function,
Does µPD98408 output random data circuit even idle status (when there command valid transmit data send)?
µPD98408 outputs random data circuit, even idle status. This because µPD98408 scrambled even idle status transmits dummy data, encoded into 4B5B blocks, other station. This dummy data prevents other station from entering (Loss Signal) status. Reference: 3.1.3 Clock Data Recovery,
Information S14838EJ1V0IF00
CHAPTER FUNCTIONS OPERATIONS
long does take µPD98408 actually output command circuit after pulse signal input transmit command?
command output circuit about clocks (32-MHz system clock: TCLOCK) after pulse signal input pin. Reference: COMMAND CODE TRANSMIT/RECEIVE FUNCTION,
When command transmitted circuit after power (reset)?
After power (reset), µPD98408 transmits command other station beginning valid cell data that transmitted first. (The command inserted beginning valid cell detect boundary cell. also directs resetting descrambler other station.) Prior that point, command transmitted. other station always detects 4B5B code error, therefore, descrambler other station reset after power µPD98408 before reception command that prefixed first valid cell data. Consequently, 4B5B code error symbol error) occur. µPD98408 does always detect 4B5B code error. detects only 4B5B code errors that occur valid cell data, ignores 4B5B error that occurs data other than valid cell data. Even descrambler reset after power (reset), therefore, 4B5B code error does occur. After power (reset) before transmission first valid cell
4B5B scramble data
Other station
µPD98408
When first valid cell transmitted
4B5B scramble data Valid cell
Other station
µPD98408
Reference: 3.2.3 Command-Byte Insertion Detection,
Information S14838EJ1V0IF00
CHAPTER FUNCTIONS OPERATIONS
data transmitted circuit during-loop back execution data converted into 4B5B?
data transmitted circuit during execution loop-back Alayer loop-back selected using LBSEL1 LBSEL0 bits command register (CMR). Whether 4B5B conversion performed differs depending this selection. Normal cell data (LBSEL1 LBSEL0 010101. (LBSEL1 LBESEL0 (LBSEL1 LBSEL0 Reference: LOOP-BACK MODE, Transmits 4B5B-converted data. Transmits non-4B5B-converted data. Transmits non-4B5B-converted data.
possible specify whether received idle/unassigned cell discarded inside PPD98408?
Yes, possible. following three modes selected using Idle cell discarding condition setting register (DMODE2). Mode Cells discarded don't care. Mode Cells discarded don't care. Mode Idle/unassigned cells discarded. Reference: 3.2.7 Idle/Unassigned Cell Detection,
does PPD98408 operate receives short cell less than bytes from circuit?
discard cell counter register (DCCOU) does count received short cell discarded within PPD98408 output UTOPIA interface. Reference: 4.2.5 Discarded Cell Counter (DCCOU: Default 00H),
Information S14838EJ1V0IF00
CHAPTER FUNCTIONS OPERATIONS
Does µPD98408 automatically reset FIFO discard cells from internal transmit/receive FIFO FIFO overflows?
µPD98408 does automatically reset FIFO. forcibly discard cells from transmit/receive FIFO, necessary reset LSI. cells cannot forcibly discarded disabling addresses with address register (PHYADD). Unless reset, garbage cell remaining transmit/receive FIFO output external device. Reference: 3.7.3 Transmit FIFO/Receive FIFO Overflow Detection Function 4.2.11 FIFO Overflow Registers (FIFOOVT/FIFOOVR: Default 00H),
Q.10
transmit FIFO depth three cells. many cells this FIFO cause µPD98408 start transmitting data circuit side?
A.10
cell. µPD98408 starts transmitting data circuit side after completely read cell from UTOPIA interface. Reference: 3.3.3 FIFO Block,
Information S14838EJ1V0IF00
CHAPTER ELECTRIC CHARACTERISTICS
Q.11
ambient operating temperature (TA) range -40°C +85°C supported?
A.11
Yes. ambient operating temperature range µPD98408's recommended operating conditions -40°C +85°C. Reference: Recommended Operating Conditions ELECTRIC CHARACTERISTICS,
Information S14838EJ1V0IF00
CHAPTER ELECTRIC CHARACTERISTICS
Q.12
Isn't logic RW_B signal reversed timing chart interface write operation (BUSMODE Electric Characteristics second edition Data Sheet?
A.12
Yes, logic reversed. interface write operation (BUSMODE
Correct
ADDR0 ADDR5 t2-1 SEL_B t2-4 DATA0 DATA7 t2-2 DS_B t2-7 RW_B t2-6 DTACK_B t2-3 t2-5
Incorrect
ADDR0 ADDR5 t2-1 SEL_B t2-4 DATA0 DATA7 t2-2 DS_B t2-7 RW_B t2-6 DTACK_B t2-3 t2-5
Reference: Write operation (when BUSMODE Interface ELECTRIC CHARACTERISTICS,
Information S14838EJ1V0IF00
CHAPTER ELECTRIC CHARACTERISTICS
Q.13
long DATA determination time (vs. RD_B)?
A.13
DATA determination time (vs. RD_B) MAX. (TCLOCK MHz). However, this value cannot guaranteed because calculated, rather than actually measured. maximum value from RD_B RDY_B 31.25 that equal cycle TCLOCK. time required data determined after RDY_B MAX., according Electric Characteristics Data Sheet. Therefore, DATA determination time (vs. RD_B) calculated 31.25 41.25 Interface Read Operation (BUSMODE
ADDR0 ADDR5 t2-10 t2-14
SEL_B t2-11 DATA0 DATA7 t2-13 t2-12 RD_B t2-16 t2-17
WR_B t2-15 RDY_B
MAX. 31.25 MAX.
Reference: Read operation (when BUSMODE Interface ELECTRIC CHARACTERISTICS,
Information S14838EJ1V0IF00
CHAPTER APPLICATION CIRCUITS
Q.14
recommend transformer module that connected µPD98408?
A.14
modules recommended: Pulse PE-67588 TLA-6M102. Examples these units connection shown below. Example connecting PE-67588
µPD98408
TDOP0
PE-67588 REC- CHSGND REC+
45.3
45.3
TDON0 RDIP0
±10%
RDIN0
Information S14838EJ1V0IF00
CHAPTER APPLICATION CIRCUITS
Example connecting TLA-6M102
µPD98408
TDOP0
TLA-6M102 REC+ REC-
TDON0 RDIP0
RDIN0
Reference: CHAPTER EXAMPLE APPLICATION,
Information S14838EJ1V0IF00
CHAPTER APPLICATION CIRCUITS
Q.15
Could provide board layout example?
A.15
follows: Ground (GND) plane
RJ-45
Magnetics
µPD98408
plane
Remarks Connect AGND DGND common plane. This plane should wide possible. locate plane half area RJ-45 connector connector Magnetics.
Information S14838EJ1V0IF00
CHAPTER APPLICATION CIRCUITS
Power (VDD) plane
RJ-45
Magnetics
µPD98408
plane
Remarks Connect AVDD DVDD common plane. This plane should wide possible. locate plane half area RJ-45 connector connector Magnetics.
Information S14838EJ1V0IF00
CHAPTER APPLICATION CIRCUITS
Circuit side layout (with cable PE-67588)
RJ-45
RJ-45
PE-67588 Magnetics
PE-67588 Magnetics
Resistor Resistor
Resistor
Resistor
197196
µPD98408 NEASCOT-T20
Remarks Keep wiring between RJ-45 connector Magnetics short possible. Keep wiring between Magnetics µPD98408 short possible. lines that strong thick possible lines Magnetics. signals between Magnetics µPD98408 very sensitive susceptible signal lines nearby. therefore recommended that pair signal lines separated from other pair signal lines pattern. Reference: BOARD LAYOUT,
Information S14838EJ1V0IF00
CHAPTER OTHERS
Q.16
BSDL (Boundary Scan Description Language) file available?
A.16
Yes, BSDL file µPD98408 available request. details, contact Semiconductor Technical Hotline, given this document. Reference: CHAPTER JTAG BOUNDARY SCAN,
Information S14838EJ1V0IF00
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Information S14838EJ1V0IF00
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