TYPE W50N10 DS(on) 0.035 TYPICAL RDS(on) 0.027 AVALANCHE RUG
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STW50N10
TYPE W50N10
DS(on) 0.035
TYPICAL RDS(on) 0.027 AVALANCHE RUGGED TECHNOLOGY 100% AVALANCHE TESTED REPETITIVE AVALANCHE DATA 100oC HIGH CURRENT CAPABILITY 175oC OPERATING TEMPERATURE APPLICATION ORIENTED CHARACTERIZATION TO-247
APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING POWER MOTOR CONTROL DC-DC DC-AC CONVERTERS SYNCRONOUS RECTIFICATION
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol VDGR Parameter Drain-source Voltage Drain- gate Voltage Gate-source Voltage Drain Current (continuous) Drain Current (continuous) Drain Current (pulsed) Total Dissipation Derating Factor orage Temperature Max. Operating Junction Temperature
Value
Pulse width limited safe operating area
di/dt A/µs, V(BR)DSS, TJMAX
January 1998
STW50N10
THERMAL DATA
hj-ca thc- Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-sink Maximum Lead Temperature Soldering Purpose 0.83
AVALANCHE CHARACTERISTICS
Symb Parameter Avalanche Current, Repetitive Not-Repetitive (pulse width limited max, Single Pulse Avalanche Energy (starting Valu Unit
ELECTRICAL CHARACTERISTICS (Tcase unless otherwise specified)
Symb (BR)DSS Parameter Drain-source Breakdown Voltage Test Cond ition Min. Max.
Zero Voltage Rating Drain Current (VGS Rating Gate-body Leakage Current
Symb GS(th) ID(o Parameter Gate Threshold Voltage Test Cond ition Min. 0.027 Max. 0.035
Static Drain-source Resistance
State Drain Current D(on) DS(on)
DYNAMIC
Symb Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse ransfer Capacitance Test Cond ition D(on) DS(on) Min. 4100 5200 Max.
STW50N10
ELECTRICAL CHARACTERISTICS (continued) SWITCHING
Symb d(on) Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Cond ition Min. Max.
SWITCHING
Symb r(Vof Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Cond ition Min. Max.
SOURCE DRAIN DIODE
Symb Parameter Source-drain Current Source-drain Current (pulsed) Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt A/µs Test Cond ition Min. Max.
Pulsed: Pulse duration duty cycle Pulse width limited safe operating area di/dt A/µs, V(BR)DSS, TJMAX
Safe Operating Area
Thermal Impedance
STW50N10
Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source Resistance
Gate Charge Gate-source Voltage
Capacitance Variations
STW50N10
Normalized Gate Threshold Voltage Temperature Normalized Resistance Temperature
Source-drain Diode Forward Characteristics
STW50N10
Fig. Unclamped Inductive Load Test Circuit Fig. Unclamped Inductive Waveform
Fig. Switching Times Test Circuits Resistive Load
Fig. Gate Charge test Circuit
Fig. Test Circuit Inductive Load Switching Diode Recovery Times
STW50N10
TO-247 MECHANICAL DATA
MIN. 3.55 15.3 19.7 14.2 34.6 3.65 0.079 0.140 10.9 15.9 20.3 14.8 0.602 0.776 0.559 0.413 1.362 0.217 0.118 0.144 TYP. MAX. MIN. 0.185 0.087 0.016 0.039 0.079 0.118 0.429 0.626 0.779 0.582 inch TYP. MAX. 0.209 0.102 0.031 0.055 0.094 0.134
DIM.
P025P
STW50N10
Information furnished believed accurate reliable. However, SGS-THOMSON Microelectronics assumes responsability consequences such information infringement patents other rights third parties which results from use. license granted implication otherwise under patent patent rights SGS-THOMSON Microelectronics. Specifications mentioned this publication subject change without notice. This publication supersedes replaces information previously supplied. SGS-THOMSON Microelectronics products authorized critical components life support devices systems without express written approval SGS-THOMSON Microelectonics. 1998 SGS-THOMSON Microelectronics Printed Italy Rights Reserved SGS-THOMSON Microelectronics GROUP COMPANIES Australia Brazil Canada China France Germany Italy Japan Korea Malaysia Malta Morocco Netherlands Singapore Spain Sweden Switzerland Taiwan Thailand United Kingdom U.S.A
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