ST2012 Single-chip PCI, CardBus, MiniPCI based PCI/CardBus F
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Sundance Technology
ST2012
Single-chip PCI, CardBus, MiniPCI based
PCI/CardBus Fast Ethernet MAC+PHY with Modem Interface
Compliant with Power Management v1.1 Compliant with OnNow Device Class Power Management Reference Specification v1.0a Supports full wakeup events including Wakeup Packets, Magic Packet, Link Status change Pre-ACPI Wake-On-LAN (WOL) support Flash/PROM interface support remote network boot On-chip transmit receive FIFO buffers with programmable watermarks early transmit receive operation minimize latency Advanced features reduce host ultilization Auto transmit/receive polling reduce utilization with PollNow command high priority packets Auto rejection runt packets Retransmission collision packets from on-chip transmit FIFO insertion short transmit packets calculation appending VLAN packet support Programmable Inter Packet (IPG) avoid Ethernet Capture Effect Rich on-chip statistic counters reduce management overhead Provides variety flexible receive filtering modes, including multicast filtering, 64bit hash table Serial EEPROM interface supports jumperless design Programmable on-chip status outputs Advanced Technology On-chip oscillator requires only single external 25MHz crystal power 2.5/3.3V CMOS design with tolerant Consumes less than 12.5mW deep sleep mode On-chip 2.5V voltage regulator 0.25um CMOS technology 128-pin LQFP
10/100Mbps Ethernet controller with modem interface multi-function designs Advanced features mobil applications Supports dual functions 10/100Mbps Ethernet modem Provides standard, 8-bit mimic host interface modem Supports storage CardBus Card Information Structure (CIS) serial EEPROM Supports CardBus CSTSCHG status changed registers Supports CardBus clock control through CLKRUN# Meets MiniPCI power management requirement; consumes less than power down state, less than 70mA uninitialized state, less than 200mA full operation state Fully Integrated 10/100Mbps Compliant with IEEE 802.3 10BASE-T, 100BASE-TX 100BASE-FX 10BASE-T transceiver includes on-chip filtering 100BASE-TX transceiver includes MLT-3, Adaptive Equalizer, Baseline Compensation circuit 100BASE-FX transceiver includes PECL interface IEEE 802.3u Auto-Negotiation compliant IEEE 802.3x full duplex flow control compliant Glueless 32-bit v2.2 compliant master scatter/gather byte boundary high performance data transfer Advanced Memory Read Multiple, Memory Read Line, Memory Write Invalidate commands Full operation with Clock from 12.5 Supports burst length bytes Supports Wired Management reduce Total Cost Ownership Compliant with PC98/PC99 System Design Guide Compliant with ACPI v1.0
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