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CD4071BM CD4071BC Quad 2-Input Buffered Series Gate CD4081BM CD4081BC


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CD4071BM CD4071BC Quad 2-Input Buffered Series Gate CD4081BM CD4081BC Quad 2-Input Buffered Series Gate
CD4071BM CD4071BC Quad 2-Input Buffered Series Gate CD4081BM CD4081BC Quad 2-Input Buffered Series Gate
These quad gates monolithic complementary (CMOS) integrated circuits constructed with P-channel enhancement mode transistors They have equal source sink current capabilities conform standard series output drive devices also have buffered outputs which improve transfer characteristics providing very high gain inputs protected against static discharge with diodes
Features
power driving compatibility driving 74LS parametric ratings Symmetrical output characteristics Maximum input leakage over full temperature range
Connection Diagrams
CD4071B Dual-In-Line Package
5977
View CD4081B Dual-In-Line Package
5977
View Order Number CD4071B CD4081B
C1995 National Semiconductor Corporation
5977
RRD-B30M105 Printed
Absolute Maximum Ratings (Notes
Lead Temperature (TL) (Soldering seconds)
Military Aerospace specified devices required please contact National Semiconductor Sales Office Distributors availability specifications Voltage Power Dissipation (PD) Dual-In-Line Small Outline Range Storage Temperature (TS)
Operating Conditions
Operating Range (VDD) Operating Temperature Range (TA) CD4071BM CD4081BM CD4071BC CD4081BC
Electrical Characteristics CD4071BM
Symbol Parameter Quiescent Device Current Level Output Voltage High Level Output Voltage Level Input Voltage High Level Input Voltage Level Output Current (Note High Level Output Current (Note Input Current Conditions
CD4081BM (Note
Units
lIOl lIOl
10b5
Note ``Absolute Maximum Ratings'' those values beyond which safety device cannot guaranteed Except ``Operating Temperature Range'' they meant imply that devices should operated these limits table ``Electrical Characteristics'' provides conditions actual device operation Note voltages measured with respect unless otherwise specified Note tested output time
Electrical Characteristics CD4071BC
Symbol Parameter Quiescent Device Current Level Output Voltage High Level Output Voltage Level Input Voltage High Level Input Voltage Level Output Current (Note High Level Output Current (Note Input Current Conditions
CD4081BC (Note
Units
lIOl lIOl
10b5
Electrical Characteristics CD4071BC CD4071BM Input Typical temperature coefficient
Symbol tPHL Parameter Propagation Delay Time High-to-Low Level Propagation Delay Time Low-to-High Level Transition Time Conditions Input Gate Units
tPLH
tTHL tTLH
Average Input Capacitance Power Dissipation Capacity
Parameters guaranteed correlated testing Note ``Absolute Maximum Ratings'' those values beyond which safety device cannot guaranteed Except ``Operating Temperature Range'' they meant imply that devices should operated these limits table ``Electrical Characteristics'' provides conditions actual device operation Note voltages measured with respect unless otherwise specified Note tested output time
Electrical Characteristics CD4081BC CD4081BM Input Typical temperature coefficient
Symbol tPHL Parameter Propagation Delay Time High-to-Low Level Propagation Delay Time Low-to-High Level Transition Time Conditions Input Gate Units
tPLH
tTHL tTLH
Average Input Capacitance Power Dissipation Capacity
Parameters guaranteed correlated testing
Typical Performance Characteristics
5977-7
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FIGURE Typical Transfer Characteristics
FIGURE Typical Transfer Characteristics
FIGURE Typical Transfer Characteristics
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FIGURE
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FIGURE
FIGURE Typical Transfer Characteristics
Typical Performance Characteristics (Continued)
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FIGURE
FIGURE
FIGURE
5977-16
FIGURE
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FIGURE
FIGURE
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FIGURE
FIGURE
Schematic Diagrams
CD4071B
device shown JeAaB Logical ``1'' High Logical ``0'' inputs protected standard CMOS protection circuit
5977
5977-1
CD4081B
device shown JeAB Logical ``1'' High Logical ``0'' inputs protected standard CMOS protection circuit
5977
5977-4
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package Order Number CD4071BMJ CD4071BCJ CD4081BMJ CD4081BCJ Package Number J14A
CD4071BM CD4071BC Quad 2-Input Buffered Series Gate CD4081BM CD4081BC Quad 2-Input Buffered Series Gate
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package Order Number CD4071BMN CD4071BCN CD4081BMN CD4081BCN Package Number N14A
LIFE SUPPORT POLICY NATIONAL'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT NATIONAL SEMICONDUCTOR CORPORATION used herein Life support devices systems devices systems which intended surgical implant into body support sustain life whose failure perform when properly used accordance with instructions provided labeling reasonably expected result significant injury user
National Semiconductor Corporation 1111 West Bardin Road Arlington 76017 1(800) 272-9959 1(800) 737-7018
critical component component life support device system whose failure perform reasonably expected cause failure life support device system affect safety effectiveness
National Semiconductor Europe (a49) 0-180-530 Email cnjwge tevm2 Deutsch (a49) 0-180-530 English (a49) 0-180-532 Fran (a49) 0-180-532 Italiano (a49) 0-180-534
National Semiconductor Hong Kong 13th Floor Straight Block Ocean Centre Canton Tsimshatsui Kowloon Hong Kong (852) 2737-1600 (852) 2736-9960
National Semiconductor Japan 81-043-299-2309 81-043-299-2408
National does assume responsibility circuitry described circuit patent licenses implied National reserves right time without notice change said circuitry specifications

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