9&;2 &ORFN *HQHUDWRU June 1999 Features Description
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9&;2 &ORFN *HQHUDWRU
June 1999
Features
Description
On-chip tunable voltage-controlled crystal oscillator circuitry (VCXO) allows precise system frequency tuning (pull range typically 300ppm) Uses inexpensive fundamental-mode crystals Integrated phase-locked loops (PLL) multiply VCXO frequency higher system frequencies needed 3.3V supply voltage available Small circuit board footprint (8-pin 0.150 SOIC) Custom frequency selections available contact your local Sales Representative more information
FS6205 monolithic CMOS clock generator designed minimize cost component count digital video/audio systems. on-chip voltage-controlled crystal oscillator (VCXO) permits reference frequency output frequency) tuned match other frequencies present system. Phase-locked loops used generate precise output reference frequency ratios. Table information frequency ratios programmed into each version FS6205.
Table Version Information Figure Configuration
XTUNE
DEVICE
(nom)
FREF (MHz)
(MHz) 27.000 (REF 74.175824175. (REF 27.027 (REF 74.580835443. (REF
XOUT
FS6205-01 13.500
FS6205
13.5135
8-pin (0.150) SOIC
NOTE: Contact custom versions
Figure Block Diagram
VCXO XOUT XTUNE
FS6205
American Microsystems, Inc. reserves right change detail specifications required permit improvements design products.
6.1.99
9&;2 &ORFN *HQHUDWRU
June 1999
Table Descriptions
Key: Analog Input; Analog Output; Digital Input; Input with Internal Pull-Up; Input with Internal Pull-Down; Digital Input/Output; DI-3 Three-Level Digital Input, Digital Output; Power/Ground; Active
TYPE
NAME XTUNE XOUT VCXO Crystal Feedback
DESCRIPTION
Power Supply (+3.3V +5V) Version Information VCXO Tune Ground Clock Output Frequency Select Input (changes Frequencies) Multiplexer Select Input (chooses VCXO Crystal Drive
Functional Block Description
Phase-Locked Loops (PLL)
on-chip PLLs standard frequency- phaselocked loop architecture. multiplies reference oscillator desired frequency ratio integers. frequency multiplication exactly that specified integer ratios.
oscillator circuit. actual amount that changing load capacitance alters oscillator frequency will dependent characteristics crystal well oscillator circuit itself. Specifically, motional capacitance crystal (usually referred crystal manufacturers C1), static capacitance crystal (C0), load capacitance (CL) oscillator determine "warping" "pulling" capability crystal oscillator circuit. simple formula obtain pulling capability crystal oscillator
Voltage-Controlled Crystal Oscillator (VCXO)
ppm)
VCXO provides tunable, low-jitter frequency reference rest FS6109 system components. Loading capacitance crystal internal FS6205. external components (other than crystal resonator itself) required operation VCXO. Continuous fine-tuning VCXO frequency accomplished varying voltage XTUNE pin. total change (from extreme other) effective loading capacitance 12pF nominal (i.e from 35pF 13pF). oscillator operates crystal resonator parallel-resonant mode. Crystal warping, "pulling" crystal oscillation frequency, accomplished altering effective load capacitance presented crystal
where extremes applied load capacitance. EXAMPLE: crystal with following parameters used. With 0.02pF, 5pF, 13pF, 35pF, tuning range between extreme settings XTUNE voltage
0.02
6.1.99
9&;2 &ORFN *HQHUDWRU
June 1999
Electrical Specifications
Table Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. These conditions represent stress rating only, functional operation device these other conditions above operational limits noted this specification implied. Exposure maximum rating conditions extended conditions affect device performance, functionality, reliability.
PARAMETER Supply Voltage (VSS ground) Input Voltage, Output Voltage, Input Clamp Current, VDD) Output Clamp Current, VDD) Storage Temperature Range (non-condensing) Ambient Temperature Range, Under Bias Junction Temperature Lead Temperature (soldering, 10s) Input Static Discharge Voltage Protection (MIL-STD 883E, Method 3015.7)
SYMBOL
MIN. VSS-0.5 VSS-0.5 VSS-0.5
MAX. VDD+0.5 VDD+0.5
UNITS
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage resulting loss functionality performance occur this device subjected high-energy electrostatic discharge.
Table Operating Conditions
PARAMETER Supply Voltage (3.3 volt system) Supply Voltage (5.0 volt system) Ambient Operating Temperature Range Crystal Resonator Frequency SYMBOL fXTAL CONDITIONS/DESCRIPTION NOTE NOTE NOTE Fundamental Mode MIN. TYP. MAX. UNITS
NOTE These specifications represent generic FS6205 device capability. Device specifications particular version (i.e. FS6205-xx) guaranteed only with operating voltage reference frequency specified Version Information.
6.1.99
9&;2 &ORFN *HQHUDWRU
June 1999
Table Electrical Specifications (VDD 3.3V nominal)
Unless otherwise stated, 3.3V 10%, load output, ambient temperature range 70°C. Parameters denoted with asterisk represent nominal characterization data production tested specific limits. Where given, characterization data from typical. Negative currents indicate current flows device.
PARAMETER Overall Supply Current, Dynamic, with Loaded Outputs Crystal Oscillator Crystal Loading Capacitance Crystal Drive Level Clock Outputs (CLKx) High-Level Output Source Current Low-Level Output Sink Current Output Impedance Short Circuit Source Current Short Circuit Sink Current
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
fXTAL 13.5MHz; 10pF, 3.3V
t.b.d.
CL(xtal)
seen crystal connected XOUT (@VXTUNE=mid-scale) RXTAL=20;
IOSH IOSL
2.0V 0.4V 0.1VDD; output driving high 0.1VDD; output driving shorted 30s, max. 3.3V; shorted 30s, max.
6.1.99
9&;2 &ORFN *HQHUDWRU
June 1999
Table Electrical Specifications (VDD nominal)
Unless otherwise stated, 5.0V 10%, load output, ambient temperature range 70°C. Parameters denoted with asterisk represent nominal characterization data production tested specific limits. Where given, characterization data from typical. Negative currents indicate current flows device.
PARAMETER Overall Supply Current, Dynamic, with Loaded Outputs Crystal Oscillator Crystal Loading Capacitance Crystal Drive Level Clock Outputs (CLKx) High-Level Output Source Current Low-Level Output Sink Current Output Impedance Short Circuit Source Current Short Circuit Sink Current
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
fXTAL 13.5MHz; 10pF, 5.0V
CL(xtal)
seen crystal connected XOUT RXTAL=20;
IOSH IOSL
2.0V 0.4V 0.1VDD; output driving high 0.1VDD; output driving shorted 30s, max. shorted 30s, max.
6.1.99
9&;2 &ORFN *HQHUDWRU
June 1999
Table Timing Specifications (VDD 3.3V nominal)
Unless otherwise stated, 3.3V 10%, load output, ambient temperature range 70°C. Parameters denoted with asterisk represent nominal characterization data production tested specific limits. Where given, characterization data from typical.
PARAMETER Overall Synthesis Error Clock Output (CLKx) Duty Cycle Jitter, Period (peak-peak) Jitter, Long Term (y()) Rise Time Fall Time
SYMBOL
CONDITIONS/DESCRIPTION
CLOCK (MHz)
MIN.
TYP.
MAX.
UNITS
(unless otherwise noted Frequency Table)
Ratio high pulse width measured from rising edge next falling edge VDD/2) clock period
tj(P) tj(LT)
From rising edge next rising edge VDD/2, 10pF From 0-500µs VDD/2, 10pF compared ideal clock source 3.3V; 0.3V 3.0V; 10pF 3.3V; 3.0V 0.3V; 10pF
Table Timing Specifications (VDD nominal)
Unless otherwise stated, 3.3V 10%, load output, ambient temperature range 70°C. Parameters denoted with asterisk represent nominal characterization data production tested specific limits. Where given, characterization data from typical.
PARAMETER Overall Synthesis Error Clock Output (CLKx) Duty Cycle Jitter, Period (peak-peak) Jitter, Long Term (y()) Rise Time Fall Time
SYMBOL
CONDITIONS/DESCRIPTION
CLOCK (MHz)
MIN.
TYP.
MAX.
UNITS
(unless otherwise noted Frequency Table)
Ratio high pulse width measured from rising edge next falling edge VDD/2) clock period
tj(P) tj(LT)
From rising edge next rising edge VDD/2, 10pF From 0-500µs VDD/2, 10pF compared ideal clock source 0.5V 4.5V; 10pF 4.5V 0.5V; 10pF
6.1.99
9&;2 &ORFN *HQHUDWRU
June 1999
Package Information
Table 8-pin SOIC (0.150") Package Dimensions
DIMENSIONS INCHES MIN. 0.061 0.004 0.055 0.013 0.0075 0.189 0.150 0.230 0.010 0.016 MAX. 0.068 0.0098 0.061 0.019 0.0098 0.196 0.157 0.244 0.016 0.035 MILLIMETERS MIN. 1.55 0.102 1.40 0.33 0.191 4.80 3.81 5.84 0.25 0.41 MAX. 1.73 0.249 1.55 0.49 0.249 4.98 3.99 6.20 0.41 0.89
BASE PLANE RADII: 0.005" 0.01"
SEATING PLANE
typ.
0.050
1.27
Table 8-pin SOIC (0.150") Package Characteristics
PARAMETER Thermal Impedance, Junction Free-Air 8-pin 0.150" SOIC Lead Inductance, Self Lead Inductance, Mutual Lead Capacitance, Bulk SYMBOL CONDITIONS/DESCRIPTION flow Corner lead Center lead lead adjacent lead lead TYP. 0.27 UNITS °C/W
6.1.99
9&;2 &ORFN *HQHUDWRU
June 1999
Ordering Information
DEVICE NUMBER PACKAGE TYPE 8-pin (0.150") SOIC (Small Outline Package) 8-pin (0.150") SOIC (Small Outline Package) OPERATING TEMPERATURE RANGE 70°C (Commercial) 70°C (Commercial) SHIPPING CONFIGURATION Tape Reel Tubes
ORDERING CODE
11640-t.b.d. 11640-t.b.d.
FS6205-01 FS6205-01
Copyright 1999 American Microsystems, Inc.
Devices sold covered warranty patent indemnification provisions appearing Terms Sale only. makes warranty, express, statutory implied description, regarding information forth herein regarding freedom described devices from patent infringement. makes warranty merchantability fitness purposes. reserves right discontinue production change specifications prices time without notice. AMI's products intended commercial applications. Applications requiring extended temperature range, unusual environmental requirements, high reliability applications, such military, medical life-support life-sustaining equipment, specifically recommended without additional processing such applications.
American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, 83201, (208) 233-4690, (208) 234-6796, Address: http://www.amis.com E-mail: tgp@amis.com
6.1.99
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