AMERICAN MICROSYSTEMS, June, 1998 Preliminary micron CMOS Do
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DETCK01
AMERICAN MICROSYSTEMS,
June, 1998 Preliminary
micron CMOS Double Poly
Clock Detector
Features
Detects static clock either state. Detects when clock frequency drops below KHz.
AVDD CLKIN IBIAS CLKSLOW
Description
Clock Fail Detect cell detects static clock slow clock.
AVSS
DESCRIPTION
NAME AVDD AVSS CLKIN IBIAS CLKSLOW TYPE Analog Supply Analog Supply Digital Input Analog Input Digital Input Digital Output DESCRIPTION Positive Supply Negative Supply Clock Input Bias Current Input Power down Input Clock Fail Output Active High
ELECTRICAL CHARACTERISTICS
SYMBOL FMAX PARAMETER Temperature Power Supply Freq. Detect Supply Current Power down Current UNIT
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