AMERICAN MICROSYSTEMS, June, 1998 Preliminary micron CMOS Single
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IBCNH3
AMERICAN MICROSYSTEMS,
June, 1998 Preliminary micron CMOS Single Ploy
Comparator Description
N-Channel differential input comparator with hysteresis. Digital model designed differential input.
Schematic Symbol
AVDD PADM VREF AVSS
TRUTH TABLE
PADM
VREF
DESCRIPTION
NAME PADM VREF AVDD AVSS TYPE Analog input Analog input Digital input Digital output Analog supply Analog supply DESCRIPTION Positive Comparator Input Negative Comparator Input Power Down Input Comparator Output
ELECTRICAL CHARACTERISTICS
SYMBOL delay Ivdd VHYS PARAMETER Propagation delay Temperature Supply Voltage Supply Current Hysteresis Input Common Mode Range Output high Output CONDITION 1.95pf load 1.25 UNITS
IBCNH3
AMERICAN MICROSYSTEMS,
June, 1998 Preliminary micron CMOS Single Ploy 0.046 1.17 2.34
Cload
Capacitive load
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