Product data Replaces LF198/LF298/LF398 1994 IC11 2001 Product da

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Product data Replaces LF198/LF298/LF398 1994 IC11 2001 Product da

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LF398 Sample-and-hold amplifier
Product data Replaces LF198/LF298/LF398 1994 IC11 2001
Product data
Sample-and-hold amplifier
LF398
DESCRIPTION
LF398 monolithic sample-and-hold circuit which utilizes high-voltage ion-implant JFET technology obtain ultra-high accuracy with fast acquisition signal droop rate. Operating unity gain follower, gain accuracy 0.002% typical acquisition time 0.01%. bipolar input stage used achieve offset voltage wide bandwidth. Input offset adjust accomplished with single does degrade input offset drift. wide bandwidth allows LF398 included inside feedback loop amps without having stability problems. Input impedance 1010 allows high source impedances used without degrading accuracy. P-channel junction FETs combined with bipolar devices output amplifier give droop rates mV/min with hold capacitor. JFETs have much lower noise than devices used previous designs exhibit high temperature instabilities. overall design guarantees feedthrough from input output hold mode even input signals equal supply voltages. Logic inputs fully differential with input current, allowing direct connection TTL, PMOS, CMOS; differential threshold LF398 will operate from supplies. available 8-pin plastic 14-pin plastic packages.
CONFIGURATIONS
Package
VIEW
OFFSET VOLTAGE INPUT
LOGIC LOGIC REFERENCE OUTPUT
Package
INPUT OUTPUT VIEW LOGIC LOGIC
FEATURES
Operates from supplies Less than acquisition time TTL, PMOS, CMOS compatible logic input typical hold step 0.01 input offset 0.002% gain accuracy output noise hold mode Input characteristics change during hold mode High supply rejection ratio sample hold Wide bandwidth
ORDERING INFORMATION
DESCRIPTION 14-Pin Plastic Small Outline (SO) Package 8-Pin Plastic Dual In-Line Package (DIP)
SL00083
Figure Configurations
APPLICATION
LF398 ideally suited wide variety sample-and-hold
applications, including data acquisition, analog-to-digital conversion, synchronous demodulation, automatic test setup.
TEMPERATURE RANGE +70°C +70°C
ORDER CODE LF398D LF398N
SOT108-1 SOT97-1
2001
853-0135 26832
Product data
Sample-and-hold amplifier
LF398
FUNCTIONAL DIAGRAM
OFFSET
TYPICAL APPLICATIONS
INPUT LOGIC LOGIC REFERENCE HOLD CAPACITOR SAMPLE HOLD LOGIC INPUT ANALOG INPUT OUTPUT OUTPUT
SL00084
SL00085
Figure Functional Diagram
Figure Typical Applications
ABSOLUTE MAXIMUM RATINGS
SYMBOL Supply voltage Maximum power dissipation Tamb (still-air)3 package package Tamb Tstg Operating ambient temperature range Storage temperature range Input voltage Logic-to-logic reference differential voltage2 Output short-circuit duration Hold capacitor short-circuit duration TSOLD Lead soldering temperature max) PARAMETER RATING UNIT
1160 1040 +150 Equal supply voltage Indefinite
NOTES: maximum junction temperature LF398 When operating elevated ambient temperature, packages must derated based thermal resistance specified. Although differential voltage exceed limits given, common-mode voltage logic pins must always least below positive supply above negative supply. Derate above following rates: package mW/°C package mW/°C
2001
Product data
Sample-and-hold amplifier
LF398
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, following conditions apply: unit "sample" mode; -11.5 +11.5 0.01 Logic reference voltage logic voltage SYMBOL IBIAS PARAMETER Input offset voltage4 Input bias current4 Input impedance Gain error Feedthrough attenuation ratio Output edance impedance "HOLD" step2 Supply current4 Logic logic reference input current Leakage current into hold capacitor4 Acquisition time 0.1% Hold capacitor charging current Supply voltage rejection ratio Differential logic threshold TEST CONDITIONS Full temperature range Full temperature range RL=10 Full temperature range 0.01 "HOLD" mode Full temperature range 0.01 VOUT "HOLD" mode VOUT 1000 0.01 VIN-VOUT VOUT 1010 0.004 0.01 0.02 UNIT
NOTES: Unless otherwise specified, following conditions apply. Unit "sample" mode, -11.5 +11.5 0.01 Logic reference voltage logic voltage Hold step sensitive stray capacitive coupling between input logic signals hold capacitor. instance, will create additional step with logic swing 0.01 hold capacitor. Magnitude hold step inversely proportional hold capacitor value. Leakage current measured junction temperature effects junction temperature rise power dissipation elevated ambient calculated doubling value each increase chip temperature. Leakage guaranteed over full input signal range. parameters guaranteed over supply voltage
2001
Product data
Sample-and-hold amplifier
LF398
TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current
CURRENT (mA) CURRENT (mA) SINKING SOURCING
Output Short Circuit Current
INPUT VOLTAGE OUTPUT VOLTAGE (mV) -0.2 -0.4 -0.6 -0.8
Gain Error
SAMPLE MODE
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
INPUT VOLTAGE
Hold Step
HOLD STEP (mV) CURRENT (nA)
Leakage Current Into Hold Capacitor
VOUT HOLD MODE NORMALIZED HOLD STEP AMPLITUDE
Hold Step Input Voltage
10-1
0.01
1000
0.01
10-2
HOLD CAPACITOR
JUNCTION TEMPERATURE (°C)
INPUT VOLTAGE
SL00086
Figure Typical Performance Characteristics
TYPICAL PERFORMANCE CHARACTERISTICS
Acquisition Time
TIME TIME (ns) 0.1% 1000 0.001 0.01 HOLD CAPACITOR (µF) POSITIVE INPUT STEP
MYLAR TIME CONSTANT POLYPROPYLENE POLYSTYRENE HYSTERESIS
Aperture Time
Capacitor Hysteresis
MYLAR HYSTERESIS POLYPROPYLENE POLYSTYRENE TIME CONSTANT
VOUT
NEGATIVE INPUT STEP
0.01%
JUNCTION TEMPERATURE (°C)
SAMPLE TIME (ms)
SL00087
Figure Typical Performance Characteristics
2001
Product data
Sample-and-hold amplifier
LF398
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
Dynamic Sampling Error
Output Droop Rate
`Hold' Sampling Time
SETTLING TIME
(V/SEC) ERROR (mV)
10-1 TIME 10-2 10-3 1000 10-4 1000 1000 0.01 INPUT SLEW RATE (V/ms) HOLD CAPACITOR
-100
JUNCTION TEMPERATURE (°C)
Phase Gain (Input Output, Small-Signal)
GAIN INPUT OUTPUT (dB) 1000 0.01 1000 0.01 100k REJECTION RATIO (dB) INPUT OUTPUT PHASE DELAY
Power Supply Rejection
VOUT NOISE (nV/
Output Noise
POSITIVE MODE NEGATIVE MODE
`HOLD' MODE SAMPLE MODE
0.01
100k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
Feedthrough Rejection Ratio (Hold Mode)
-130 -120 -110 RATIO (dB) -100 1000 100k FREQUENCY (Hz) 0.01 Vp-p V7.8
SL00088
Figure Typical Performance Characteristics (cont.)
2001
Product data
Sample-and-hold amplifier
LF398
SO14: plastic small outline package; leads; body width
SOT108-1
2001
Product data
Sample-and-hold amplifier
LF398
DIP8: plastic dual in-line package; leads (300 mil)
SOT97-1
2001
Product data
Sample-and-hold amplifier
LF398
NOTES
2001
Product data
Sample-and-hold amplifier
LF398
Data sheet status
Data sheet status Objective data Preliminary data Product status Development Qualification Definitions This data sheet contains data from objective specification product development. Philips Semiconductors reserves right change specification manner without notice. This data sheet contains data from preliminary specification. Supplementary data will published later date. Philips Semiconductors reserves right change specification without notice, order improve design supply best possible product. This data sheet contains data from product specification. Philips Semiconductors reserves right make changes time order improve design, manufacturing supply. Changes will communicated according Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
Please consult most recently issued data sheet before initiating completing design. product status device(s) described this data sheet have changed since this data sheet published. latest information available Internet
Definitions
Short-form specification data short-form specification extracted from full data sheet with same type number title. detailed information relevant data sheet data handbook. Limiting values definition Limiting values given accordance with Absolute Maximum Rating System (IEC 60134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Applications that described herein these products illustrative purposes only. Philips Semiconductors make representation warranty that such applications will suitable specified without further testing modification.
Disclaimers
Life support These products designed life support appliances, devices systems where malfunction these products reasonably expected result personal injury. Philips Semiconductors customers using selling these products such applications their risk agree fully indemnify Philips Semiconductors damages resulting from such application. Right make changes Philips Semiconductors reserves right make changes, without notice, products, including circuits, standard cells, and/or software, described contained herein order improve design and/or performance. Philips Semiconductors assumes responsibility liability these products, conveys license title under patent, copyright, mask work right these products, makes representations warranties that these products free from patent, copyright, mask work right infringement, unless otherwise specified.
Contact information
additional information please visit Fax: 24825
Koninklijke Philips Electronics N.V. 2001 rights reserved. Printed U.S.A. Date release: 10-01
sales offices addresses send e-mail
Document order number:
9397 08921
2001

Product data Replaces LF198/LF298/LF398 1994 IC11 2001 Product da

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