OP000IS01 micron CMOS Double Poly (hence conceited AVDD) cou
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AMERICAN MICROSYSTEMS,
OP000IS01
micron CMOS Double Poly
(hence conceited AVDD) could easily altered other N-well processes IBIASIN AVDD AVSS
June, 1998 Preliminary
Features:
Designed used switched-cap filter Will drive moderate loads large resistive loads. Moderate current consumption.
Description
Two-stage class amplifies. P-diff pair. Diff pair N-minor composed wide devices order accommodate large that approaches negative rail. schematic drawn Pwell process
DESCRIPTION
NAME AVDD AVSS IBIASIN TYPE Analog Supply Analog Supply Power Down Digital Bulk Connection Input Analog Input Analog Input Analog Output Analog DESCRIPTION Positive Supply Negative Supply Active High Tied Positive Supply Input Bias Current Positive Opamp Input Negative Opamp Input Opamp Output
ELECTRICAL CHARACTERISTICS
SYMBOL Open Loop Gain Phase Margin Offset (Systematic) cmrr (dc) avdd avss Bias current Output Range CLOAD RLOAD TEMP PARAMETER 4.75 -4.75 AVSS 1.58 UNITS
5.25 -5.25 AVDD
Temperature
OP000IS01
AMERICAN MICROSYSTEMS,
June, 1998 Preliminary
micron CMOS Double Poly
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