Designed primarily with vacuum-fluorescent displays, UCN5811A smart po

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Designed primarily with vacuum-fluorescent displays, UCN5811A smart po

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BiMOS 12-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
Designed primarily with vacuum-fluorescent displays, UCN5811A smart power BiMOS driver features low-output saturation voltages high output switching speed. These devices contain CMOS shift registers, data latches, control circuitry, bipolar high-speed sourcing outputs with DMOS active pull-down circuitry. high-speed shift register data latches allow direct interface with microprocessor-based systems. CMOS serial data output enables cascade connections applications requiring additional drive lines. UCN5811A features output ratings, allowing used many other peripheral power driver applications. used improved replacement SN75512B. Allegro devices require special power-up sequencing. UCN5811A been designed with BiMOS logic improved data entry rates. With supply, will operate least MHz. higher speeds possible. this device with require appropriate pull-up resistors ensure proper input logic high. This device supplied 20-pin plastic dual in-line package. operated over ambient temperature range -20°C +85°C. Copper lead frames output saturation voltages allow outputs operated continuously ambient temperatures 76°C.
Data Sheet 26182.20B
BLANKING SERIAL DATA SERIAL DATA LOGIC SUPPLY CLOCK STROBE
BLNK
LOAD SUPPLY GROUND
REGISTER
LATCHES
Dwg. PP-029-5
FEATURES
ABSOLUTE MAXIMUM RATINGS 25°C
Logic Supply Voltage,VDD Driver Supply Voltage, Continuous Output Current, IOUT Input Voltage Range, -0.3 Package Power Dissipation, Graph Operating Temperature Range, -20°C +85°C Storage Temperature Range, -55°C +150°C
Data Input Rate Low-Power CMOS Logic Latches High-Speed Source Drivers Active Pull-Downs Low-Output Saturation Voltages Improved Replacement SN75512B
Always order complete part number:
UCN5811A
5811 BiMOS 12-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
ALLOWABLE PACKAGE POWER DISSIPATION WATTS
FUNCTIONAL BLOCK DIAGRAM
CLOCK SERIAL DATA LOGIC SUPPLY SERIAL DATA
SERIAL-PARALLEL SHIFT REGISTER
STROBE
LATCHES
BLANKING BIPOLAR
LOAD SUPPLY
AMBIENT TEMPERATURE
Dwg. GS-004-1
GROUND
Dwg. FP-013-1
TYPICAL INPUT CIRCUIT
TIMING WAVESHAPES
Dwg. EP-010-5
TYPICAL OUTPUT DRIVER
Dwg. W-184
Dwg. W-182
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright 1985, 2000 Allegro MicroSystems, Inc.
5811 BiMOS 12-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
ELECTRICAL CHARACTERISTICS +25°C, (unless otherwise noted).
Limits Characteristic Output Leakage Current Output Voltage Symbol ICEX VOUT(H) VOUT(L) Test Conditions VOUT +70°C IOUT IOUT IOUT Output Pull-Down Current IOUT(L) VOUT VOUT Input Voltage VIN(1) VIN(0) Input Current IIN(1) IIN(0) Serial Data Output Voltage VOUT(H) VOUT(L) Maximum Clock Frequency Supply Current fclk IDD(H) IDD(L) IBB(H) IBB(L) Blanking Output Delay tPHL tPLH Output Fall Time Output Rise Time Outputs High Outputs Outputs High, Load Outputs IOUT -200 IOUT Mln. -0.3 3.3* Typ. -5.0 58.5 0.05 -0.05 1000 Max. +0.8 -0.5 1250 Limits Min. 10.5 -0.3 11.7 Typ. -5.0 58.5 -1.0 11.8 Max. 12.3 +0.8 -1.0 Units
Negative current defined coming (sourcing) specified device pin. Operation clock frequency greater than specified minimum value possible warranteed.
www.allegromicro.com
5811 BiMOS 12-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
CLOCK DATA STROBE BLANKING OUTN
Dwg. 12,649A
Serial Data present input transferred shift register logic logic transition CLOCK input pulse. succeeding CLOCK pulses, registers shift data information towards SERIAL DATA OUTPUT. SERIAL DATA must appear input prior rising edge CLOCK input waveform. Information present register transferred respective latch when STROBE high (serial-to-parallel conversion). latches will continue accept data long STROBE held high. Applications where latches bypassed (STROBE tied high) will require that BLANKING input high during serial data entry. When BLANKING input high, output source drivers disabled (OFF); DMOS sink drivers information stored latches affected BLANKING input. With BLANKING input low, outputs controlled state their respective latches.
TIMING REQUIREMENTS
+25°C,VDD Logic Levels Ground)
Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) Minimum Data Active Time After Clock Pulse (Data Hold Time) Minimum Data Pulse Width Minimum Clock Pulse Width Minimum Time Between Clock Activation Strobe Minimum Strobe Pulse Width Typical Time Between Strobe Activation Output Transistion Timing representative clock. Higher speeds attainable with increased supply voltage; operation high temperatures will reduce specified maximum clock frequency.
TRUTH TABLE
Serial Shift Register Contents Data Clock Input Input IN-1 RN-2 RN-1 RN-2 RN-1 RN-1 Serial Data Strobe Output Input RN-1 RN-1
Irrelevant
Latch Contents IN-1 Blanklng
Output Contents IN-1
RN-1 PN-1 PN-1
Logic Level
PN-1
High Logic Level
Present State
Previous State
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
5811 BiMOS 12-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
UCN5811A
Dimensions Inches (controlling dimensions)
0.014 0.008
0.430 0.280 0.240
0.300
0.070 0.045
0.100 1.060 0.980
0.005
0.210
0.015
0.150 0.115 0.022 0.014
Dwg. MA-001-20
NOTES:
Exact body lead configuration vendor's option within limits shown. Lead spacing tolerance non-cumulative. Lead thickness measured seating plane below. Supplied standard sticks/tubes devices.
www.allegromicro.com
5811 BiMOS 12-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
UCN5811A
Dimensions Millimeters (for reference only)
0.355 0.204
10.92 7.11 6.10
7.62
1.77 1.15
2.54 26.92 24.89
0.13
5.33
0.39
3.81 2.93 0.558 0.356
Dwg. MA-001-20
NOTES:
Exact body lead configuration vendor's option within limits shown. Lead spacing tolerance non-cumulative. Lead thickness measured seating plane below. Supplied standard sticks/tubes devices.
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
5811 BiMOS 12-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
products described here manufactured under more U.S. patents U.S. patents pending. Allegro MicroSystems, Inc. reserves right make, from time time, such departures from detail specifications required permit improvements performance, reliability, manufacturability products. Before placing order, user cautioned verify that information being relied upon current. Allegro products authorized critical components life-support devices systems without express written approval. information included herein believed accurate reliable. However, Allegro MicroSystems, Inc. assumes responsibility use; infringement patents other rights third parties which result from use.
www.allegromicro.com
5811 BiMOS 12-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
POWER INTERFACE DRIVERS
Function 8-Bit (saturated drivers) 8-Bit 8-Bit 8-Bit 8-Bit 8-Bit (constant-current driver) 8-Bit (DMOS drivers) 8-Bit (DMOS drivers) 8-Bit (DMOS drivers) 10-Bit (active pull-downs) 12-Bit (active pull-downs) 16-Bit (constant-current driver) 20-Bit (active pull-downs) 32-Bit (active pull-downs) 32-Bit 32-Bit (saturated drivers) 4-Bit 8-Bit 8-Bit 8-Bit (DMOS drivers) 8-Bit (DMOS drivers) Unipolar Stepper Motor Translator/Driver Addressable 8-Bit Decoder/DMOS Driver Addressable 8-Bit Decoder/DMOS Driver Addressable 8-Bit Decoder/DMOS Driver Addressable 28-Line Decoder/Driver Output Ratings* SERIAL-INPUT LATCHED DRIVERS -120 1.25 5895 5821 5822 5841 5842 6275 6595 6A595 6B595 5810-F 6809/10 5811 6811 6276 5812-F 6812 5818-F 6818 5833 5832 5800 5815 5801 6B273 6273 5804 6259 6A259 6B259 6817 Part Number
PARALLEL-INPUT LATCHED DRIVERS
SPECIAL-PURPOSE DEVICES
Current maximum specified test condition, voltage maximum rating. specification sustaining voltage limits. Negative current defined coming (sourcing) output. Complete part number includes additional characters indicate operating temperature range package style. Internal transient-suppression diodes included inductive-load protection.
Northeast Cutoff, 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000

Designed primarily with vacuum-fluorescent displays, UCN5811A smart po

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