AMERICAN MICROSYSTEMS, June, 1998 Preliminary micron CMOS
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OP000IS02
AMERICAN MICROSYSTEMS,
June, 1998 Preliminary
micron CMOS
Double Poly
IREF
Features:
Designed used switched-cap filters. Will drive moderate loads large resistive loads. Mode sate current consumption.
Description
Two-stage class amplifier. P-diff. pair. schematic down process (hence commented AVDD) could easily altered other N-well processes.
DESCRIPTION
NAME AVDD AVSS IRER TYPE Analog Supply Analog Supply Bulk Connection Input Analog Input Analog Input Analog Output Analog DESCRIPTION Positive Supply Negative Supply Tied Positive Supply Input Bias Current Positive Opamp Input Negative Opamp Input Opamp Output
ELECTRICAL CHARACTERISTICS
SYMBOL Open Loop Gain Phase Margin Offset (Systematic) Cmrr (60hz) avdd avss Bias current Output Range CLOAD RLOAD TEMP PARAMETER -63.5 34.9 4.75 -4.75 AVSS 2.19 141.6 5.25 -5.25 AVDD UNITS
Temperature
OP000IS02
AMERICAN MICROSYSTEMS,
June, 1998 Preliminary
micron CMOS
Double Poly
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