Voice Recording Playback Device Minute Duration Features Multi-le

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Voice Recording Playback Device Minute Duration Features Multi-le

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APR6008
Voice Recording Playback Device Minute Duration
Features Multi-level analog storage High quality audio recording playback Dual mode storage analog and/or digital data Eliminates need separate digital memory Advanced, non-volatile Flash memory technology battery backup required interface Allows commercial microcontroller control device Programmable Sampling Clock Allows user choose quality duration levels Single power supply power consumption Playback operating current: typical Standby current: maximum Automatic power-down Multiple package options available CSP, SOP, PDIP, Bare On-board clock prescaler Eliminates need external clock dividers Automatic squelch circuit
Reduces background noise during quiet passages
General Description
APR6008 offers non-volatile storage voice and/or data advanced Multi-Level Flash memory. minutes audio recording playback accommodated. maximum bits digital data stored. APR6008 devices cascaded longer duration recording greater digital storage. Device control accomplished through industry standard interface that allows microcontroller manage message recording playback. This flexible arrangement allows widest variety messaging options. APR6008 ideal cellular cordless phones, telephone answering devices, personal digital assistants, personal voice recorders, voice pagers. achieves this high level storage capabiby using proprietary analog multi-level storage chno logy mplemented advanced non-volatile Flash memory process. Each memory cell typically store voltage levels. This allows APR6008 voice reproduce audio signals their natural form, eliminating need encoding compression which introduce distortion.
lity
Figure APR6008 Pinout Diagrams
VSSD UTAN VSSA AUDO LCAP SCLK VCCD VSSA VCCA
APLUS Integrated
2002/5/10
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APR6008
Functional Description
EXTCLK allows external sampling clock. This input accept wide range frequencies depending divider ratio programmed into divider that follows clock. Alternatively, programmable internal oscillator used supply sampling clock. following both signals automatically selects EXTCLK signal clock present, otherwise internal oscillator source chosen. Detailed information program divider internal oscillator found explanation PWRUP command, which appears OpCode Command Description section. Guidance choose appropriate sample clock frequency found Sampling Rate Voice Quality section. audio signal containing content wish record should into differential inputs ANAIN-, ANAIN+. After pre-amplification signal routed into anti-aliasing filter. anti-aliasing filter automatically adapts response based sample rate being used. external anti-aliasing filter therefore required. After passing through anti-alias filter, signal into sample hold circuit which works conjunction with Analog Write Circuit store each analog sample flash memory cell. When read operation desired Analog Read Circuit extracts analog data from memory array feeds signal Internal Pass Filter. pass filter converts individual samples into continuous output. output signal then goes squelch control circuit diff rential output driver. differential output driver feeds ANAOUT+ ANAOUT- pins. Both differential output pins swing around 1.23V potential. squelch control circuit automatically reduces output signal during quiet passages. copy squelch control signal present SQLOUT facilitate reducing gain external amplifier well. more information, refer Squelch section. After passing through squelch circuit output signal goes output amplifier. output amplifier drives single ended output AUDOUT pin. single ended output swings around 1.23V potential. control hand shaking signals routed Master Control Circuit. This circuit decodes signals generates internal control signals. also contains status register used examining current status APR6008
Figure
APR6008 Block Diagram
/RESET /BUSY /INT SCLK Master Control Circuit Address
ecoder
1.92 Mcell Memory Array Pass
PreAmp
ANAIN+ ANAIN-
Single Analog Memory Cell
Write Circuit
Column Decoder Read Circuit ANAOUT+ Column Address Analog input/output Memory array Pass ANAOUT-
Squelch
AUDOUT
Programmable Internal Oscillator EXTCLK Programmable Divider
SQLCAP /SQLOUT
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APR6008
Memory Organization
APR6008 memory array organized allow greatest flexibility message management digital storage. smallest addressable memory unit called "sector". APR6008 contains sectors.
Interface
memory management handled external host processor. host processor communicates with APR6008 through simple Serial Peripheral Interface (SPI) Port. port little three wires many seven depending amount control necessary. This section will describe manage memory using APR6008 Port associated OpCode commands. This topic broken down into following sections: Sending Commands Device OpCode Command Description Receiving Device Information Current Device Status (CDS) Reading Silicon Identification (SID) Writing Digital Data Reading Digital Data Recording Audio Data Playing Back Audio Data
Figure
Memory Map.
Trigger Point
Sector Sector
Sector
Used Digital Data
Handshaking Signals Sending Commands Device This section describes process sending OpCodes APR6008 Opcodes sent same with exception DIG_WRITE DIG_READ commands. DIG_WRITE DIG_READ commands described Writing Digital Data Reading Digital Data sections that follow. minimum configuration needed send commands uses /CS, SCLK pins. device will accept inputs whenever low. OpCode commands clocked rising edge clock. Figure shows timing diagram shifting OpCode commands into device. Figure description OpCode stream. must wait command finish executing before sending command. This accomplished monitoring BUSY pin. substitute monitoring busy inserting fixed delay between commands. required delay specified next1 next2 next3 next4 Figure shows timing diagram sending consecutive commands. Table describes which next specification use.
Sectors through used analog storage. ring audio recording memory cell used sample clock cycle. When recording stopped data (EOD) programed into memory. This prevents playback silence when partial sectors used. Unused memory that exists between sector used. Sectors through tested guaranteed digital storage. Other sectors, with exception sector 639, store data have been tested, thus guaranteed provide 100% good bits. This managed with error correction forward check-before-store methods. Once write cycle initiated previously written data chosen sector lost. Mixing audio signals digital data within same sector possible.
Note: There total 15bits reserved addressing.
APR6008 only requires bits. additional bits used
larger devices within APR6008 family.
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APR6008
Figure Sending Commands
ThiSCLK
SCLK
TfCS TpSCLK TloSCLK
next1 next2 next3 next4
TrCS
suDI
ThDI
Figure OpCode Format
irst ifte ifted
SCLK
Figure Opcode Stream Timing
urre
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OpCode Param eter
next1 next2 next3 next4
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APR6008
Table Sequential Command Timing
Next command Command Timing Symbol Tnext1 Tnext2 Tnext2 Within Time Current Command
PWRUP STOP_PWDN SET_REC SET_PLAY PLAY SET_FWD DIG_WRITE DIG_READ DIG_ERASE STOP
Command
PWRUP STOP, STOP_PWDN, SET_REC, REC,NOP STOP, STOP_PWDN, SET_FWD, FWD, SET_PLAY,PLAY, SET_FWD, FWD, STOP, STOP_PWDN
Digital Command, STOP, STOP_PWDN
Note: partial DIG_READ Tnext2 measured from extra clock that follows rise /CS, from rise
Tnext3
sampling rate: 376m sampling rate:
Command
Tnext4 470m
OpCode Command Description
Designers have access total OpCodes. These OpCodes listed Table name Opcode appears left hand column. following columns represent actual binary information contained data stream. Some commands have limits which com-
mand follow them. These limits shown "Allowable Follow Commands" column. last column summarizes each command. Combinations OpCodes used accommodate almost memory management scheme.
Table APR6008 Operational Codes
Instruction Name OpCode bits)
[Op4 Op0]
Opcode Parameters (15bits)
[Address Address LSB] [Address Address
Allowable Follow Commands
Summary
SET_FWD
[00000] [00001] [00010]
[Don't Care] [Don't care] Sector Address [A14
Commands Commands SET_FWD, FWD, STOP, STOP_PWDN SET_FWD, FWD, STOP, STOP_PWDN Commands
Operation Causes silicon read. Starts fast forward operation from sector address specified. Starts fast forward operation from current sector address. Resets device initial conditions. Sets sample frequency divider ratios. Stops current operation. Stops current operation. Causes device enter power down mode.
[00011]
[Don't care]
PWRUP
[00100]
[A14-A10]: zeros [A9-A2]: EXTCLK divider ratio [A1-A0]: Sample Rate Frequency
STOP STOP_PWDN
[00110] [00111]
[Don't care] [Don't care]
Commands PWRUP
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APR6008
Instruction Name OpCode bits)
[Op4 Op0]
Opcode Parameters (15bits)
[Address Address LSB] [Address Address
Allowable Follow Commands
Summary
SET_REC
[01000]
Sector Address [A14
STOP, STOP_PWDN, SET_REC, REC,NOP STOP, STOP_PWDN, SET_REC, REC,NOP Commands
Starts record operation from sector address specified.
[01001]
[Don't care]
Starts record operation from current sector address.
DIG_ERASE
[01010]
Sector Address [A14
Erases data contained specified sector. must erase sector before recording voice signals into must erase sector before storing digital data This command writes data bits D3003 starting specified address. 3004 bits must written. This command reads data bits D3003 starting specified address. Starts play operation from sector address specified.
DIG_WRITE
[01011]
[A14 A0][XXXX][D0 D3004][XXXX]
Commands
DIG_READ SET_PLAY
[01111] [01100]
Sector Address [A14 Sector Address [A14
Commands STOP, STOP_PWDN, SET_FWD, FWD, SET_PLAY,PLAY, STOP, STOP_PWDN, SET_FWD, FWD, SET_PLAY,PLAY,
PLAY
[01101]
[Don't care]
Starts play operation from current sector address.
command performs operation device. most often used when reading current device status. more information reading device status Current Device Status section. operation instructs device return contents silicon register. more information Reading section. SET_FWD command instructs device fast forward from beginning sector specified OpCode parameter field. device will fast forward until either bit, sector reached. forthcoming command been received when sector reached, device will loop back beginning same sector begin same process again. found device will stop generate interrupt /INT pin. output amplifiers muted during this operation. command instructs device fast forward from start current sector next marker. marker found within current sector device will increment next sequential sector continue looking.
device will continue fast forward this manner until either reached, command sent, memory array reached. When reached device will stop generate interrupt /INT pin. output amplifiers muted during this operation. PWRUP command causes device enter power mode internal clock frequency EXTCLK divider ratio. select Internal oscillator frequency bits according following binary values:
Sample rate
using external sample clock signal must also EXTCLK divider ratio. This divider ratio equal where integer between 256, excluding value should selected satisfy following equa-
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APR6008
tion closely possible: EXTCLK freq (128) (selected sampling frequency) Example: Suppose that sampling desired. Assume that frequency signal present EXTCLK 8MHz. 8000000 7.8125 8000 Rounding Code Parameter stream, composed bits A2][A1 A0], therefore becomes binary [00001000][10]. STOP Command causes device stop current operation. STOP_PWDN command causes device stop current command enter power down mode. During power down device consumes significantly less power. PWRUP command must used force device into power mode before commands executed. SET_REC command instructs device begin recording sector address specified. device will continue record until current sector reached. forthcoming command been received when sector reached device will loop back beginning same sector overwrite previously recorded material. next command another SET_REC command device will execute command immediately following current sector that audio information lost. more information section entitled Recording Audio Data. command instructs device begin recording current sector. command received before device reaches sector device will automatically increment next sequential sector continue recording. device will continue record this manner until memory exhausted STOP STOP_PWDN command received. more information section entitled Recording Audio Data. DIG_ERASE command erases data contained sector specified. Erase should done before recording voice signals into sector. Erase must done before storing digital data sector. DIG_WRITE command stores bits digital data specified sector. bits must written, partial usage sector possible. memory acts FIFO, first data shifted will first data shifted out. sector must erased using DIG_ERASE command BEFORE data written sector. more information storing digital data, section entitled Writing Digital Data. DIG_READ command instructs device retrieve digital data that previously written specified sector. first shifted first that written. last shifted last that written. more information reading digital data section entitled Reading Digital Data. SET_PLAY command instructs device begin playback specified sector. forthcoming command received, encountered, before sector reached device will loop back beginning same sector continue playback with noticeable audio output. next command another SET_PLAY PLAY command device will execute command immediately following current sector that playback present. more information section entitled Playing Back Audio Data. PLAY command instructs device begin playback current sector. forthcoming command received, encountered, before device reaches sector device will automatically increment next sequential sector continue playing. device will continue play this manner until memory exhausted STOP STOP_PWDN command received. more information section entitled Playing Back Audio Data.
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APR6008
Receiving Device Information
device communicates data user shifting data pin. device will shift data according timing parameters given figure device shift three different types data streams: Device status, Silicon user stored data. Device status silicon described next sections. Retrieval user data described Reading Digital Data section.
Figure
Data Timing
SCLK
TfcsDO
TfSCLK
ThzD0
Current Device Status (CDS)
described previous section, three different types data streams shifted data shifted pin. these steams current device status. will shifted unless previous command command. Figure shows format stream. first shifted out, Overflow flag. Overflow flag binary attempt made record beyond available memory. Overflow flag overflow occurred. This flag
cleared after been read. Data flag. flag when device stops playing, fast forwarding result memory. flag cleared after been read. Illegal Address flag. Illegal Address flag whenever illegal address sent device. Lbat flag. This flag when device senses supply voltage below specification. used should ignored. last fifteen bits represent address current last active sector.
Figure Format Stream
Last shifted First shifted Sector Address Lbat Illegal Address
Sector
Sector Address
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APR6008
Reading
Each device APR60XX series family contains embedded Silicon Identification (SID). read host processor identify which family family member being used. Reading device requires issuing OpCode commands; command followed other command, usually command. device will clock data command that follows command clocked Figure diagram that describes process necessary reading information.
Figure Timing
SCLK
utput
utpu
information follows format given Figure first shifted out, Overflow bit. Overflow binary attempt made record beyond available memory. Overflow overflow occurred. This cleared after been read. Data (EOD) bit. when device stops playing fast forwarding result memory. cleared after been read. Illegal Address Bit. Illegal Address whenever illegal address sent
device. Lbat bit. This when device senses supply voltage below specification. following five bits represent product family. APR60XX product family code binary 01000 shown Figure next four bits represent device code. APR6008 device code binary 0100 shown Figure last seven bits random data should ignored.
Figure Stream
Last shifted First shifted Illegal Address Lbat
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Ignore These Bits
Device Code APR6008 Device Code (Binary)
Product Family APR60XX Series Family (Binary)
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APR6008
Writing Digital Data
Digital data written into device using DIG_WRITE command. mixing analog data digital data within sector possible. Sectors through tested guaranteed digital storage. Other sectors, with exception sector 639, store data have been tested, thus guaranteed provide 100% good bits. This managed with error correction forward check-before-store methods. Issuing DIG_ERASE command sector will cause data throughout sectors lost. sector must erased, using DIG_ERASE command, before digital data written This requirement necessary whether analog data digital data previously stored sector. sector should erased more than once between analog digital write operations. Executing multiple erase operations sector will permanently damage sector. sector reallocated either analog storage digital storage time. process storing digital data begins sending DIG_WRITE command. DIG_WRITE command followed immediately four buffer bits. These bits will stored array must considered don't care bits. Immediately following four buffer bits should data that wish store. 3004 bits must stored. Four additional buffer bits must clocked into device following stored data. These bits will stored array must considered don't care bits. Ending digital write command early will permanently damage sector. will clock normal followed five don't care bits, copy 3004 data bits, finally three don't care bits. Figure shows timing diagram which describes digital storage process. timing with exception TpSCLK should adhere specifications given Figure Figure TpSCLK specification replaced DTpSCLK when storing digital data.
Note: DIG_ERASE command should used before storing analog data. device will perform internal erase before analog storage. Figure does show DIG_ERASE command which must executed sector before digital data stored.
Figure Writing Digital Data
SCLK
Total 3032 clock cycles
DIG_WRITECOMMAND
3004 bits data stored Four Don't Care Bits
Copy input data (delayed clock cycle)
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APR6008
Reading Digital Data
Digital data read from device using DIG_READ command. read data must send DIG_READ command immediately followed 3012 don't care bits during same cycle. data previously stored specified sector will begin appear after current device status four buffer bits. next 3004 bits previously stored data. first shifted first that written. last shifted last that written. There four random don't care bits following 3004 bits user data. incomplete read sector allowed. incomplete read defined read with less than 3032 clock cycles. incomplete read cycles require extra SCLK cycle after signal returns high. Figure shows timing diagram which describes entire process complete sector read. timing with exception TpSCLK should adhere specifications given Figure Figure TpSCLK specification replaced DTpSCLK when reading digital data.
Figure Reading Digital Data
SCLK
Total 3032 clock cycles
DIG_READ COMMAND
3012 don't Care Bits
3004 bits previously stored data
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APR6008
Recording Audio Data
When SET_REC command issued device will begin sampling storing data present ANAIN+ ANAIN- specified sector. After half sector used will drop indicate that command accepted. device will accept commands long remains low. command received after returns high will queued executed during next cycle. Figure shows typical timing diagram OpCode sequence recording operation. this example SET_REC command begins recording specified memory location after Tarec time passed. Some time later going edge alerts host processor that first sector nearly full. host processor responds issuing command before returns high. command instructs APR6008 continue recording sector immediately following current sector. When first sector full device automatically jumps next sector returns signal high state indicate that second sector being used. this point host processor decides issue STOP command during next cycle. device follows STOP command terminates recording after TSarec.The /BUSY indicates when actual recording taking place.
Figure Typical Recording Sequence
SCLK
SET_REC
STOP
ANAOUT+ ANAOUTANAOUT
Tarec
arec
/BUSY
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APR6008
Playing Back Audio Data
When SET_PLAY PLAY command issued device will begin sampling data specified sector produce resultant output AUDOUT, ANAOUT-, ANAOUT+ pins. After half sector used will drop indicate that command accepted. device will accept commands long remains low. command received after returns high will queued executed during next cycle. Figure shows typical timing diagram OpCode sequence playback operation. SET_PLAY command begins playback specified memory location after Taplay time passed. Some time later going edge alerts host processor that half first sector been played back. host processor responds issuing PLAY command during time. PLAY command instructs APR6008 continue playback sector immediately following current sector. When first sector been played back device jumps next sector returns signal high state indicate that second sector being played. this point host processor decides issue STOP command during next available time. device follows STOP command terminates playback after aplay. BUSY indicates when actual playback taking place.
Figure Typical Playback Sequence
SCLK
SET_PLAY
PLAY
STOP
ANAOUT+ ANAOUTANAOUT
Taplay
aplay
/BUSY
Note: Command timing scale
Handshaking signals
Several signals included device that allow handshaking. These signals simplify message management significantly depending message management scheme used. /INT signal used generate interrupts processor when attention required APR6008 This normally high goes when interrupt requested. interrupt generated whenever Overflow
occurs. interrupt also generated after PWRUP command battery sensed. signal used determine when device nearing current memory segment during either record, play forward operation. signal normally high state. signal goes after half currently active segment been played recorded. signal returns high state after entire segment been played recorded. microprocessor should sense
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APR6008
edge signal indicator that next segment needs selected, before signal returns high. Failing specify next command before current segment exhausted (either during recording playback) will result noticeable during playback. /BUSY indicates when device performing either play, record fast forward function. host microprocessor monitor busy confirm status these commands. Busy normally high goes while device busy. time governed length recording playback specified user.
Storage Technology
APR6008 stores voice signals sampling incoming voice data storing sampled signals directly into FLASH memory cells. Each FLASH cell support voltage ranges from levels. These discrete voltage levels equivalent eight (28=256) binary encoded values. During playback stored signals retrieved from memory, smoothed form continuous signal finally amplified before being external speaker amplifier.
Squelch
APR6008 equipped with internal squelch feature. Squelch circuit automatically attenuates output signal during quiet passages playback material. Muting output signal during quiet passages helps eliminate background noise. Background noise enter system number ways including: present original signal, natural noise present some power amplifier designs, induced through poorly filtered power supply. response time squelch circuit controlled time constant capacitor connected SQLCAP pin. recommended value this capacitor squelch feature disabled connecting SQLCAP VCC.
Sampling Rate Voice Quality
Nyquist Sampling Theorem requires that highest frequency component sampling system accommodate without introduction aliasing errors equal half sampling frequency. APR6008 automatically filters input, based selected sampling frequency, meet this requirement. Higher sampling rates increase recording bandwidth, hence voice quality, also more memory cells same amount recording time. APR6008 accommodates sampling rates high 8kHz.
Lower sampling rates less memory cells effectively active output /SQL goes whenever internal increase duration capabilities device, also reduce recording bandwidth. APR6008 allows sampling squelch activates. This signal used squelch output power amplifier. Squelching output amplifier results rates kHz. further reduction noise; especially when power ampliDesigners thus control quality/duration trade-off fier high gain loud volumes. controlling sampling frequency. Sampling frequency controlled using PWRUP command. This command change sampling frequency regardless whether internal oscillator used external clock used. APR6008 derives sampling clock from sources; internal external. clocking signal present EXTCLK input device will automatically this signal sampling clock source. input present EXTCLK input device automatically defaults internal clock source. When EXTCLK used should tied GND. internal clock divider provided that external clock signals divided down desired sampling rate. This allows high frequency signals into EXTCLK pin. Using this feature simplifies designs allowing clock already present system, opposed having generate externally divide down custom clock. Details programing clock divider described interface section under PWRUP paragraph. default power condition APR6008 internal oscillator sampling frequency kHz.
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APR6008
Sample Application
Figure shows sample application utilizing generic microcontroller interface message management. microcontroller uses three general purpose inputs play, record skip buttons. Five general purpose signals utilized interface. /RESET /BUSY signal used this design. output signal must amplified order drive speaker. Several vendors supply integrated speaker amplifiers that used this purpose. microphone amplifier recommended. Both blocks optional. Several vendors supply integrated microphone/AGC amplifiers that used this purpose.
Note that circuit simplified using SQLCAP signal peak detector signal.
Figure Sample Schematic using package
resistors Play Record I/O_1 I/O_2 I/O_3
Generic Microcontroller
2.2K
2.2K
Skip
I/O_6 I/O_4 /IRQ I/O_5 I/O_7 I/O_8
/INT
APR6008
Block
Pre-Amp
lifie
Speaker
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APR6008
Descriptions
Table three shows descriptions APR6008 device. pins listed numerical order with exception VCC, pins which listed table.
Table
Name
APR6008 Number Description
(Die)
Reference Figure
Functionality
/INT
Sector Address Control Output: This active output indicates when device nearing current segment. Interrupt Output: This active open drain output goes whenever device reaches message device overflows. When connected interrupt input host microcontroller this output used implement powerful message management options. External Clock Input: This input used feed device external sample clock instead using internal sampling clock. This should connected VSSA when use. Clock Input: Data clocked into device through upon rising edge this clock. Data clocked part through falling edge. Chip Select Input: This active input selects device currently active slave interface. When this high device tri-states ignores data pin. Data Input: input receives digital data input from bus. Data clocked rising edge SCLK input. Data Output: Data available after falling edge SCLK input. Negative Audio Output: This negative audio output playback prerecorded messages. This output usually negative input differential input power amplifier. power amplifier drives external speaker. Positive Audio Output: This positive audio output playback prerecorded messages. This output usually positive input differential input power amplifier. power amplifier drives external speaker. Reset Input: This active input clears internal address registers restores device power defaults. Single Ended Audio Output: This audio output playback prerecorded messages. This output usually input power amplifier driving external speaker. Squelch Capacitor I/O: This controls attack time squelch circuitry. Connect through capacitor enable squelch feature. capacitor's time constant will affect quickly squelch circuitry reacts. Connect this VCCA disable squelch feature. Squelch Output: This active output indicates when internal squelch circuitry activated. This signal used automatically squelch external power amplifier. Squelching external power amplifier result even greater reduction background noise. Inverting Analog Input: This input inverting input analog signal that user wishes record. When device used differential input configuration this should receive peak peak input coupled through 0.1uF capacitor. When device used single ended input configuration this input should tied VSSA through capacitor.
EXTCLK
SCLK
ANAOUT-
ANAOUT+
/RESET AUDOUT
SQLCAP
/SQL
ANAIN-
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APR6008
Name
(Die)
Reference Figure
Functionality
ANAIN+
Non-Inverting Analog Input: This input non-inverting input analog signal that user wishes record. When device used differential input configuration this should receive peak peak input coupled through capacitor. When device used single ended input configuration this should receive peak peak input coupled through capacitor. Busy Output: This active output during either record, playback fast forward operation. tri-stated otherwise. This connected indicate playback/record operation user. This also connected external microcontroller indication status playback, record, forward, digital operation. Digital Power Supply: This connection supplies power on-chip digital circuitry. This should connected power plane through via. This should also connected bypass close possible. Analog Power Supply: This connection supplies power on-chip analog circuitry. This should connected power plane through via. This should also connected bypass close possible. Analog Ground: These pins should connected ground plane through via. connection should made close possible. Digital Ground: This should connected ground plane through via. connection should made close possible. Connect: These pins should connected anything board. Connection these pins signal, result incorrect device behavior cause damage device.
/BUSY
VCCD
VCCA
VSSA VSSD
12,23
12,23
Electrical Characteristics
following tables list Absolute Maximum Ratings, Recom-
mended Characteristics, recommended Characteristics APR6008 device.
Absolute Maximum Ratings
Stresses greater than those listed Table cause permanent damage device. These specifications represent stress rating only. Operation device these other conditions above those specified recommended Characteristics recommended Characteristics this specification implied. Maximum conditions extended periods affect reliability.
Table
Absolute Maximum Ratings.
Item Symbol
Condition
Device <10s
-0.3
Unit
Power Supply voltage Input Voltage
-0.3
Storage Temperature Temperature Under Bias Lead Temperature
TSTG
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APR6008
Table Characteristics
Item
Operating Voltage
Symbol
VCCA VCCD
Condition
Unit
Operating Temperature Input High Voltage Input Voltage Output High Voltage
2.9V 3.3V 2.7V IOH=-1.6mA 2.7V IOL=1.0mA 3.3V VIH=VCC 3.3V VIL=VSS 3.3V VOUT=VCC VOUT=Vss 3.3V Recording Playback Idle
0.3V VCCD 0.5V
Output Voltage
Input Leakage Current
Input Leakage Current
Output Tristate Leakage Current
Operating Current Consumption
Standby Current Consumption
ICCS
3.3V After sec.
Table
Characteristics
Item Symbol
RANAIN GANAIN VANOUT Tpwrup TloRST TRdone Tfcs TsuDI TpSCLK ThDI TloSCLK 1kHz 45mV input min. specification 1000
Condition
Unit
mVP-P
ANAIN+ ANAIN- input voltage ANAIN+ input resistance ANAIN+/ANAIN- Gain ANAOUT Output Voltage Total Harmonic Distortion ready fall /RESET time Rise /RESET fall fall clock edge Data set-up time Period clock data hold time clock time
mVP-P
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APR6008
Item
clock high time Clock rising edge Fall output Fall SCLK data valid Rise high Period clock digital read, write
Symbol
ThiSCLK TrCS TfcsDO TfSCLK ThzDO DTpSCLK
Condition
Unit
1000 @4kHz Internal sample clock @8kHz Internal sample clock External sample clock @4kHz Internal sample clock @8kHz Internal sample clock External sample clock @4kHz Internal sample clock @8kHz Internal sample clock External sample clock @4kHz Internal sample clock @8kHz Internal sample clock External sample clock @4kHz Internal sample clock @8kHz Internal sample clock External sample clock REC, PLAY @4kHz REC, PLAY @8kHz REC, PLAY EXTCLK @4kHz @8kHz EXTCLK REC, PLAY @4kHz REC, PLAY @8kHz REC, PLAY EXTCLK @4kHz @8kHz EXTCLK @4kHz Internal sample clock @8kHz Internal sample clock External sample clock Equation Equation Equation Equation Equation Equation Equation Equation equation 0.25 0.125 Equation
First SET_REC command start recording Rise after STOP Command recording First SET_PLAY command audio output STOP after SET_PLAY PLAY audio output period
Tarec
TSarec
Taplay
TSaplay
TpSAC
time
TloSAC
Figure Table Figure Table Figure Table
Tnext1 Tnext2 Tnext3
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APR6008
Item
Figure Table
Symbol
Tnext4
Condition
Previous command SET_REC, REC, SET_PLAY, PLAY @4kHz Internal sample clock @8kHz Internal sample clock External sample clock Previous command SET_FWD, @4kHz Internal sample clock @8kHz Internal sample clock External sample clock Previous command Others @4kHz Internal sample clock @8kHz Internal sample clock External sample clock
Unit
Equation
1.25 0.625 Equation
Notes: ExternalClockPeriod Equation1 PrescalerValue 1504 ExternalClockPeriod Equation2 -PrescalerValue 3008 ExternalClockPeriod Equation3 -PrescalerValue ExternalClockPeriod Equation4 -PrescalerValue ExternalClockPeriod Equation5 -PrescalerValue ExternalClockPeriod Equation6 -PrescalerValue 1880 ExternalClockPeriod Equation7 -PrescalerValue ExternalClockPeriod Equation8 -PrescalerValue
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APR6008
Figure Bond Layout Coordinates
Origin
Coordinate
VSSA VSSA
VSSD VSSD
VSSA Coordinate AUDOUT SQLCAP
Connect substrate ground.
SCLK VCCD VCCD VCCD
SQLOUT ANAIN19 ANAIN+ VCCA
EXTCLK
Table Number
Coordinate Information Name Coordinate Coordinate 5149 2069 5149 1622 5149 1243 5149 VSSD 5149 VSSD 5149 4795 4412 ANAOUT560 ANAOUT+ /RESET VSSA VSSA VSSA 1113 AUDOUT 1426 SQLCAP 1834 /SQLOUT 2518 ANAIN108 2795 ANAIN+ 3066 VCCA 3397 VCCA 3627
VCCA
/INT
Number
Name /BUSY VSSA VSSA VSSA /INT EXTCLK VCCD VCCD VCCD SCLK
Coordinate Coordinate 4106 4106 4314 4106 4486 4106 4658 4106 4906 4106 5149 3777 5149 3478 5149 2992 5149 2760 5149 2588 5149 2362
SIZE 4340µm 5380µm SIZE 100µm 100µm THICKNESS Approximately mils
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CIRCUIT DIAGRAM
APPLICATION CIRCUIT DIAGRAM
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Voice Recording Playback Device
APR6008
APR6008 Pin-out Diagram

Voice Recording Playback Device Minute Duration Features Multi-le

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