128K 3.3V HIGH SPEED CENTER POWER CMOS SRAM Document Title 128K 3

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128K 3.3V HIGH SPEED CENTER POWER CMOS SRAM Document Title 128K 3

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LP61L1008 Series
128K 3.3V HIGH SPEED CENTER POWER CMOS SRAM
Document Title 128K 3.3V HIGH SPEED CENTER POWER CMOS SRAM Revision History
History
Product Family 32-pin sTSOP (Type package
Issue Date
June 2002
Remark
(June, 2002, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
128K 3.3V HIGH SPEED CENTER POWER CMOS SRAM
Features
Single 3.3V power supply Access times: 12/15 (max.) Current: Operating: 180mA (max.) Standby: (max.) Full static operation, clock refreshing required inputs outputs directly compatible Center Power/Ground Configuration Common using three-state output Output enable chip enable inputs easy application Data retention voltage: 2.0V (min.) Available 32-pin 32-pin sTSOP packages
General Description LP61L1008 high speed 1,048,576-bit static random access memory organized 131,072 words bits operates single 3.3V power supply.
Inputs three-state outputs compatible allow direct interfacing with common system structures. chip enable input provided POWER-DOWN device enable output enable input included easy interfacing. Data retention guaranteed power supply voltage 2.0V.
Product Family Product Family
LP61L1008 Operating Temperature 0°C~70°C Range 3.0V~3.6V
Power Dissipation Speed
12/15 Data Retention (ICCDR, Typ.) 10µA Standby (ISB1, Typ.) 20µA Operating (ICC2, Typ.) 66mA
Package Type sTSOP
Typical values measured 3.0V, 25°C 100% tested. Data retention current 2.0V.
Configuration
I/O1 I/O2 I/O3 I/O4 I/O0 I/O1 I/O2 I/O3
sTSOP
I/O8 I/O7 I/O6 I/O5
LP61L1008X
I/O7 I/O6 I/O5 I/O4
LP61L1008S
(June, 2002, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Block Diagram
4096 DECODER MEMORY ARRAY
I/O1 INPUT DATA CIRCUIT I/O8 COLUMN
CONTROL CIRCUIT
Description
Symbol Description Address Inputs
I/O1 I/O8
Write Enable Output Enable Chip Enable Data Input/Outputs
Power Supply Ground
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Recommended Operating Conditions
70°C) Symbol Parameter Supply Voltage Ground Input High Voltage Input Voltage Output Load Output Load Min. -0.3 Typ. Max. +0.8 Unit
Absolute Maximum Ratings*
-0.5V +4.6V IN/OUT Volt .-0.5V +0.5V Operating Temperature, Topr +70°C Storage Temperature, Tstg. -55°C +125°C Temperature Under Bias, Tbias. -10°C +85°C Power Dissipation, Pt.1.0W Soldering Temp. Time .260°C,
*Comments
Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage this device. These stress ratings only. Functional operation this device these other conditions above those indicated operational sections this specification implied intended. Exposure absolute maximum rating conditions extended periods affect device reliability.
Electrical Characteristics
Symbol
70°C, 3.3V 10%, LP61L1008-12/15 Unit Min. Max. Conditions
Parameter Input Leakage Current
Output Leakage Current
VI/O II/O 0.2V, 0.2V 0.2V
ICC1 ISB1
Dynamic Operating Current
Standby Power Supply Current Output Voltage Output High Voltage
Note: ICC1 dependent output loading, cycle rates, Read Write patterns.
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Truth Table
Mode Standby Output Disable Read Write Note: Operation High High DOUT Supply Current ISB, ISB1 ICC1 ICC1 ICC1
Capacitance 25°C, 1.0MHz)
Symbol CIN* CI/O* Parameter Input Capacitance Input/Output Capacitance Min. Max. Unit Conditions VI/O
These parameters sampled 100% tested.
Characteristics +70°C, 3.3V 10%,
Symbol Parameter LP61L1008-12 Min. Read Cycle tACE tCLZ tOLZ tCHZ tOHZ Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Output Valid Chip Enable Output Output Enable Output Chip Disable Output High Output Disable Output High Output Hold from Address Change Max. LP61L1008-15 Min. Max. Unit
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Characteristics (continued)
Symbol Parameter LP61L1008-12 Min. Write Cycle tWHZ Write Cycle Time Chip Enable Write Address Setup Time Write Address Valid Write Write Pulse Width Write Recovery Time Write Output High Data Write Time Overlap Data Hold from Write Time Output Active from Write Max. LP61L1008-15 Min. Max. Unit
Notes: tCHZ1, tCHZ2, tOHZ, tWHZ defined time which outputs achieve open circuit condition referred output voltage levels.
Timing Waveforms
Read Cycle
Address
DOUT
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Read Cycle
tACE tCLZ5
tCHZ5
DOUT
Read Cycle
Address
tOLZ5
tACE tCHZ5
DOUT
Notes: high Read Cycle. Device continuously enabled Address valid prior coincident with transition low. VIL. Transition measured ±500mV from steady state. This parameter sampled 100% tested.
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Timing Waveforms (continued)
Write Cycle (Write Enable Controlled)
Address tCW5 tWR3
tAS1
tWP2
tWHZ
DOUT
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Timing Waveforms (continued)
Write Cycle (Chip Enable Controlled)
Address tCW5 tAS1 tWR3
tCW5 tWP2
tWHZ7
DOUT
Notes: measured from address valid beginning Write. Write occurs during overlap (tWP) measured from earliest going high Write cycle. transition with transition after transition, outputs remain high impedance state. measured from later going Write. continuously low. VIL) Transition measured ±500mV from steady state. This parameter sampled 100% tested.
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Test Conditions
Input Pulse Levels Input Rise Fall Time Input Output Timing Reference Levels Output Load 3.0V 1.5V Figures
+3.3V Output ZO=50 RL=50 VT=1.5V 5pF*
Including scope jig.
Including scope jig.
Figure Output Load
Figure Output Load tCLZ, tOHZ, tOLZ, tCHZ, tWHZ,
Data Retention Characteristics 70°C)
Symbol Parameter Min. Max. Unit Conditions 0.2V 3.0V ICCDR1 Data Retention Current 0.2V 0.2V 0.2V
VDR1
Data Retention
tCDR
Chip Disable Data Retention Time
Retention Waveform
Operation Recovery Time
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Data Retention Waveform Controlled)
DATA RETENTION MODE 3.0V tCDR 3.0V
0.2V
Ordering Information
Part LP61L1008S-12 LP61L1008X-12 LP61L1008S-15 LP61L1008X-15 Access Time (ns) Operating Current Max. (mA) Standby Current Max. (mA) Package (300 mil) sTSOP (Type (300 mil) sTSOP (Type
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Package Information 32/32LD (300mil BODY) Outline Dimensions
unit: inches/mm
DETAIL BASE METAL WITH PLATING SECTION
DETAIL
SEATING PLANE
0.026"
0.004
Symbol
Dimensions inches Min. 0128 0.052 0.095 0.016 0.026 0.006 0.820 0.330 0.295 0.260 Nom. 0.132 0.100 0.018 0.028 0.008 0.825 0.335 0.300 0.267 0.050 Max. 0.140 0.105 0.020 0.032 0.012 0.830 0.340 0.305 0.274 0.048 0.004
Dimensions Min. 3.25 2.08 2.41 0.41 0.66 0.15 20.83 8.39 7.49 6.61 Nom. 3.35 2.54 0.46 0.71 0.20 20.96 8.51 7.62 6.78 1.27 Max. 3.56 2.67 0.51 0.81 0.30 21.08 8.63 7.75 6.96 1.22 0.10
Notes: maximum value dimension includes flash. Dimension doesn't include resin fins. Dimension Board surface mount pitch design reference only. Dimension includes flash.
(June, 2001, Version 2.0)
AMIC Technology, Inc.
LP61L1008 Series
Package Information sTSOP TYPE 13.4mm) Outline Dimensions
unit: inches/mm
Detail
Detail
0.076MM
SEATING PLANE
Dimensions inches Symbol 0.520 0.461 0.012 0.0275 0.002 0.037 0.007 0.0056 0.311 0.039 0.008 0.0059 0.315 0.020 0.528 0.465 0.020 0.0315 0.0109 0.535 0.469 0.028 0.0355 0.049 0.041 0.009 0.0062 0.319
Dimensions 0.05 0.95 0.17 0.142 7.90 1.00 0.20 0.150 8.00 0.50 13.20 11.70 0.30 0.700 13.40 11.80 0.50 0.800 0.278 13.60 11.90 0.70 0.900 1.25 1.05 0.23 0.158 8.10
Notes: maximum value dimension includes flash. Dimension does include resin fins. Dimension includes flash.
(June, 2001, Version 2.0)
AMIC Technology, Inc.

128K 3.3V HIGH SPEED CENTER POWER CMOS SRAM Document Title 128K 3

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