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8-bit with Bytes In-System Programmable Flash ATmega8 ATmega8L Summary


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8-bit with Bytes In-System Programmable Flash ATmega8 ATmega8L Summary
Rev. 2486MS-AVR-12/03
Note: This summary document. complete document available site www.atmel.com.
Configurations
PDIP
(RESET) (RXD) (TXD) (INT0) (INT1) (XCK/T0) (XTAL1/TOSC1) (XTAL2/TOSC2) (T1) (AIN0) (AIN1) (ICP1) (ADC5/SCL) (ADC4/SDA) (ADC3) (ADC2) (ADC1) (ADC0) AREF AVCC (SCK) (MISO) (MOSI/OC2) (SS/OC1B) (OC1A)
TQFP View
(INT0) (TXD) (RXD) (RESET) (ADC5/SCL) (ADC4/SDA) (ADC3) (ADC2)
(INT1) (XCK/T0) (XTAL1/TOSC1) (XTAL2/TOSC2)
(ADC1) (ADC0) ADC7 AREF ADC6 AVCC (SCK)
(INT0) (TXD) (RXD) (RESET) (ADC5/SCL) (ADC4/SDA) (ADC3) (ADC2)
(T1) (AIN0) (AIN1) (ICP1) (OC1A) (SS/OC1B) (MOSI/OC2) (MISO)
View
(INT1) (XCK/T0) (XTAL1/TOSC1) (XTAL2/TOSC2)
(ADC1) (ADC0) ADC7 AREF ADC6 AVCC (SCK)
ATmega8(L)
2486MS-AVR-12/03
(T1) (AIN0) (AIN1) (ICP1) (OC1A) (SS/OC1B) (MOSI/OC2) (MISO)
ATmega8(L)
Overview
ATmega8 low-power CMOS 8-bit microcontroller based RISC architecture. executing powerful instructions single clock cycle, ATmega8 achieves throughputs approaching MIPS MHz, allowing system designer optimize power consumption versus processing speed. Figure Block Diagram
XTAL1 RESET XTAL2
Block Diagram
PORTC DRIVERS/BUFFERS
PORTB DRIVERS/BUFFERS
PORTC DIGITAL INTERFACE
PORTB DIGITAL INTERFACE
AGND AREF PROGRAM COUNTER
INTERFACE
STACK POINTER
TIMERS/ COUNTERS
OSCILLATOR
PROGRAM FLASH
SRAM
INTERNAL OSCILLATOR
INSTRUCTION REGISTER
GENERAL PURPOSE REGISTERS
WATCHDOG TIMER
OSCILLATOR
INSTRUCTION DECODER
CTRL. TIMING
CONTROL LINES
INTERRUPT UNIT
STATUS REGISTER
EEPROM
PROGRAMMING LOGIC
USART
COMP. INTERFACE
PORTD DIGITAL INTERFACE
PORTD DRIVERS/BUFFERS
2486MS-AVR-12/03
core combines rich instruction with general purpose working registers. registers directly connected Arithmetic Logic Unit (ALU), allowing independent registers accessed single instruction executed clock cycle. resulting architecture more code efficient while achieving throughputs times faster than conventional CISC microcontrollers. ATmega8 provides following features: bytes In-System Programmable Flash with Read-While-Write capabilities, bytes EEPROM, byte SRAM, general purpose lines, general purpose working registers, three flexible Timer/Counters with compare modes, internal external interrupts, serial programmable USART, byte oriented Two-wire Serial Interface, 6-channel (eight channels TQFP packages) where four (six) channels have 10-bit accuracy channels have 8-bit accuracy, programmable Watchdog Timer with Internal Oscillator, serial port, five software selectable power saving modes. Idle mode stops while allowing SRAM, Timer/Counters, port, interrupt system continue functioning. Power-down mode saves register contents freezes Oscillator, disabling other chip functions until next Interrupt Hardware Reset. Power-save mode, asynchronous timer continues run, allowing user maintain timer base while rest device sleeping. Noise Reduction mode stops modules except asynchronous timer ADC, minimize switching noise during conversions. Standby mode, crystal/resonator Oscillator running while rest device sleeping. This allows very fast start-up combined with low-power consumption. device manufactured using Atmel's high density non-volatile memory technology. Flash Program memory reprogrammed In-System through serial interface, conventional non-volatile memory programmer, On-chip boot program running core. boot program interface download application program Application Flash memory. Software Boot Flash Section will continue while Application Flash Section updated, providing true Read-While-Write operation. combining 8-bit RISC with In-System SelfProgrammable Flash monolithic chip, Atmel ATmega8 powerful microcontroller that provides highly-flexible cost-effective solution many embedded control applications. ATmega8 supported with full suite program system development tools, including compilers, macro assemblers, program debugger/simulators, In-Circuit Emulators, evaluation kits.
Disclaimer
Typical values contained this datasheet based simulations characterization other microcontrollers manufactured same process technology. values will available after device characterized.
ATmega8(L)
2486MS-AVR-12/03
ATmega8(L)
Descriptions
Port (PB7.PB0) XTAL1/ XTAL2/TOSC1/TOSC2 Digital supply voltage. Ground. Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Depending clock selection fuse settings, used input inverting Oscillator amplifier input internal clock operating circuit. Depending clock selection fuse settings, used output from inverting Oscillator amplifier. Internal Calibrated Oscillator used chip clock source, PB7.6 used TOSC2.1 input Asynchronous Timer/Counter2 ASSR set. various special features Port elaborated "Alternate Functions Port page "System Clock Clock Options" page Port (PC5.PC0) Port 7-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. RSTDISBL Fuse programmed, used pin. Note that electrical characteristics differ from those other pins Port RSTDISBL Fuse unprogrammed, used Reset input. level this longer than minimum pulse length will generate Reset, even clock running. minimum pulse length given Table page Shorter pulses guaranteed generate Reset. various special features Port elaborated page Port (PD7.PD0) Port 8-bit bi-directional port with internal pull-up resistors (selected each bit). Port output buffers have symmetrical drive characteristics with both high sink source capability. inputs, Port pins that externally pulled will source current pull-up resistors activated. Port pins tri-stated when reset condition becomes active, even clock running. Port also serves functions various special features ATmega8 listed page RESET Reset input. level this longer than minimum pulse length will generate reset, even clock running. minimum pulse length given Table page Shorter pulses guaranteed generate reset.
PC6/RESET
2486MS-AVR-12/03
AVCC
AVCC supply voltage Converter, Port (3.0), (7.6). should externally connected VCC, even used. used, should connected through low-pass filter. Note that Port (5.4) digital supply voltage, VCC. AREF analog reference Converter. TQFP package, ADC7.6 serve analog inputs converter. These pins powered from analog supply serve 10-bit channels.
AREF ADC7.6 (TQFP Package Only)
ATmega8(L)
2486MS-AVR-12/03
ATmega8(L)
Register Summary
Address
0x3F (0x5F) 0x3E (0x5E) 0x3D (0x5D) 0x3C (0x5C) 0x3B (0x5B) 0x3A (0x5A) 0x39 (0x59) 0x38 (0x58) 0x37 (0x57) 0x36 (0x56) 0x35 (0x55) 0x34 (0x54) 0x33 (0x53) 0x32 (0x52) 0x31 (0x51) 0x30 (0x50) 0x2F (0x4F) 0x2E (0x4E) 0x2D (0x4D) 0x2C (0x4C) 0x2B (0x4B) 0x2A (0x4A) 0x29 (0x49) 0x28 (0x48) 0x27 (0x47) 0x26 (0x46) 0x25 (0x45) 0x24 (0x44) 0x23 (0x43) 0x22 (0x42) 0x21 (0x41) 0x20(1) (0x40)(1) 0x1F (0x3F) 0x1E (0x3E) 0x1D (0x3D) 0x1C (0x3C) 0x1B (0x3B) 0x1A (0x3A) 0x19 (0x39) 0x18 (0x38) 0x17 (0x37) 0x16 (0x36) 0x15 (0x35) 0x14 (0x34) 0x13 (0x33) 0x12 (0x32) 0x11 (0x31) 0x10 (0x30) 0x0F (0x2F) 0x0E (0x2E) 0x0D (0x2D) 0x0C (0x2C) 0x0B (0x2B) 0x0A (0x2A) 0x09 (0x29) 0x08 (0x28) 0x07 (0x27) 0x06 (0x26) 0x05 (0x25) 0x04 (0x24) 0x03 (0x23) 0x02 (0x22)
Name
SREG Reserved GICR GIFR TIMSK TIFR SPMCR TWCR MCUCR MCUCSR TCCR0 TCNT0 OSCCAL SFIOR TCCR1A TCCR1B TCNT1H TCNT1L OCR1AH OCR1AL OCR1BH OCR1BL ICR1H ICR1L TCCR2 TCNT2 OCR2 ASSR WDTCR UBRRH UCSRC EEARH EEARL EEDR EECR Reserved Reserved Reserved PORTB DDRB PINB PORTC DDRC PINC PORTD DDRD PIND SPDR SPSR SPCR UCSRA UCSRB UBRRL ACSR ADMUX ADCSRA ADCH ADCL TWDR TWAR
INT1 INTF1 OCIE2 OCF2 SPMIE TWINT
INT0 INTF0 TOIE2 TOV2 RWWSB TWEA
TICIE1 ICF1 TWSTA
OCIE1A OCF1A RWWSRE TWSTO
OCIE1B OCF1B BLBSET TWWC ISC11 WDRF
SP10 TOIE1 TOV1 PGWRT TWEN ISC10 BORF CS02
IVSEL PGERS ISC01 EXTRF CS01
IVCE TOIE0 TOV0 SPMEN TWIE ISC00 PORF CS00
Page
100, 101,
Timer/Counter0 Bits) Oscillator Calibration Register COM1A1 ICNC1 COM1A0 ICES1 COM1B1 COM1B0 WGM13 ACME FOC1A WGM12 FOC1B CS12 PSR2 WGM11 CS11 PSR10 WGM10 CS10
121,
Timer/Counter1 Counter Register High byte Timer/Counter1 Counter Register byte Timer/Counter1 Output Compare Register High byte Timer/Counter1 Output Compare Register byte Timer/Counter1 Output Compare Register High byte Timer/Counter1 Output Compare Register byte Timer/Counter1 Input Capture Register High byte Timer/Counter1 Input Capture Register byte FOC2 WGM20 COM21 COM20 WGM21 CS22 CS21 CS20 Timer/Counter2 Bits) Timer/Counter2 Output Compare Register URSEL URSEL EEAR7 UMSEL EEAR6 UPM1 EEAR5 WDCE UPM0 EEAR4 USBS EEAR3 EERIE EEAR2 EEMWE TCN2UB WDP2 UCSZ1 OCR2UB WDP1 UBRR[11:8] UCSZ0 EEAR1 EEWE UCPOL EEAR8 EEAR0 EERE TCR2UB WDP0
EEPROM Data Register
PORTB7 DDB7 PINB7 PORTD7 DDD7 PIND7 SPIF SPIE RXCIE REFS1 ADEN
PORTB6 DDB6 PINB6 PORTC6 DDC6 PINC6 PORTD6 DDD6 PIND6 WCOL TXCIE ACBG REFS0 ADSC
PORTB5 DDB5 PINB5 PORTC5 DDC5 PINC5 PORTD5 DDD5 PIND5 DORD UDRE UDRIE ADLAR ADFR
PORTB4 DDB4 PINB4 PORTC4 DDC4 PINC4 PORTD4 DDD4 PIND4 MSTR RXEN ADIF
PORTB3 DDB3 PINB3 PORTC3 DDC3 PINC3 PORTD3 DDD3 PIND3 CPOL TXEN ACIE MUX3 ADIE
PORTB2 DDB2 PINB2 PORTC2 DDC2 PINC2 PORTD2 DDD2 PIND2 CPHA UCSZ2 ACIC MUX2 ADPS2
PORTB1 DDB1 PINB1 PORTC1 DDC1 PINC1 PORTD1 DDD1 PIND1 SPR1 RXB8 ACIS1 MUX1 ADPS1
PORTB0 DDB0 PINB0 PORTC0 DDC0 PINC0 PORTD0 DDD0 PIND0 SPI2X SPR0 MPCM TXB8 ACIS0 MUX0 ADPS0
Data Register
USART Data Register
USART Baud Rate Register byte
Data Register High byte Data Register byte Two-wire Serial Interface Data Register TWA6 TWA5 TWA4 TWA3 TWA2 TWA1 TWA0 TWGCE
2486MS-AVR-12/03
Register Summary (Continued)
Address
0x01 (0x21) 0x00 (0x20)
Name
TWSR TWBR
TWS7
TWS6
TWS5
TWS4
TWS3
TWPS1
TWPS0
Page
Two-wire Serial Interface Rate Register
Notes:
Refer USART description details access UBRRH UCSRC. compatibility with future devices, reserved bits should written zero accessed. Reserved memory addresses should never written. Some Status Flags cleared writing logical them. Note that instructions will operate bits Register, writing back into flag read set, thus clearing flag. instructions work with registers 0x00 0x1F only.
ATmega8(L)
2486MS-AVR-12/03
ATmega8(L)
Instruction Summary
Mnemonics
ADIW SUBI SBCI SBIW ANDI MULS MULSU FMUL FMULS FMULSU RJMP IJMP RCALL ICALL RETI CPSE SBRC SBRS SBIC SBIS BRBS BRBC BREQ BRNE BRCS BRCC BRSH BRLO BRMI BRPL BRGE BRLT BRHS BRHC BRTS BRTC BRVS BRVC Rd,Rr Rd,Rr Rd,Rr Rd,K
Operands
Rdl,K Rdl,K Rd,K Rd,K Registers
Description
Operation
Flags
Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V Z,C,N,V Z,C,N,V,H Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V Z,N,V None None None None None None None N,V,C,H N,V,C,H N,V,C,H None None None None None None None None None None None None None None None None None None None None None None
#Clocks
1/2/3 1/2/3 1/2/3 1/2/3 1/2/3
ARITHMETIC LOGIC INSTRUCTIONS with Carry Registers Immediate Word Subtract Registers Subtract Constant from Register Subtract with Carry Registers Subtract with Carry Constant from Reg. Subtract Immediate from Word Logical Registers Logical Register Constant Logical Registers Logical Register Constant Exclusive Registers One's Complement Two's Complement Bit(s) Register Clear Bit(s) Register Increment Decrement Test Zero Minus Clear Register Register Multiply Unsigned Multiply Signed Multiply Signed with Unsigned Fractional Multiply Unsigned Fractional Multiply Signed Fractional Multiply Signed with Unsigned Relative Jump Indirect Jump Relative Subroutine Call Indirect Call Subroutine Return Interrupt Return Compare, Skip Equal Compare Compare with Carry Compare Register with Immediate Skip Register Cleared Skip Register Skip Register Cleared Skip Register Branch Status Flag Branch Status Flag Cleared Branch Equal Branch Equal Branch Carry Branch Carry Cleared Branch Same Higher Branch Lower Branch Minus Branch Plus Branch Greater Equal, Signed Branch Less Than Zero, Signed Branch Half Carry Flag Branch Half Carry Flag Cleared Branch Flag Branch Flag Cleared Branch Overflow Flag Branch Overflow Flag Cleared Rdh:Rdl Rdh:Rdl Rdh:Rdl Rdh:Rdl 0xFF 0x00 (0xFF 0xFF R1:R0 R1:R0 R1:R0
R1:R0 R1:R0
STACK STACK (Rr(b)=0) (Rr(b)=1) (P(b)=0) (P(b)=1) (SREG(s) then PCPC+k (SREG(s) then PCPC+k then then then then then then then then then then then then then then then then
R1:R0
BRANCH INSTRUCTIONS
Mnemonics
Operands
Description
Operation
Flags
#Clocks
2486MS-AVR-12/03
Instruction Summary (Continued)
BRIE BRID MOVW PUSH SWAP BSET BCLR Rd,Y+q Y+q,Rr Z+q,Rr Branch Interrupt Enabled Branch Interrupt Disabled Move Between Registers Copy Register Word Load Immediate Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect with Displacement Load Indirect Load Indirect Post-Inc. Load Indirect Pre-Dec. Load Indirect with Displacement Load Direct from SRAM Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect with Displacement Store Indirect Store Indirect Post-Inc. Store Indirect Pre-Dec. Store Indirect with Displacement Store Direct SRAM Load Program Memory Load Program Memory Load Program Memory Post-Inc Store Program Memory Port Port Push Register Stack Register from Stack Register Clear Register Logical Shift Left Logical Shift Right Rotate Left Through Carry Rotate Right Through Carry Arithmetic Shift Right Swap Nibbles Flag Flag Clear Store from Register load from Register Carry Clear Carry Negative Flag Clear Negative Flag Zero Flag Clear Zero Flag Global Interrupt Enable Global Interrupt Disable Signed Test Flag Clear Signed Test Flag Twos Complement Overflow. Clear Twos Complement Overflow SREG then then Rd+1:Rd Rr+1:Rr (X), (Y), (Z), (Z), R1:R0 STACK STACK I/O(P,b) I/O(P,b) Rd(n+1) Rd(n), Rd(0) Rd(n) Rd(n+1), Rd(7) Rd(0)C,Rd(n+1) Rd(n),CRd(7) Rd(7)C,Rd(n) Rd(n+1),CRd(0) Rd(n) Rd(n+1), n=0.6 Rd(3.0)Rd(7.4),Rd(7.4)Rd(3.0) SREG(s) SREG(s) Rr(b) Rd(b) None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None None Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V Z,C,N,V None SREG(s) SREG(s) None DATA TRANSFER INSTRUCTIONS
BIT-TEST INSTRUCTIONS
Mnemonics
Operands
Description
Operation
Flags
#Clocks
ATmega8(L)
2486MS-AVR-12/03
ATmega8(L)
Instruction Summary (Continued)
Clear SREG Half Carry Flag SREG Clear Half Carry Flag SREG
CONTROL INSTRUCTIONS SLEEP
Operation Sleep Watchdog Reset
(see specific descr. Sleep function) (see specific descr. WDR/timer)
None None None
2486MS-AVR-12/03
Ordering Information
Speed (MHz) Power Supply Ordering Code ATmega8L-8AC ATmega8L-8PC ATmega8L-8MC ATmega8L-8AI ATmega8L-8PI ATmega8L-8MI ATmega8-16AC ATmega8-16PC ATmega8-16MC ATmega8-16AI ATmega8-16PI ATmega8-16MI Note: Package 28P3 32M1-A 28P3 32M1-A 28P3 32M1-A 28P3 32M1-A Operation Range Commercial (0°C 70°C) Industrial (-40°C 85°C) Commercial (0°C 70°C) Industrial (-40°C 85°C)
This device also supplied wafer form. Please contact your local Atmel sales office detailed ordering information minimum quantities.
Package Type 28P3 32M1-A 32-lead, Thin (1.0 Plastic Quad Flat Package (TQFP) 28-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 32-pad, body, Lead Pitch 0.50 Micro Lead Frame Package (MLF)
ATmega8(L)
2486MS-AVR-12/03
ATmega8(L)
Packaging Information
IDENTIFIER
0°~7°
COMMON DIMENSIONS (Unit Measure SYMBOL 0.05 0.95 8.75 6.90 8.75 6.90 0.30 0.09 0.45 1.00 9.00 7.00 9.00 7.00 0.80 1.20 0.15 1.05 9.25 7.10 9.25 7.10 0.45 0.20 0.75 Note Note NOTE
Notes:
This package conforms JEDEC reference MS-026, Variation ABA. Dimensions include mold protrusion. Allowable protrusion 0.25 side. Dimensions maximum plastic body size dimensions including mold mismatch. Lead coplanarity 0.10 maximum.
10/5/2001 2325 Orchard Parkway Jose, 95131 TITLE 32A, 32-lead, Body Size, Body Thickness, Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) DRAWING REV.
2486MS-AVR-12/03
28P3
SEATING PLANE
PLACES)
SYMBOL
COMMON DIMENSIONS (Unit Measure 0.508 34.544 7.620 7.112 0.381 1.143 0.762 3.175 0.203 4.5724 34.798 8.255 7.493 0.533 1.397 1.143 3.429 0.356 10.160 Note Note NOTE
Note:
Dimensions include mold Flash Protrusion. Mold Flash Protrusion shall exceed 0.25 (0.010").
2.540
09/28/01 2325 Orchard Parkway Jose, 95131 TITLE 28P3, 28-lead (0.300"/7.62 Wide) Plastic Dual Inline Package (PDIP) DRAWING 28P3 REV.
ATmega8(L)
2486MS-AVR-12/03
ATmega8(L)
32M1-A
SIDE VIEW
VIEW
0.08
COMMON DIMENSIONS (Unit Measure SYMBOL 0.80 0.90 0.02 0.65 0.20 0.18 0.23 5.00 4.75 2.95 3.10 5.00 4.75BSC 2.95 3.10 0.50 0.30 0.40 0.50 0.60 3.25 3.25 0.30 1.00 0.05 1.00 NOTE
BOTTOM VIEW
Notes: JEDEC Standard MO-220, Fig. (Anvil Singulation), VHHD-2.
01/15/03 2325 Orchard Parkway Jose, 95131 TITLE 32M1-A, 32-pad, Body, Lead Pitch 0.50 Micro Lead Frame Package (MLF) DRAWING 32M1-A REV.
2486MS-AVR-12/03
Erratas
ATmega8 Rev.
revision letter this section refers revision ATmega8 device. CKOPT Does Enable Internal Capacitors XTALn/TOSCn Pins when Oscillator Used Clock Asynchronous Timer/Counter2 CKOPT Does Enable Internal Capacitors XTALn/TOSCn Pins when Oscillator Used Clock Asynchronous Timer/Counter2 When internal Oscillator used main clock source, possible Timer/Counter2 asynchronously connecting Oscillator between XTAL1/TOSC1 XTAL2/TOSC2. when internal Oscillator selected main clock source, CKOPT Fuse does control internal capacitors XTAL1/TOSC1 XTAL2/TOSC2. long there capacitors connected XTAL1/TOSC1 XTAL2/TOSC2, safe operation Oscillator guaranteed. Problem fix/Workaround external capacitors range XTAL1/TOSC1 XTAL2/TOSC2. This will fixed ATmega8 Rev. where CKOPT Fuse will control internal capacitors also when internal Oscillator selected main clock source. ATmega8 Rev. CKOPT (programmed) will enable internal capacitors XTAL1 XTAL2. Customers want compatibility between Rev. older revisions, must ensure that CKOPT unprogrammed (CKOPT
ATmega8(L)
2486MS-AVR-12/03
ATmega8(L)
Datasheet Change ATmega8
Changes from Rev. 2486K-08/03 Rev. 2486L-10/03 Changes from Rev. 2486K-08/03 Rev. 2486L-10/03
This document contains changes made datasheet ATmega8.
page numbers refers this document. Updated "Calibrated Internal Oscillator" page page numbers refers this document. Removed "Preliminary" TBDs from datasheet. Renamed ICP1 datasheet. Removed instructions CALL from datasheet. Updated tRST Table page Table page Table page Table page 241. Replaced text "XTAL1 XTAL2 should left unconnected (NC)" after Table "Calibrated Internal Oscillator" page Added text regarding XTAL1/XTAL2 CKOPT Fuse "Timer/Counter Oscillator" page Updated Watchdog Timer code examples "Timed Sequences Changing Configuration Watchdog Timer" page Removed ADHSM, from "Special Function Register SFIOR" page Added note Figure page 212. Updated item "Serial Programming Algorithm" page 233. Added tWD_FUSE Table page updated Read Calibration Byte, Byte Table page 235. Updated Absolute Maximum Ratings* Characteristics "Electrical Characteristics" page 237.
Changes from Rev. 2486J-02/03 Rev. 2486K-08/03
page numbers refers this document. Updated VBOT values Table page Updated "ADC Characteristics" page 243. Updated "ATmega8 Typical Characteristics" page 244. Updated "Erratas" page
Changes from Rev. 2486I-12/02 Rev. 2486J-02/03
page numbers refers this document.
2486MS-AVR-12/03
Improved description "Asynchronous Timer Clock clkASY" page Removed reference "Multipurpose Oscillator" application note Crystal Oscillator" application note, which exist. Corrected waveforms Figure page Various minor Timer corrections. Various minor corrections. Added note under "Filling Temporary Buffer (Page Loading)" page about writing EEPROM during Page load. Removed ADHSM completely. Added section "EEPROM Write during Power-down Sleep Mode" page Removed XTAL1 XTAL2 description page because they were already described part "Port (PB7.PB0) XTAL1/ XTAL2/TOSC1/TOSC2" page Improved table under "SPI Timing Characteristics" page removed table under "SPI Serial Programming Characteristics" page 236. Corrected "Alternate Functions Port page Corrected "Alternate Functions Port page Corrected 230.4 Mbps 230.4 kbps under "Examples Baud Rate Setting" page 156. Added information about symmetry Timer "Phase Correct Mode" page 111. Added thick lines around accessible registers Figure page 166. Changed "will ignored" "must written zero" unused Z-pointer bits under "Performing Page Write" page 213. Added note RSTDISBL Fuse Table page 220. 18.Updated drawings "Packaging Information" page
Changes from Rev. 2486H-09/02 Rev. 2486I-12/02 Changes from Rev. 2486G-09/02 Rev. 2486H-09/02
1.Added errata page
1.Changed Endurance Flash 10,000 Write/Erase Cycles.
ATmega8(L)
2486MS-AVR-12/03
ATmega8(L)
Changes from Rev. 2486F-07/02 Rev. 2486G-09/02 Changes from Rev. 2486E-06/02 Rev. 2486F-07/02
page numbers refers this document. Updated Table 103, "ADC Characteristics," page 243.
page numbers refers this document. Changes "Digital Input Enable Sleep Modes" page Addition OCS2 "MOSI/OC2 Port page following tables been updated: Table "CPOL CPHA Functionality," page 129, Table "UCPOL Settings," page 155, Table "Analog Comparator Multiplexed Input(1)," page 192, Table "ADC Conversion Time," page 197, Table "Input Channel Selections," page 203, Table "Explanation Different Variables used Figure Mapping Z-pointer," page 218. Changes "Reading Calibration Byte" page 230.
Corrected Errors Cross References.
Changes from Rev. 2486D-03/02 Rev. 2486E-06/02
page numbers refers this document. Updated Some Preliminary Test Limits Characterization Data following tables have been updated: Table "Reset Characteristics," page Table "Internal Voltage Reference Characteristics," page Characteristics page 237, Table "ADC Characteristics," page 243. Changes External Clock Frequency Added description "External Clock" page Added period changing data Table "External Clock Drive," page 239. Updated Chapter More details regarding rate prescaler Table "TWI Rate Prescaler," page 170.
Changes from Rev. 2486C-03/02 Rev. 2486D-03/02
page numbers refers this document. Updated Typical Start-up Times. following tables been updated: Table "Start-up Times Crystal Oscillator Clock Selection," page Table "Start-up Times Low-frequency Crystal Oscillator Clock Selection," page Table "Start-up Times External Oscillator Clock Selection," page Table "Start-up Times External Clock Selection," page Added "ATmega8 Typical Characteristics" page 244.
2486MS-AVR-12/03
Changes from Rev. 2486B-12/01 Rev. 2486C-03/02
page numbers refers this document. Updated Chapter. More details regarding Power-down operation using Master with TWBRR values added into datasheet. Added note "Bit Rate Generator Unit" page 167. Added description "Address Match Unit" page 167. Updated Description OSCCAL Calibration Byte. datasheet, explained take advantage calibration bytes Oscillator selections. This added following sections: Improved description "Oscillator Calibration Register OSCCAL" page "Calibration Byte" page 221. Added Some Preliminary Test Limits Characterization Data. Removed some TBD's following tables pages: Table page Table page Table page Table page 2.7V 5.5V (unless otherwise noted)" page 237, Table page 239, Table page 241. Updated Programming Figures. Figure page Figure page updated also reflect that AVCC must connected during Programming mode. Added Description Enter Parallel Programming Mode RESET Disabled External Oscillators Selected. Added note section "Enter Programming Mode" page 224.
ATmega8(L)
2486MS-AVR-12/03
Atmel Corporation
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Memory
2325 Orchard Parkway Jose, 95131, Tel: 1(408) 441-0311 Fax: 1(408) 436-4314
RF/Automotive
Theresienstrasse Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, 80906, Tel: 1(719) 576-3300 Fax: 1(719) 540-1759
Regional Headquarters
Europe
Atmel Sarl Route Arsenaux Case Postale CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500
Microcontrollers
2325 Orchard Parkway Jose, 95131, Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Chantrerie 70602 44306 Nantes Cedex France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60
Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom
Avenue Rochepleine 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80
Asia
Room 1219 Chinachem Golden Plaza Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369
ASIC/ASSP/Smart Cards
Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, 80906, Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743
Japan
Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581
Literature Requests
www.atmel.com/literature
Disclaimer: Atmel Corporation makes warranty products, other than those expressly contained Company's standard warranty which detailed Atmel's Terms Conditions located Company's site. Company assumes responsibility errors which appear this document, reserves right change devices specifications detailed herein time without notice, does make commitment update information contained herein. licenses patents other intellectual property Atmel granted Company connection with sale Atmel products, expressly implication. Atmel's products authorized critical components life support devices systems.
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