512K (64K 3-volt Only Flash Memory AT29LV512 Description AT2

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512K (64K 3-volt Only Flash Memory AT29LV512 Description AT2

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Single Supply Voltage, Range 3.6V 3-volt Only Read Write Operation Software Protected Programming Low-power Dissipation Active Current CMOS Standby Current Fast Read Access Time Sector Program Operation Single-cycle Reprogram (Erase Program) Sectors (128 Bytes/Sector) Internal Address Data Latches Bytes Fast Sector Program Cycle Time Max. Internal Program Control Timer DATA Polling Program Detection Typical Endurance 10,000 Cycles CMOS Compatible Inputs Outputs Commercial Industrial Temperature Ranges
512K (64K 3-volt Only Flash Memory AT29LV512
Description
AT29LV512 3-volt-only in-system Flash programmable erasable read-only memory (PEROM). 512K memory organized 65,536 words bits. Manufactured with Atmel's advanced nonvolatile CMOS technology, device offers access times with power dissipation just over commercial temperature range. When device deselected, CMOS standby current less than device endurance such that sector typically written excess 10,000 times.
Configurations
Name I/O0 I/O7 Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs Connect
TSOP View Type
I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0
PLCC View
I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O0 I/O7
Rev. 0177M-05/02
allow simple in-system reprogrammability, AT29LV512 does require high input voltages programming. Three-volt-only commands determine operation device. Reading data device similar reading from EPROM. Reprogramming AT29LV512 performed sector basis; bytes data loaded into device then simultaneously programmed. During reprogram cycle, address locations bytes data captured microprocessor speed internally latched, freeing address data other operations. Following initiation program cycle, device will automatically erase sector then program latched data using internal control timer. program cycle detected DATA polling I/O7. Once program cycle been detected, access read program begin.
Block Diagram
Device Operation
READ: AT29LV512 accessed like EPROM. When high, data stored memory location determined address pins asserted outputs. outputs high impedance state whenever high. This dual-line control gives designers flexibility preventing contention. SOFTWARE DATA PROTECTION PROGRAMMING: AT29LV512 individual sectors, each bytes. Using software data protection feature, byte loads used enter bytes sector programmed. AT29LV512 only programmed reprogrammed using software data protection feature. device programmed sector basis. byte data within sector changed, data entire 128-byte sector must loaded into device. AT29LV512 automatically does sector erase prior loading data into sector. erase command required. Software data protection protects device from inadvertent programming. series three program commands specific addresses with specific data must presented device before programming occur. After writing three-byte command sequence (and after tWC), entire device protected. same three program commands must begin each program operation. software program commands must obey sector program timing specifications. Power transitions will reset software data protection feature; however, software feature will guard against inadvertent program cycles during power transitions.
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AT29LV512
attempt write device without 3-byte command sequence will start internal write timers. data will written device; however, duration tWC, read operation will effectively polling operation. After software data protection's 3-byte command code given, byte load performed applying pulse input with (respectively) high. address latched falling edge whichever occurs last. data latched first rising edge bytes data must loaded into each sector. byte that loaded during programming sector will erased read FFh. Once bytes sector loaded into device, they simultaneously programmed during internal programming period. After first data byte been loaded into device, successive bytes entered same manner. Each byte programmed must have high-to-low transition within low-to-high transition preceding byte. high-to-low transition detected within last low-to-high transition, load period will internal programming period will start. specify sector address. sector address must valid during each high-to-low transition CE). specify byte address within sector. bytes loaded order; sequential loading required. Once programming operation been initiated, duration tWC, read operation will effectively polling operation. HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs AT29LV512 following ways: sense below 1.8V (typical), program function inhibited; power delay once reached sense level, device will automatically time (typical) before programming; Program inhibit holding low, high high inhibits program cycles; Noise filter pulses less than (typical) inputs will initiate program cycle. INPUT LEVELS: While operating with 3.3V ±10% power supply, address inputs control inputs (OE, driven from 5.5V without adversely affecting operation device. lines only driven from volts. PRODUCT IDENTIFICATION: product identification mode identifies device manufacturer Atmel. accessed hardware software operation. hardware operation mode used external programmer identify correct programming algorithm Atmel product. addition, users wish software product identification mode identify part (i.e., using device code), have system software appropriate sector size program operations. this manner, user have common board design 256K 4-megabit densities and, with each density's sector size memory map, have system software apply appropriate sector size. details, Operating Modes (for hardware operation) Software Product Identification. manufacturer device code same both modes. DATA POLLING: AT29LV512 features DATA polling indicate program cycle. During program cycle attempted read last byte loaded will result complement loaded data I/O7. Once program cycle been completed, true data valid outputs next cycle begin. DATA polling begin time during program cycle.
0177M-05/02
TOGGLE BIT: addition DATA polling AT29LV512 provides another method determining program erase cycle. During program erase operation, successive attempts read data from device will result I/O6 toggling between zero. Once program cycle completed, I/O6 will stop toggling valid data will read. Examining toggle begin time during program cycle. OPTIONAL CHIP ERASE MODE: entire device erased using 6-byte software code. Please Software Chip Erase application note details.
Absolute Maximum Ratings*
Temperature Under Bias. -55°C +125°C Storage Temperature -65°C +150°C Input Voltages (including Pins) with Respect Ground .-0.6V +6.25V Output Voltages with Respect Ground .-0.6V 0.6V Voltage (including Pins) with Respect Ground .-0.6V +13.5V *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions beyond those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability
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AT29LV512
Operating Range
AT29LV512-12 Operating Temperature (Case) Power Supply(1) Notes: Com. Ind. 70°C -40°C 85°C 3.3V 0.3V AT29LV512-15 70°C -40°C 85°C 3.3V 0.3V AT29LV512-20 70°C -40°C 85°C 3.3V 0.3V AT29LV512-25 70°C -40°C 85°C 3.3V 0.3V
After power applied minimum specified data sheet value, system should wait before operational mode started. recommended Designs.
Operating Modes
Mode Read Program Standby/Write Inhibit Program Inhibit Program Inhibit Output Disable Product Identification Hardware VIL, H(3), VIL, VH(3), Software(5) Notes: Refer Programming Waveforms. 12.0V 0.5V. Manufacturer Code Device Code details under Software Product Identification Entry/Exit. Manufacturer Code(4) Device Code(4) Manufacturer Code(4) Device Code(4) X(1) High DOUT High
Characteristics
Symbol ISB1 Parameter Input Load Current Output Leakage Current Standby Current CMOS Condition VI/O 0.3V Com. Ind. ISB2 Standby Current Active Current Input Voltage Input High Voltage Output Voltage Output High Voltage 3.0V -100 3.0V 0.45 2.0V MHz; IOUT 3.6V Units
0177M-05/02
Read Characteristics
AT29LV512-12 Symbol tACC tCE(1) tOE(2)
(3)(4)
AT29LV512-15
AT29LV512-20
AT29LV512-25 Units
Parameter Address Output Delay Output Delay Output Delay Output Float Output Hold from Address, whichever occurred first
Note:
recommended Designs.
Read Waveforms(1)(2)(3)(4)
Notes:
delayed tACC after address transition without impact tACC. delayed after falling edge without impact tACC after address change without impact tACC. specified from whichever occurs first pF). This parameter characterized 100% tested.
Input Test Waveforms Measurement Level
Output Test Load
AT29LV512
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Capacitance
MHz, 25°C(1)
Symbol COUT Note: Units Conditions VOUT
These parameters characterized 100% tested.
Byte Load Characteristics
Symbol tAS, tOES tDH, tOEH tWPH Parameter Address, Set-up Time Address Hold Time Chip Select Set-up Time Chip Select Hold Time Write Pulse Width Data Set-up Time Data, Hold Time Write Pulse Width High Units
Byte Load Waveforms(1)(2)
Controlled
Controlled
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Program Cycle Characteristics
Symbol tBLC tWPH Parameter Write Cycle Time Address Set-up Time Address Hold Time Data Set-up Time Data Hold Time Write Pulse Width Byte Load Cycle Time Write Pulse Width High Units
Software Protected Program Waveform(1)(2)(3)
Notes:
must high when both low. through must specify sector address during each high-to-low transition after software code been entered. bytes that loaded within sector being programmed will indeterminate.
Programming Algorithm(1)
LOAD DATA ADDRESS 5555
LOAD DATA ADDRESS 2AAA
LOAD DATA ADDRESS 5555
WRITES ENABLED
LOAD DATA SECTOR (128 BYTES)(3)
ENTER DATA PROTECT STATE(2)
Notes:
Data Format: I/O7 I/O0 (Hex); Address Format: (Hex). Data Protect state will re-activated program cycle. bytes data MUST loaded.
AT29LV512
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Data Polling Characteristics(1)
Symbol tOEH Notes: Parameter Data Hold Time Hold Time Output Delay(2) Write Recovery Time These parameters characterized 100% tested. spec Read Characteristics. Units
Data Polling Waveforms
Toggle Characteristics(1)
Symbol tOEH tOEHP Notes: Parameter Data Hold Time Hold Time Output Delay(2) High Pulse Write Recovery Time These parameters characterized 100% tested. spec Read Characteristics. Units
Toggle Waveforms(1)(3)
Notes:
Toggling either both will operate toggle bit. Beginning ending state I/O6 will vary. address location used address should vary.
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Software Product Identification Entry(1)
LOAD DATA ADDRESS 5555
LOAD DATA ADDRESS 2AAA
LOAD DATA ADDRESS 5555
PAUSE
ENTER PRODUCT IDENTIFICATION MODE(2)(3)(5)
Notes:
Data Format: I/O7 I/O0 (Hex); Address Format: (Hex). VIL. Manufacturer Code read VIL; Device Code read VIH. device does remain identification mode powered down. device returns standard operation mode. Manufacturer Code Device Code
Software Product Identification Exit(1)
LOAD DATA ADDRESS 5555
LOAD DATA ADDRESS 2AAA
LOAD DATA ADDRESS 5555
PAUSE
EXIT PRODUCT IDENTIFICATION MODE(4)
AT29LV512
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AT29LV512
Ordering Information
tACC (ns) (mA) Active Standby 0.04 0.05 0.04 0.05 0.04 0.05 0.04 0.05 Ordering Code AT29LV512-12JC AT29LV512-12TC AT29LV512-12JI AT29LV512-12TI AT29LV512-15JC AT29LV512-15TC AT29LV512-15JI AT29LV512-15TI AT29LV512-20JC AT29LV512-20TC AT29LV512-20JI AT29LV512-20TI AT29LV512-25JC AT29LV512-25TC AT29LV512-25JI AT29LV512-25TI Package Operation Range Commercial 70°C) Industrial (-40° 85°C) Commercial 70°C) Industrial (-40° 85°C) Commercial 70°C) Industrial (-40° 85°C) Commercial 70°C) Industrial (-40° 85°C)
Note:
recommended Designs.
Package Type 32-lead, Plastic J-leaded Chip Carrier (PLCC) 32-lead, Thin Small Outline Package (TSOP)
0177M-05/02
Packaging Information
PLCC
1.14(0.045)
IDENTIFIER
1.14(0.045) 0.318(0.0125) 0.191(0.0075)
0.51(0.020)MAX (3X)
COMMON DIMENSIONS (Unit Measure SYMBOL
3.175 1.524 0.381 12.319 11.354 9.906 14.859 13.894 12.471 0.660 0.330
1.270
3.556 2.413 12.573 11.506 10.922 15.113 14.046 13.487 0.813 0.533
NOTE
Note
Notes:
This package conforms JEDEC reference MS-016, Variation Dimensions include mold protrusion. Allowable protrusion .010"(0.254 side. Dimension include mold mismatch measured extreme material condition upper lower parting line. Lead coplanarity 0.004" (0.102 maximum.
Note
10/04/01 2325 Orchard Parkway Jose, 95131 TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) DRAWING REV.
AT29LV512
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AT29LV512
TSOP
Identifier
SEATING PLANE
GAGE PLANE
SYMBOL Notes: This package conforms JEDEC reference MO-142, Variation Dimensions include mold protrusion. Allowable protrusion 0.15 side 0.25 side. Lead coplanarity 0.10 maximum.
COMMON DIMENSIONS (Unit Measure 0.05 0.95 19.80 18.30 7.90 0.50 1.00 20.00 18.40 8.00 0.60 0.25 BASIC 0.17 0.10 0.22 0.50 BASIC 0.27 0.21 1.20 0.15 1.05 20.20 18.50 8.10 0.70 Note Note NOTE
10/18/01 2325 Orchard Parkway Jose, 95131 TITLE 32T, 32-lead Package) Plastic Thin Small Outline Package, Type (TSOP) DRAWING REV.
0177M-05/02
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Atmel Corporation 2002. Atmel Corporation makes warranty products, other than those expressly contained Company's standard warranty which detailed Atmel's Terms Conditions located Company's site. Company assumes responsibility errors which appear this document, reserves right change devices specifications detailed herein time without notice, does make commitment update information contained herein. licenses patents other intellectual property Atmel granted Company connection with sale Atmel products, expressly implication. Atmel's products authorized critical components life support devices systems. ATMEL registered trademarks Atmel. Other terms product names trademarks others. Printed recycled paper.
0177M-05/02/xM

512K (64K 3-volt Only Flash Memory AT29LV512 Description AT2

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