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LC5812 4-Bit Microcomputer with Internal Driver Overview


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Ordering number:ENN2058A
LC5812
4-Bit Microcomputer with Internal Driver
Overview
LC5812 series models 4-bit, single-chip, high-performance microcomputers equipped with drivers. They produced CMOS technology. Their numerous features include low-voltage operation current drain. parallel-processing ALU, program memory (ROM), data memory (RAM), input output ports, timer, clock generator, drivers, among other things, integrated single chip. instructions, including operation processing instructions executable 4-bit units various conditional branch instructions driver data transfer instructions form easy-to-use effective instruction system. HALT mode user readily implement clock function during low-power dissipation. minimize current required, overall internal operation stopped except oscillation frequency divider circuits drivers. HOLD mode operation system clock oscillation stopped that current drain becomes much less. LC5812 very useful controlling electronic tuners, cameras, other portable devices voltage, with power dissipation.
Package Dimensions
unit:mm 3044B-QIP80A
[LC5812]
26.0 20.0
0.15
0.35
20.0
14.0
0.35
2.45max
2.15
22.6
SANYO QIP80A
Features
wide supply voltage range
Cycle time LC5812 122µs 122µs LC5812H 61µs 40µs 20µs Supply voltage range VSS2=-2.0 -3.6V VSS2=-2.0 -5.0V VSS2=-2.3 -5.0V VSS2=-3.5 -5.0V VSS2=-4.5 -5.0V Remarks crystal crystal crystal 400k ceramic resonator 800k ceramic resonator
Continued next page.
SANYO products described contained herein have specifications that handle applications that require extremely high levels reliability, such life-support systems, aircraft's control systems, other applications whose failure reasonably expected result serious physical and/or material damage. Consult with your SANYO representative nearest before using SANYO products described contained herein such applications. SANYO assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges,or other parameters) listed products specifications SANYO products described contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
N3001TN (KT)/3029TA/D1961KI/9115KI, No.2058-1/17
16.6
LC5812
Continued from preceding page.
Micro-level oprerating current. Only micro-level current needed operate equipment HALT function used efficiently. Although exact current drain depends oscillation frequency (and oscillator) program structure, typical current requirement about clock program optimum technique used design program. Enhanced HALT/HOLD release interrupt functions. Five types HALT/HOLD release functions five types interrupt functions. External interrupt function (included above interrupt functions). levels subroutine nesting (common with interrupts). Enhanced hardware greater processing capability. Built-in segment circuit able join driver outputs patterns panel without software. Built-in decimal up/down counter. Built-in 8-bit programmable timer. entire area used working area (bank switching). Built-in data pointer. instructions step operation. Built-in clock oscillator frequency divider circuit. Various output terminals panel drive terminals).
panel bias bias bias Static duty duty duty Number segments segments (max.) segments (max.) segments (max.) segments (max.)
panel drive output terminal switched general-purpose output terminal. number input output terminals provided. Input dedicated port ports/8 pins Input/output port ports/8 pins Output dedicated port port/4 pins initial reset terminal provided. Built-in oscillation circuit system clock. kinds oscillation circuits available system clock other clock oscillation. Number instructions Form shipment QIP80 chip)
Application Development Support System
evaluation chip (LC5897) special devices application development tool will provided. SDS410 system Enables user create application development program assembler language (edit-assembling). EVA510+TB5812+DCB1+Application Evaluation Board+LC5897 Modification debugging application development program possible connecting SDS410. EVA510 identical with EVA410 except that control been replaced. TB5812+DCB1+Application Evaluation Board+LC5897 Load evaluation possible using EPROM (2732) which data application development program contained. Note) application evaluation board created user. Either LEDs used display element.
Application Examples
Portable equipment (camera control, various card controls, high-quality electric calculators timers). Acoustic equipment (electronic control, electronic tuning, clocks). Household electrical apparatus (remote control, timer control). Telephone equipment (telephone control, display control).
No.2058-2/17
LC5812
Data pointer Bank register Working register Accumulator Arithmetic logical unit Interrupt control circuit Program counter UP/DOWN Decimal up/down counter Preset timer Instruction register STOP HOLD control circuit HALT HALT control circuit System clock generator STS1 Status register STS2 Status register
STS3 STS4 WRF0 WRF1 SCF1 SCF2 SCF3 SCF4 SCF5 SCF6 SCF7
Status register Status register Carry flag Zero flag Working flag Working flag Test flag port flag STS4 flag port flag Divider overflow flag UP/DOWN overflow flag Timer overflow flag signal change flag Internal clock flag
No.2058-3/17
LC5812
Application Circuit Example (1/3 bias duty)
Arrangement Chip
Chip size Thickness 480µm size No.2058-4/17
LC5812
Layout name coordinates
QIP80 arrangement Name (µm) XOUT CRIN CROUT COM2 COM3 TEST3 TEST TEST 3581 3581 3581 3581 3581 3581 3581 3581 3581 3581 3581 3367 2823 2528 2233 1938 1643 1347 1052 1068 1374 1680 1986 2292 2598 2904 3210 3581 3581 3581 3581 3581 3581 3581 3581 3581 (µm) 1048 1228 1408 1588 2380 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 1795 1584 1402 1049 QIP80 arrangement Name (µm) TEST2 TEST1 CUP2 TEST CUP1 COM1 CNT1 CNT2 LIGHT ALARM VSS3 VSS2 VSS1 3581 3581 3581 3581 3581 3581 3581 3581 3581 3581 3300 3059 2764 2469 2174 1878 1583 1288 1149 1455 1761 2067 2373 2679 2985 3581 3581 3581 3581 3581 3581 3581 3581 3581 (µm) 1105 1285 1465 1645 1825 2005 2317 2497 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2696 2101 1849 1298 1114
values indicate coordinates each center with center chip origin. TEST terminal should open during normal operation. chip used, substrate must tied VDD.
No.2058-5/17
LC5812
Function
Terminal Input/ name Output Input Circuit configuration Function Connects 32.768kHz 65.536kHz crystal between XOUT oscillation. Used timer reference clock system clock. XOUT incorporates 20pF capacitor VDD. Input-dedicated port. 32ms chatter removal circuit. applying through simultaneously, internal devices reset (mask option). (The chatter removal time 32.768kHz option.) port with mode switched instructions perform following operations Input port Writes data RAM. Output port Outputs data from RAM. Option Option available only LC5812H. Status during reset
Output
Input
Selection L-level Hold initial reset simultaneous application through
Pull-down resistance during reset.
Input/ Output
Selection L-level Hold
Input
Used send data 32ms Selection L-level Hold chatter removal circuit. able operate decimal counter circuit with signal, according instruction. (The chatter removal time 32.768kHz option.)
Input
Controls external interrupt request. (The mask option interlocks with port
Selection L-level Hold
Input
Resets internal devices
Reset H-level (with pull-down resistor) Reset L-level (with pull-up resistor)
CNT1 CNT2
Output
Output-dedicated port
output during reset. output during reset. Options specified each CNT1 CNT2.
output (according mask option).
LIGHT
Output
Output-dedicated port. output during reset. Suitable outputting signals which drive output during reset. light transistor.
output (according mask option).
Continued next page.
No.2058-6/17
LC5812
Continued from preceding page.
Terminal Input/ name Output ALARM Output Circuit configuration Function Output-dedicated port. able output 4kHz, 2kHz, 1kHz modulating signal, according instruction. also output nonmodulating signals. (The modulating frequency 32.768kHz option.) supply voltage terminal. VSS2 supply terminal. VSS1 VSS3 used supply driving power. Connection terminal voltage rise (fall) capacitor. Output Output port common electrodes panel. Lighting specification terminals varies. Static (The alternating frequency 32.768kHz bias duty option.) Duplex bias duty duty duty COM1 COM2 COM3 Segment Output driver group) Output drive CMOS output port open drain output port Options selected units. specified mask option Lighted mode Lighted mode (LCD use) H-level use) Unlighted mode Unlighted mode (LCD use) L-level use) Option output during reset. output during reset. Status during reset output (according mask option).
VSS3 VSS2 VSS1 CUP1 CUP2 COM1 COM2 COM3
panel segment output port. terminal switched output dedicated port dependeing mask option. internal devices reset, static lighting signal COM1 through COM3 each segment outputs, panel segments off. (on/off specified mask option). segment system used draw patterns panel.
Segment Output driver group)
panel segment output port. terminal switched output dedicated port dependeing mask option. internal devices reset static lighting signal COM1 through COM3 each segment outputs, panel segments off. (on/off specified mask option). segment system used draw patterns panel. Test terminals (the user should these terminals).
specified Output drive mask option CMOS output port Options selected Lighted mode Lighted mode units. (LCD use) H-level use) Unlighted mode Unlighted mode (LCD use) L-level use)
TEST3 TEST TEST TEST2 TEST1 TEST
oscillation port. oscillation stopped HOLD instruction.
Note)
Indicates connection VSS2.
No.2058-7/17
LC5812
Oscillation Circuit Option
Option X'tal Circuit configuration Cycle time=f1/4 Output from divider circuit used program timer input signal, drive waveform generating signal, interrupt signal generation, etc. Note) X'tal=32.768kHz, Rd=0 Remarks
X'tal
Cycle time=f1/16 Output from divider circuit used program timer input signal, drive waveform generating signal, interrupt signal generation, etc. Note) X'tal=32.768kHz, Rd=0
option
Cycle time=f1/14 Output from divider circuit used program timer input signal, drive waveform generating signal, interrupt signal generation, etc.
Continued next page.
No.2058-8/17
LC5812
Continued from preceding page.
Option option Circuit configuration Cycle time=f1/16 Output from divider circuit used program timer input signal, drive waveform generating signal, interrupt signal generation, etc. LC5812H only. Remarks
X'tal option
Cycle time=f2/4 Output from divider circuit used program timer input signal, drive waveform generating signal, interrupt signal generation, etc. Note) X'tal=32.768kHz, Rd=0
Input Port Option
Option L-level Hold used. Circuit configuration Remarks Hold option used reduce current required push-botton switch slide switch L-level signal held after pull-down resistor short period time software during opening input.
L-level Hold used.
pull-down used pull-down resistor. pull-down ON/OFF software.
These options provided ports. sure specify USED port when using output port.
No.2058-9/17
LC5812
Output Options output options drive, CMOS output port open drain selected.
Option drive Terminal segment drive. drive method determined according lighting system specified separately. lighting system common terminals, selected from among static, duplex, bias-1/3 duty, bias-1/3 duty methods. CMOS output port open drain output port General-purpose CMOS type output port. General-purpose open drain type output port. Usable according option predetermined ports. Output Form
Alternating waveform driver output generated hardware logic.
Segment Circuit following figure schema structure segment circuit.
contents data memory sent latch circuit display either after being decoded data decoder. circuit used rearrange input data output display latch. With this circuit data memory edited suit panel specifications without software processing. circuit specified PLA, which supplied with program ROM. Alarm Output following frequency divider output used directly alarm output Output signal either combination output signal Modulating output signal These signals output software. indicates output step oscillator frequency divider. Resetting Internal logic There three functions resetting internal logic Built-in power-ON clear circuit this option determined mask option. Reset terminal Simultaneous operation through this option determined mask option.
No.2058-10/17
LC5812
These reset functions explained below. Built-in power-ON clear circuit initial-clear circuit provided microcomputer automatically operates resets internal logic when power turned This function very useful that activated without external devices. disadvantages listed below. therefore, recommended that this function used with other reset functions, that other methods used according applications. Disadvantages circuit operate under certain power-rise conditions during power-ON sequence chatter. Malfunctions take place pulse noise power sudden change status. following reset options selected INHIBIT built-in power-ON clear circuit used this option where malfunctions pulse noise power take place. NORMAL ACTION built-in power-ON clear circuit used. This option should selected only when pulse noise does affect power.
Reset terminal When reset signal reset terminal, reset flag microcomputer part divider circuit reset. Internal logic reset internal reset flag which reset overflow signal from divider circuit. reset status logic circuit released program countner starts operating
with Pull-down (H-RESET)
with Pull-up (L-RESET)
No.2058-11/17
LC5812
Simultaneous operation through applying level voltage through simultaneously, internal logic cleared (initial clear). (Use this option specified mask option.)
Interrupt Function Five factors four vector addresses provided interrupt function. External interrupt terminal (INT) Same vector address Change signal port Underflow programmable timer Overflow divider circuit Overflow/underflow decimal UP/DOWN counter HALT function stop CPU's system clock HALT mode with HALT instruction. Reduces operating current oscillation circuit HALT release signal drive circuit current during HALT. following five factors cause HALT release request signals External interrupt terminal (INT) Change signal port Underflow programmable timer Overflow divider circuit Overflow underflow decimal UP/DOWN counter factors HALT release request signal same those interrupt request signal, factor specified programs. interrupt occurs HALT mode, operation called interrupt performed, returns HALT mode.
Release HALT Interrupt
No.2058-12/17
LC5812
HOLD Function stop operation oscillation circuit (OSC1) HOLD mode with STOP instruction. Reduces current drain minimum during HOLD because OSC1 stopped. Relationship between oscillation options HOLD release functions
HOLD function relea Note
used release HOLD. cannot used release HOLD.
Decimal UP/DOWN Counter Function hardware function that counts external pulse internal reference pulse decimal notation. following three operations selected software counting pulses from port with DOWN switched signal level port counting pulses from port with DOWN switched phase difference signal port counting divider circuit signals oscillator ascending order. With this function, chrono counter units 1/100 second implemented using 32.768kHz crystal oscillatior. Open List
LC5812 lighting method Static Duplex bias duty bias duty Unused ports
L-level Hold
LC5812H Static Duplex bias duty bias duty Unused L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. XTAL &XTAL XTAL
Remarks Select "Unused" when output ports used generalpurpose ports.
ports ports port ports
L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. L-level Hold used. XTAL XTAL
Oscillator selection
specify LC5812, because allowed model.
Internal power-on reset function Simultaneous operation through reset Selection polarity Selection output terminal polarity
CNT1
CNT2
ALARM
LIGHT
Unused Used Used Unused H-level reset (Pull-down) L-level reset (Pull-up) H-level during reset (Normal L-level during reset (Normal H-level during reset (Normal L-level during reset (Normal H-level during reset (Normal L-level during reset (Normal H-level during reset (Normal L-level during reset (Normal
Unused Used Used Unused H-level reset (Pull-down) L-level reset (Pull-up) H-level during reset (Normal L-level during reset (Normal H-level during reset (Normal L-level during reset (Normal H-level during reset (Normal L-level during reset (Normal H-level during reset (Normal L-level during reset (Normal
No.2058-13/17
LC5812 Specifications
Absolute Maximum Ratings VDD=0V, 1/2bias, 1/2duty
Parameter Maximum supply voltage Maximum input voltage Maximum output voltage Operating temperature Storage temperature Symbol VSS1 VSS2 VIN1 VOUT1 Topr Tstg Conditions VSS2=VSS3 Terminal Ratings -4.0 +0.3 -4.0 +0.3 VSS2-0.3 +0.3 VSS2-0.3 +0.3 +125 Unit
Allowable Operating Conditions =-20 +70°C, VDD=0V
Parameter Symbol VSS1 VSS2 VIH1 Input high-level voltage VIH2 VIL1 Input low-level voltage VIL2 fopg1 fopg2 VSS2=-2.0 -3.6V VSS2=-2.3 -3.6V VSS2=VSS3 Input terminals other than Input terminals other than XIN/XOUT CRIN/CROUT Conditions Terminal Ratings -3.6 -3.6
VSS2
-1.3 -2.0
Unit
Power supply voltage
VSS2 VSS2 VSS2
VSS2
VSS2
Operation frequency
Electrical Characteristics =-20 +70°C, VDD=0V
Parameter Symbol RIN1A RIN1B Input resistance RIN2A RIN2B RIN3 Output high-level voltage Output low-level voltage Output high-level voltage Output high-level voltage Output low-level voltage Output high-level voltage Output high-level voltage Output low-level voltage Output low-level voltage Output high-level voltage Output high-level voltage Output low-level voltage Output low-level voltage Output high-level voltage Output middle-level voltage Output low-level voltage Output voltage VOH1 VOL1 VOH2 VOH3 VOL3 VOH4 VOH5 VOL4 VOL5 VOH6 VOH7 VOL6 VOL7 VOH8 VOL8 VSS1 Conditions VSS2=-2.9V, VIN=0.8VSS2 VSS2=-2.9V, VIN=VDD VSS2=-2.9V, VIN=0.8VSS2 VSS2=-2.9V, VIN=VDD VSS2=-2.9V VSS2=-2.4V, IOH=-0.4mA VSS2=-2.4V, IOL=0.4mA Terminal L-level hold Fig. L-level pull-in Fig. L-level hold Fig. L-level pull-in Fig. RES, TEST1, TEST2 ALARM, LIGHT, CNT1, CNT2 ALARM, LIGHT, CNT1, CNT2 Ratings -0.3 VSS2+0.3 -0.6 -0.3 -0.2 VSS2+0.3 -0.2 VSS2+0.3 -0.2 VSS2+0.3 -0.2
VSS2/2-0.2 VSS2/2+0.2
2000 2000
Unit
VSS2+1
VSS2=-2.4V, IOH=-90µA Port port VSS2=-2.4V, IOH=-50µA Port port VSS2=-2.4V, IOL=0.1mA VSS2=-2.4V, IOH=-0.4µA VSS2=-2.4V, IOL=40µA VSS2=-2.4V, IOL=0.4µA VSS2=-2.4V, IOH=-5µA VSS2=-2.4V, IOH=-0.4µA VSS2=-2.4V, IOL=20µA VSS2=-2.4V, IOL=0.4µA VSS2=-2.4V, IOH=-4µA VSS2=-2.4V, IOH=-4µA, IOL=4µA VSS2=-2.4V, IOH=-4µA VSS2=-2.9V VSS2=-2.9V, Ta=25°C, STOP Port port VSS2=-2.4V, IOH=-20µA Segment QIP80 number Segment QIP80 number Common Common Common C1=C2=0.1µF, fopg=32.768kHz C1=C2=0.1µF, CI=25k, fopg=32.768kHz, Co=Cg=20pF Fig.2
VSS2+1
-0.3
VSS2+1 VSS3+0.2
-0.3
VSS2+1 VSS2+0.2
VSS2+0.2 -1.35
Power supply current
Continued next page.
No.2058-14/17
LC5812
Continued from preceding page.
Parameter Oscillation start voltage Oscillation hold voltage Oscillation start time Oscillation correcting capacity oscillation characteristics Symbol Vstt VHOLD tstt VSS2=-2.9V VSS2=-2.9V VSS2=-2.3V -3.6V Conditions Terminal Co=Cg=20pF Fig.3 Co=Cg=20pF Fig.3 Co=Cg=20pF Fig.3 XOUT REXT=510k, CEXT=30pF Fig. Ratings Unit
Specifications
Absolute Maximum Ratings VDD=0V, 1/2bias, 1/3duty
Parameter Maximum supply voltage Maximum input voltage Maximum output voltage Operating temperature Storage temperature Symbol VSS1 VSS2 VIN1 VOUT1 Topr Tstg VSS2=VSS3 Conditions Terminal Ratings -4.0 +0.3 -4.0 +0.3 VSS2-0.3 +0.3 VSS2-0.3 +0.3 +125 Unit
Allowable Operating Conditions =-20 +70°C, VDD=0V
Parameter Symbol VSS1 Power supply voltage VSS2 VIH1 H-level input voltage VIH2 VIL1 L-level input voltage VIL2 fopg1 fopg2 VSS2=-2.0 -3.6V VSS2=-2.3 -3.6V VSS2=VSS3 Input terminals other than Input terminals other than XIN/XOUT CRIN/CROUT Conditions Terminal Ratings -3.6 -3.6 -5.0
VSS2
-1.3 -2.0 -3.9
Unit
VSS2 VSS2 VSS2
VSS2
VSS2
Operation frequency
Electrical Characteristics =-20 +70°C, VDD=0V
Parameter Symbol RIN1A RIN1B Input resistance RIN2A RIN2B RIN3 Output high-level voltage Output low-level voltage Output high-level voltage Output high-level voltage Output low-level voltage Output high-level voltage Output high-level voltage Output low-level voltage Output low-level voltage VOH1 VOL1 VOH2 VOH3 VOL3 VOH4 VOH5 VOL4 VOL5 Conditions VSS2=-2.9V, VIN=0.8VSS2 VSS2=-2.9V, VIN=VDD VSS2=-2.9V, VIN=0.8VSS2 VSS2=-2.9V, VIN=VDD VSS2=-2.9V VSS2=-2.4V, IOH=-0.4mA VSS2=-2.4V, IOL=0.4mA Terminal L-level hold Fig. L-level pull-in Fig. L-level hold Fig. L-level pull-in Fig. RES, TEST1, TEST2 ALARM, LIGHT, CNT1, CNT2 ALARM, LIGHT, CNT1, CNT2 Ratings -0.3 VSS2+0.3 -0.6 -0.3 -0.2 VSS2+0.3 -0.2 VSS2+0.3 VSS2+1 VSS3+0.2 -0.3 VSS2+1 VSS2+1 2000 2000 Unit
VSS2=-2.4V, IOH=-90µA Port port VSS2=-2.4V, IOH=-50µA Port port VSS2=-2.4V, IOL=0.1mA VSS2=-2.4V, IOH=-20µA VSS2=-2.4V, IOH=-0.4µA VSS2=-2.4V, IOL=40µA VSS2=-2.4V, IOL=0.4µA Port port Segment QIP80 number
Continued next page.
No.2058-15/17
LC5812
Continued from preceding page.
Parameter Output high-level voltage CMOS output port) Output high-level voltage Output low-level voltage CMOS output port) Output low-level voltage Output high-level voltage Output middle-level voltage Output low-level voltage Output voltage Symbol VOH6 VOH7 VOL6 VOL7 VOH8 VOL8 VSS1 Vstt VHOLD tstt VSS2=-2.9V VSS2=-2.9V VSS2=-2.3V -3.6V Conditions VSS2=-2.4V, IOH=-5µA VSS2=-2.4V, IOH=-0.4µA VSS2=-2.4V, IOL=20µA VSS2=-2.4V, IOL=0.4µA VSS2=-2.4V, IOH=-4µA VSS2=-2.4V, IOH=-4µA, IOL=4µA VSS2=-2.4V, IOL=4µA VSS2=-2.9V VSS2=-2.9V, Ta=25°C, STOP Terminal Segment QIP80 number Common Common Common C1=C2=0.1µF, fopg=32.768kHz C1=C2=0.1µF, CI=25k, fopg=32.768kHz, Co=Cg=20pF Fig.5 Co=Cg=20pF Fig.3 Co=Cg=20pF Fig.3 Co=Cg=20pF Fig.3 XOUT REXT=510k, CEXT=30pF Fig. -0.2 VSS2+0.3 VSS2+1 VSS2+0.2 -0.2
VSS2/2-0.2 VSS2/2+0.2
Ratings -0.3
Unit
VSS3+0.2 -1.35
Power supply current Oscillation start voltage Oscillation hold voltage Oscillation start time Oscillation correcting capacity oscillation characteristics
Fig. Input Configuration S1-4, M1-4, K1-4, P1-4
Fig. Circuit
Fig. Output Voltage, Supply Current HOLD Voltage Test Circuit
Fig. Output Voltage, Supply Current, Hold Voltage Test Circuit
Fig. Start Voltage, Start Time, Frequency Stability Test Circuit
Unit (capacitance
No.2058-16/17
LC5812
Specifications SANYO products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer's products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer's products equipment. SANYO Electric Co., Ltd. strives supply high-quality high-reliability products. However, semiconductor products fail with some probability. possible that these probabilistic failures could give rise accidents events that could endanger human lives, that could give rise smoke fire, that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO products(including technical data,services) described contained herein controlled under applicable local export control laws regulations, such products must expor without obtaining expor license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written permission SANYO Electric Co., Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO product that intend use. Information (including circuit diagrams circuit parameters) herein example only guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties.
This catalog provides information November, 2001. Specifications information herein subject change without notice.
No.2058-17/17

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