4-megabit (512K Single 2.7-volt Battery-Voltage Flash Memory

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4-megabit (512K Single 2.7-volt Battery-Voltage Flash Memory

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Single Supply Voltage, Range 2.7V 3.6V Single Supply Read Write Software Protected Programming Fast Read Access Time Power Dissipation Active Current CMOS Standby Current Sector Program Operation Single Cycle Reprogram (Erase Program) 2048 Sectors (256 Bytes/Sector) Internal Address Data Latches Bytes Bytes Boot Blocks with Lockout Fast Sector Program Cycle Time Max. Internal Program Control Timer DATA Polling Program Detection Minimum Endurance 10,000 Cycles CMOS Compatible Inputs Outputs Commercial Industrial Temperature Ranges
4-megabit (512K Single 2.7-volt
Battery-Voltage
Flash Memory AT29BV040A
Description
AT29BV040A 3-volt-only in-system Flash Programmable Erasable Read Only Memory (PEROM). megabits memory organized 524,288 words bits. Manufactured with Atmel's advanced nonvolatile CMOS EEPROM technology, device offers access times power dissipation. When device deselected, CMOS standby current less than device
Configurations
Name Function
I/O0 I/O7
Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs Connect
TSOP View
Type
I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0
Rev. 0383G-FLASH-5/03
endurance such that sector written excess 10,000 times. programming algorithm compatible with other devices Atmel's 2.7-volt-only Flash memories. allow simple in-system reprogrammability, AT29BV040A does require high input voltages programming. device operated with single 2.7V 3.6V supply. Reading data device similar reading from EPROM. Reprogramming AT29BV040A performed sector basis; bytes data loaded into device then simultaneously programmed. During reprogram cycle, address locations bytes data captured microprocessor speed internally latched, freeing address data other operations. Following initiation program cycle, device will automatically erase sector then program latched data using internal control timer. program cycle detected DATA polling I/O7. Once program cycle been detected, access read program begin.
Block Diagram
Device Operation
READ: AT29BV040A accessed like EPROM. When high, data stored memory location determined address pins asserted outputs. outputs high impedance state whenever high. This dual-line control gives designers flexibility preventing contention. SOFTWARE DATA PROTECTION PROGRAMMING: AT29BV040 2048 individual sectors, each bytes. Using software data protection feature, byte loads used enter bytes sector programmed. AT29BV040A only programmed reprogrammed using software data protection feature. device programmed sector basis. byte data within sector changed, data entire 256-byte sector must loaded into device. AT29BV040A automatically does sector erase prior loading data into sector. erase command required. Software data protection protects device from inadvertent programming. series three program commands specific addresses with specific data must presented device before programming occur. same three program commands must begin each program operation. software program commands must obey sector program timing specifications. Power transitions will reset software data protection feature, however software feature will guard against inadvertent program cycles during power transitions.
AT29BV040A
0383G-FLASH-5/03
AT29BV040A
attempt write device without 3-byte command sequence will start internal write timers. data will written device; however, duration tWC, read operation will effectively polling operation. After software data protection's 3-byte command code given, byte load performed applying pulse input with (respectively) high. address latched falling edge whichever occurs last. data latched first rising edge bytes data must loaded into each sector. byte that loaded during programming sector will indeterminate. Once bytes sector loaded into device, they simultaneously programmed during internal programming period. After first data byte been loaded into device, successive bytes entered same manner. Each byte programmed must have high-to-low transition within low-to-high transition preceding byte. high-to-low transition detected within last low-to-high transition, load period will internal programming period will start. specify sector address. sector address must valid during each high-to-low transition CE). specify byte address within sector. bytes loaded order; sequential loading required. HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs AT29BV040A following ways: sense below 1.8V (typical), program function inhibited; power delay once reached sense level, device will automatically time (typical) before programming; Program inhibit holding low, high high inhibits program cycles; Noise filter pulses less than (typical) inputs will initiate program cycle. INPUT LEVELS: While operating with 2.7V 3.6V power supply, address inputs control inputs (OE, driven from 5.5V without adversely affecting operation device. lines only driven from 0.6V. PRODUCT IDENTIFICATION: product identification mode identifies device manufacturer Atmel. accessed hardware software operation. hardware operation mode used external programmer identify correct programming algorithm Atmel product. addition, users wish software product identification mode identify part (i.e. using device code), have system software appropriate sector size program operations. this manner, user have common board design 256K 4-megabit densities and, with each density's sector size memory map, have system software apply appropriate sector size. details, Operating Modes (for hardware operation) Software Product Identification. manufacturer device code same both modes. DATA POLLING: AT29BV040A features DATA polling indicate program cycle. During program cycle attempted read last byte loaded will result complement loaded data I/O7. Once program cycle been completed, true data valid outputs next cycle begin. DATA polling begin time during program cycle. TOGGLE BIT: addition DATA polling AT29BV040A provides another method determining program erase cycle. During program erase operation, successive attempts read data from device will result I/O6 toggling between zero. Once program cycle completed, I/O6 will stop toggling
0383G-FLASH-5/03
valid data will read. Examining toggle begin time during program cycle. OPTIONAL CHIP ERASE MODES: entire device erased using 6-byte software code. Please Software Chip Erase application note details. BOOT BLOCK PROGRAMMING LOCKOUT: AT29BV040A designated memory blocks that have programming lockout feature. This feature prevents programming data designated block once feature been enabled. Each these blocks consists bytes; programming lockout feature independently either block. While lockout feature does have activated, activated either both blocks. These memory sections referred boot blocks. Secure code which will bring system contained boot block. AT29BV040A blocks located first bytes memory last bytes memory. boot block programming lockout feature therefore support systems that boot from lower addresses memory higher addresses. Once programming lockout feature been activated, data that block longer erased programmed; data other memory locations still changed through regular programming methods. activate lockout feature, series seven program commands specific addresses with specific data must performed. Please Boot Block Lockout Feature Enable Algorithm. boot block lockout feature been activated either block, chip erase function will disabled. BOOT BLOCK LOCKOUT DETECTION: software method available determine whether programming either boot block section locked out. Software Product Identification Entry Exit sections. When device software product identification mode, read from location 00002H will show programming lower address boot block locked while reading location 7FFF2H will upper boot block. data corresponding block programmed; data program lockout feature been activated corresponding block cannot programmed. software product identification exit mode should used return standard operation.
Absolute Maximum Ratings*
Temperature Under Bias. -55° +125° Storage Temperature -65° +150° Input Voltages (including Pins) with Respect Ground .-0.6V +6.25V Output Voltages with Respect Ground .-0.6V 0.6V Voltage (including Pins) with Respect Ground .-0.6V +13.5V *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions beyond those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
AT29BV040A
0383G-FLASH-5/03
AT29BV040A
Operating Range
AT29BV040A-20 Operating Temperature (Case) Power Supply Note:
AT29BV040A-25 70°C -40°C 85°C 2.7V 3.6V
Com. Ind.
70°C -40°C 85°C 2.7V 3.6V
After power applied minimum specified data sheet value, system should wait before operational mode started.
Operating Modes
Mode Read Program(2) Standby/Write Inhibit Program Inhibit Program Inhibit Output Disable Product Identification Hardware VIL, VH(3), VIL, VH(3), Software(5) VIL, VIH, Notes: VIH. Refer Programming Waveforms. 12.0V 0.5V. Manufacturer Code Device Code details under Software Product Identification Entry/Exit. Manufacturer Code(4) Device Code(4) Manufacturer Code(4) Device Code(4)
DOUT High
High
Characteristics
Symbol ISB1 Parameter Input Load Current Output Leakage Current Standby Current CMOS Condition VI/O 0.3V Com. Ind. ISB2 Standby Current Active Current Input Voltage Input High Voltage Output Voltage Output High Voltage 3.0V -100 3.0V 0.45 2.0V MHz; IOUT 3.6V Units
0383G-FLASH-5/03
Read Characteristics
AT29BV040A-20 Symbol tACC
AT29BV040A-25 Units
Parameter Address Output Delay Output Delay Output Delay Output Float Output Hold from Address, whichever occurred first
tDF(7)(8)
Read Waveforms
Notes:
delayed tACC after address transition without impact tACC. delayed after falling edge without impact tACC after address change without impact tACC. specified from whichever occurs first pF). This parameter characterized 100% tested.
AT29BV040A
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AT29BV040A
Input Test Waveforms Measurement Level
Output Test Load
Capacitance MHz, 25°C(1)
Symbol COUT Note: Units Conditions VOUT
These parameters characterized 100% tested.
0383G-FLASH-5/03
Byte Load Characteristics
Symbol tAS, tOES tDH, tOEH tWPH Parameter Address, Set-up Time Address Hold Time Chip Select Set-up Time Chip Select Hold Time Write Pulse Width Data Set-up Time Data, Hold Time Write Pulse Width High Units
Byte Load Waveforms(1)(2)
Controlled
Controlled
AT29BV040A
0383G-FLASH-5/03
AT29BV040A
Program Cycle Characteristics
Symbol tBLC tWPH Parameter Write Cycle Time Address Set-up Time Address Hold Time Data Set-up Time Data Hold Time Write Pulse Width Byte Load Cycle Time Write Pulse Width High Units
Software Protected Program Waveform
Notes:
must high when both low. through must specify sector address during each high transition after software code been entered. bytes that loaded within sector being programmed will indeterminate.
Programming Algorithm(1)
LOAD DATA ADDRESS 5555
LOAD DATA ADDRESS 2AAA
LOAD DATA ADDRESS 5555
WRITES ENABLED
LOAD DATA SECTOR (256 BYTES)(3)
ENTER DATA PROTECT STATE(2)
Notes:
Data Format: I/O7 I/O0 (Hex); Address Format: (Hex). Data Protect state will re-activated program cycle. bytes data MUST loaded.
0383G-FLASH-5/03
Data Polling Characteristics(1)(2)
Symbol tOEH Notes: Parameter Data Hold Time Hold Time Output Delay
Units
Write Recovery Time These parameters characterized 100% tested. spec Read Characteristics.
Data Polling Waveforms
Toggle Characteristics(1)
Symbol tOEH tOEHP Notes: Parameter Data Hold Time Hold Time Output Delay High Pulse Write Recovery Time These parameters characterized 100% tested. spec Read Characteristics.
Units
Toggle Waveforms(1)(4)
Notes:
Toggling either both will operate toggle bit. Beginning ending state I/O6 will vary. address location used address should vary.
AT29BV040A
0383G-FLASH-5/03
AT29BV040A
Software Product Identification Entry(1)
LOAD DATA ADDRESS 5555
Boot Block Lockout Feature Enable Algorithm(1)
LOAD DATA ADDRESS 5555
LOAD DATA ADDRESS 2AAA
LOAD DATA ADDRESS 2AAA
LOAD DATA ADDRESS 5555
LOAD DATA ADDRESS 5555
PAUSE
ENTER PRODUCT IDENTIFICATION MODE(2)(3)
LOAD DATA ADDRESS 5555
Software Product Identification Exit(1)
LOAD DATA ADDRESS 5555
LOAD DATA ADDRESS 2AAA
LOAD DATA ADDRESS 2AAA LOAD DATA ADDRESS 00000H(2)
LOAD DATA ADDRESS 5555
LOAD DATA ADDRESS 5555
LOAD DATA ADDRESS 7FFFFH(3)
PAUSE PAUSE EXIT PRODUCT IDENTIFICATION MODE(4)
PAUSE
Notes:
Notes:
Data Format: I/O7 I/O0 (Hex); Address Format: (Hex). VIL. Manufacturer Code read VIL; Device Code read VIH. device does remain identification mode powered down. device returns standard operation mode. Manufacturer Code Device Code
Data Format: I/O7 I/O0 (Hex); Address Format: (Hex). Lockout feature lower address boot block. Lockout feature higher address boot block.
0383G-FLASH-5/03
Ordering Information
tACC (ns) (mA) Active Standby 0.04 0.05 0.04 0.05 Ordering Code AT29BV040A-20TC AT29BV040A-20TI AT29BV040A-25TC AT29BV040A-25TI Package Operation Range Commercial Industrial (-40° Commercial Industrial (-40°
Package Type 32C1 32-ball, Plastic Chip-scale Ball Grid Array Package (CBGA) 32-lead, Thin Small Outline Package (TSOP)
AT29BV040A
0383G-FLASH-5/03
AT29BV040A
Packaging Information
TSOP
Identifier
SEATING PLANE
GAGE PLANE
SYMBOL Notes: This package conforms JEDEC reference MO-142, Variation Dimensions include mold protrusion. Allowable protrusion 0.15 side 0.25 side. Lead coplanarity 0.10 maximum.
COMMON DIMENSIONS (Unit Measure 0.05 0.95 19.80 18.30 7.90 0.50 1.00 20.00 18.40 8.00 0.60 0.25 BASIC 0.17 0.10 0.22 0.50 BASIC 0.27 0.21 1.20 0.15 1.05 20.20 18.50 8.10 0.70 Note Note NOTE
10/18/01 2325 Orchard Parkway Jose, 95131 TITLE 32T, 32-lead Package) Plastic Thin Small Outline Package, Type (TSOP) DRAWING REV.
0383G-FLASH-5/03
Atmel Corporation
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0383G-FLASH-5/03

4-megabit (512K Single 2.7-volt Battery-Voltage Flash Memory

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