3.3V CMOS 16-BIT IDT74LVCH16543A REGISTERED TRANSCEIVER WITH 3-STATE O

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3.3V CMOS 16-BIT IDT74LVCH16543A REGISTERED TRANSCEIVER WITH 3-STATE O

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IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
3.3V CMOS 16-BIT IDT74LVCH16543A REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS, VOLT TOLERANT I/O, BUS-HOLD
Typical tSK(o) (Output Skew) 250ps 2000V MIL-STD-883, Method 3015; 200V using machine model 200pF, 3.3V 0.3V, Normal Range 2.7V 3.6V, Extended Range CMOS power levels (0.4µ typ. static) inputs, outputs, tolerant Supports insertion Available SSOP TSSOP packages
FEATURES:
DESCRIPTION
DRIVE FEATURES: APPLICATIONS:
High Output Drivers: ±24mA Reduced system switching noise 3.3V mixed voltage systems Data communication telecommunication systems
LVCH16543A 16-bit registered transceiver built using advanced dual metal CMOS technology. LVCH16543A used 8-bit transceivers 16-bit transceiver. Separate latch-enable (LEAB LEBA) output-enable (OEAB OEBA) inputs provided each register permit independent control either direction data flow. A-to-B enable (CEAB) input must order enter data from port output data from port. LEAB controls latch function. When LEAB low, latches transparent. subsequent low-to-high transition LEAB puts latches storage mode. OEAB performs output enable function port. Data flow from port port similar requires using CEBA, LEBA, OEBA inputs. Flow-through organization signal pins simplifies layout. inputs designed with hysteresis improved noise margin. pins this 16-bit registered transceiver driven from either 3.3V devices. This feature allows this device translator mixed 3.3V/5V supply system. LVCH16543A been designed with ±24mA output driver. This driver capable driving moderate heavy load while maintaining speed performance. LVCH16543A "bus-hold" which retains inputs' last state whenever input goes high impedance. This prevents floating inputs eliminates need pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
1OEBA
2OEBA
1CEBA 1LEBA 1OEAB 1CEAB 1LEAB
2CEBA 2LEBA 2OEAB 2CEAB
2LEAB
SEVEN OTHER CHANNELS
logo registered trademark Integrated Device Technology, Inc.
SEVEN OTHER CHANNELS
2004 Integrated Device Technology, Inc.
JANUARY 2004
DSC-4612/2
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
CONFIGURATION
1OEAB 1LEAB 1CEAB
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description VTERM Terminal Voltage with Respect Storage Temperature Output Current Continuous Clamp Current, Continuous Current through each -0.5 +6.5 +150 ±100
Unit
1OEBA 1LEBA 1CEBA
TSTG IOUT
NOTE: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
DESCRIPTION
Names xOEAB xOEBA xCEAB xCEBA xLEAB xLEBA Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs B-to-A 3-State Outputs(1) B-to-A Data Inputs A-to-B 3-State Outputs(1)
NOTE: These pins have "Bus-Hold". other pins standard inputs, outputs, I/Os.
FUNCTION TABLE (EACH 8-BIT SECTION)(1,2)
Inputs xCEAB xLEAB xOEAB Latch Status Storing Storing Transparent Storing Transparent Storing Storing Output Buffers High High Current Inputs Previous Inputs High High Recommended
2CEAB 2LEAB 2OEAB
2CEBA 2LEBA 2OEBA
SSOP/ TSSOP VIEW
CAPACITANCE +25°C, 1.0MHz)
Symbol COUT CI/O Parameter
Conditions VOUT
Typ.
Max.
Unit
Input Capacitance Output Capacitance Port Capacitance
NOTE: applicable device type.
NOTES: HIGH Voltage Level Voltage Level Don't Care High-Impedance A-to-B data flow shown. B-to-A data flow similar uses xCEBA, xLEBA, xOEBA. Before xLEAB LOW-to-HIGH transition.
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: -40°C +85°C
Symbol IOZH IOZL IOFF ICCL ICCH ICCZ High Impedance Output Current (3-State Output pins) Input/Output Power Leakage Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current 5.5V 2.3V, -18mA 3.3V 3.6V -0.7 -1.2 3.6V 5.5V Parameter Input HIGH Voltage Level Input Voltage Level Input Leakage Current 2.3V 2.7V 2.7V 3.6V 2.3V 2.7V 2.7V 3.6V 3.6V 5.5V Test Conditions Min. Typ.(1) Max. Unit
Quiescent Power Supply Current Variation
5.5V(2) input 0.6V, other inputs
NOTES: Typical values 3.3V, +25°C ambient. This applies disabled state only.
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NOTES: Pins with Bus-Hold identified description. Typical values 3.3V, +25°C ambient.
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current 2.3V 3.6V
Test Conditions 0.8V 1.7V 0.7V 3.6V
Min.
Typ.(2)
Max. ±500
Unit
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Output HIGH Voltage 2.3V 2.3V 2.7V Output Voltage 2.3V 3.6V 2.3V 2.7V 24mA 0.1mA 12mA 12mA 24mA Test Conditions(1) 2.3V 3.6V 0.1mA 12mA Min. Max. 0.55 Unit
NOTE: must within min. max. range shown ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table appropriate range. 40°C 85°C.
OPERATING CHARACTERISTICS, 3.3V 0.3V, 25°C
Symbol Parameter Power Dissipation Capacitance Transceiver Outputs enabled Power Dissipation Capacitance Transceiver Outputs disabled Test Conditions 0pF, 10Mhz Typical Unit
SWITCHING CHARACTERISTICS(1)
2.7V Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tSK(o) Parameter Propagation Delay, Transparent Mode Propagation Delay xLEBA xAx, xLEAB Output Enable Time xCEBA xCEAB Output Enable Time xOEBA xOEAB Output Disable Time xCEBA xCEAB Output Disable Time xOEBA xOEAB Set-up Time, data before Set-up Time, data before Hold Time, data after Hold Time, data after Pulse Duration, xLEBA xLEAB, xCEBA xCEAB Output Skew(2) Min. Max. 3.3V 0.3V Min. Max. Unit
NOTES: TEST CIRCUITS WAVEFORMS. 40°C 85°C. Skew between outputs same package switching same direction.
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
Link
TEST CIRCUITS WAVEFORMS TEST CONDITIONS
Symbol VLOAD VCC(1)= 3.3V±0.3V VCC(1)= 2.7V
Pulse Generator D.U.T.
Link
SAME PHASE INPUT TRANSITION
VCC(2)= 2.5V±0.2V
Unit
VLOAD Open
tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION
tPHL
tPHL
Propagation Delay
ENABLE CONTROL INPUT tPZL OUTPUT SWITCH NORMALLY CLOSED tPZH OUTPUT SWITCH NORMALLY OPEN HIGH VLOAD/2 tPHZ tPLZ DISABLE VLOAD/2
Link
VOUT
Test Circuit Outputs
DEFINITIONS: Load capacitance: includes probe capacitance. Termination resistance: should equal ZOUT Pulse Generator. NOTES: Pulse Generator Pulses: Rate 10MHz; 2.5ns; 2.5ns. Pulse Generator Pulses: Rate 10MHz; 2ns; 2ns.
NOTE: Diagram shown input Control Enable-LOW input Control Disable-HIGH.
Enable Disable Times
SWITCH POSITION
Test Open Drain Disable Enable Disable High Enable High Other Tests Switch VLOAD Open
tPLH2 tPHL2
Link
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL SYNCHRONOUS CONTROL
tREM
Link
Set-up, Hold, Release Times
INPUT
tPLH1
tPHL1
LOW-HIGH-LOW PULSE HIGH-LOW-HIGH PULSE
OUTPUT
Link
OUTPUT
Pulse Width
tSK(x) tPLH2 tPLH1 tPHL2 tPHL1
Output Skew tSK(X)
NOTES: tSK(o) OUTPUT1 OUTPUT2 outputs. tSK(b) OUTPUT1 OUTPUT2 same bank.
IDT74LVCH16543A 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
ORDERING INFORMATION
Bus-Hold Temp. Range Family XXXX Device Type Package
Shrink Small Outline Package Thin Shrink Small Outline Package
543A 16-Bit Registered Transceiver with 3-State Outputs, Tolerant Double-Density, ±24mA Bus-hold -40°C +85°C
CORPORATE HEADQUARTERS 2975 Stender Santa Clara, 95054
SALES: 800-345-7015 408-727-6116 fax: 408-492-8674 www.idt.com
Tech Support: logichelp@idt.com (408) 654-6459

3.3V CMOS 16-BIT IDT74LVCH16543A REGISTERED TRANSCEIVER WITH 3-STATE O

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