3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS BUS-HOLD
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IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS BUS-HOLD
MICRON CMOS Technology Typical tSK(o) (Output Skew) 250ps 2000V MIL-STD-883, Method 3015; 200V using machine model 200pF, 3.3V 0.3V, Normal Range 2.7V 3.6V, Extended Range 2.5V 0.2V CMOS power levels (0.4µ typ. static) Rail-to-Rail output swing increased noise margin Available TVSOP package
IDT74ALVCHS162830
FEATURES:
DESCRIPTION:
This 1-bit 2-bit address driver built using advanced dual metal CMOS technology. Diodes have been added inputs clamp overshoot. ALVCHS162830 series resistors device output structure which will significantly reduce line noise when used with light loads. This driver been designed drive ±12mA designated threshold levels. ALVCHS162830 "bus-hold" which retains inputs' last state whenever input goes high impedance. This prevents floating inputs eliminates need pull-up/down resistors.
DRIVE FEATURES:
Balanced Output Drivers: ±12mA switching noise
APPLICATIONS:
SDRAM Modules Motherboards Workstations
FUNCTIONAL BLOCK DIAGRAM
OTHER CHANNELS
logo registered trademark Integrated Device Technology, Inc.
©1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-4718/1
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
CONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description VTERM(2) Terminal Voltage with Respect Terminal Voltage with Respect Storage Temperature Output Current Continuous Clamp Current, Continuous Clamp Current, Continuous Current through each -0.5 +4.6 -0.5 VCC+0.5 +150 ±100
Unit
VTERM(3) TSTG IOUT
2Y18 1Y18
NOTES: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. terminals. terminals except VCC.
CAPACITANCE +25°C, 1.0MHz)
Symbol COUT COUT Parameter(1) Input Capacitance Output Capacitance Port Capacitance Conditions VOUT Typ. Max. Unit
1Y10 2Y10
NOTE: applicable device type.
DESCRIPTION
Names Data Inputs(1) 3-State Outputs Description 3-State Output Enable Inputs (Active LOW)
1Y11 2Y11
1Y12 2Y12
NOTE: These pins have "Bus-Hold". other pins standard inputs, outputs, I/Os.
1Y13 2Y13
FUNCTION TABLE(1)
Inputs
Outputs
1Y14 2Y14
1Y15 2Y15
2Y17 1Y17
1Y16 2Y16
TVSOP VIEW
NOTE: HIGH Voltage Level Voltage Level Don't Care High Impedance
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: -40°C +85°C
Symbol IOZH IOZL ICCL ICCH ICCZ Parameter Input HIGH Voltage Level Input Voltage Level Input HIGH Current Input Current High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current 2.3V, -18mA 3.3V 3.6V input 0.6V, other inputs 2.3V 2.7V 2.7V 3.6V 2.3V 2.7V 2.7V 3.6V 3.6V 3.6V 3.6V Test Conditions Min. Typ.(1) -0.7 Max. -1.2 Unit
Quiescent Power Supply Current Variation
NOTE: Typical values 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NOTES: Pins with Bus-Hold identified description. Typical values 3.3V, +25°C ambient.
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current 2.3V 3.6V
Test Conditions 0.8V 1.7V 0.7V 3.6V
Min.
Typ.(2)
Max. ±500
Unit
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Output HIGH Voltage 2.3V 2.7V Output Voltage 2.3V 3.6V 2.3V 2.7V Test Conditions(1) 2.3V 3.6V 0.1mA 12mA 0.1mA 12mA Min. Max. 0.55 0.55 Unit
NOTE: must within min. max. range shown ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table appropriate range. 40°C 85°C.
OPERATING CHARACTERISTICS, 25°C
2.5V 0.2V Symbol Parameter Power Dissipation Capacitance Driver Outputs enabled Power Dissipation Capacitance Driver Outputs disabled Test Conditions 0pF, 10Mhz Typical 3.3V 0.3V Typical Unit
SWITCHING CHARACTERISTICS(1)
2.5V 0.2V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(O) Parameter Propagation Delay Output Enable Time Output Disable Time Output Skew(2) Min. Max. 2.7V Min. Max. 3.3V 0.3V Min. Max. Unit
NOTES: TEST CIRCUITS WAVEFORMS. 40°C 85°C. Skew between outputs same package switching same direction.
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
ALVC Link
TEST CIRCUITS WAVEFORMS TEST CONDITIONS
Symbol VLOAD VCC(1)= 3.3V±0.3V VCC(1)= 2.7V
Pulse Generator
SAME PHASE INPUT TRANSITION
VCC(2)= 2.5V±0.2V
Unit
LOAD Open
tPLH OUTPUT OPPOSITE PHASE INPUT TRANSITION
tPHL
Propagation Delay
ENABLE CONTROL INPUT tPZL OUTPUT SWITCH NORMALLY CLOSED tPZH OUTPUT SWITCH NORMALLY OPEN HIGH LOAD/2 tPHZ tPLZ DISABLE LOAD/2
ALVC Link
D.U.T.
ALVC Link
Test Circuit Outputs
DEFINITIONS: Load capacitance: includes probe capacitance. Termination resistance: should equal ZOUT Pulse Generator. NOTES: Pulse Generator Pulses: Rate 1.0MHz; 2.5ns; 2.5ns. Pulse Generator Pulses: Rate 1.0MHz; 2ns; 2ns.
SWITCH POSITION
Test Open Drain Disable Enable Disable High Enable High Other Tests Switch VLOAD Open
INPUT OUTPUT OUTPUT tPLH2 tPHL2
ALVC Link
NOTE: Diagram shown input Control Enable-LOW input Control Disable-HIGH. DATA INPUT TIMING INPUT tREM ASYNCHRONOUS CONTROL SYNCHRONOUS CONTROL
ALVC Link
Enable Disable Times
Set-up, Hold, Release Times
tPLH1
tPHL1
LOW-HIGH-LOW PULSE HIGH-LOW-HIGH PULSE
ALVC Link
Pulse Width
tPLH2 tPLH1 tPHL2 tPHL1
Output Skew tSK(X)
NOTES: tSK(o) OUTPUT1 OUTPUT2 outputs. tSK(b) OUTPUT1 OUTPUT2 same bank.
IDT74ALVCHS162830 3.3V CMOS 1-BIT 2-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
ORDERING INFORMATION
ALVC Bus-Hold Temp. Range Family Device Type Package
Thin Very Small Outline Package 1-Bit 2-Bit Address Driver with 3-State Outputs
S162 Double-Density with Resistors Clamps VCC, ±12mA Bus-Hold -40°C +85°C
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