4-bit Microcontroller with Driver NT6610C-based single-chip 4-bit
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NT6611
4-bit Microcontroller with Driver
NT6610C-based single-chip 4-bit microcontroller with driver ROM: 1024 bits RAM: bits (data memory) Operation Voltage Range: 2.2V 5.4V typically) CMOS pins (PORTA CMOS Open Drain code option level subroutine nesting (including interrupts) 8-bit timers with pre-divider circuit Oscillator warm-up timer priority interrupt sources: External interrupt (falling edge) Timer0 interrupt Timer1 interrupt PortB interrupt (falling edge) Clock source: 32.768KHz crystal 262K (type programmable code option) Instruction cycle time: 4/32.768KHz 122µs) 32.768KHz crystal 4/262KHz 15µs) 262KHz driver (1/4 duty bias duty bias) power operation modes HALT STOP mode Built-in alarm generator (carrier frequency: 2KHz 4KHz code option) power consumption (Iop 10µA, 32.768KHz, Bonding option multi-code software Available CHIP FORM
General Description
NT6611 single-chip microcontroller integrated with NT6610C core, SRAM, timer, alarm generator, driver, port, program ROM.
Configuration
SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3
COM3 COM4 OSCI OSCO PORTD3 PORTD2 PORTD1 PORTD0 PORTC3 PORTC2 PORTC1 PORTC0 PORTB3
NT6611
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NT6611
Block Diagram
TEST
(1024
OSCI (256 OSCO 8-Bit TIMER PORTB, PORTC PORTS (3*4) CORE PORTA extemal PORTA.0 (INT) PORTA.1(BD) PORTA.2 (BD) PORTA.3 COMMON DRIVERS COM1 COM4 PORTD
RESET ALARM GENERATOR
SEGMENT DRIVERS
SEG1 SEG26
OPERATING VOLTAGE VOLTAGE DIVIDER
Description
Designation SEG1 TEST RESET PORTA0 Description Segment signal output display. Seg1 output Test internally pull-down connect user) reset input Power Bonding option, internally pull-low programmable PA.0 could external interrupt input( PA.1, PA.2 could buzzer output PA.1 (BD), PA.2 programmable I/O, vector interrupt (active falling edge) programmable programmable Ground Bonding option, internally pull-high Oscillator output pin, connected crystal oscillator Oscillator input pin, connected crystal external resistor Common signal output display
PORTB0 PORTC0 PORTD0 OSCO OSCI COM1
Total pads mask type.
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NT6611
Functional Description
contains following functional blocks: Program Counter, Arithmetic Logic Unit (ALU), Carry Flag, Accumulator, Table Branch Register, Data Pointer (INX, DPH, DPM, DPL), Stacks. address 1024 words bits program area from $000 $3FF. There area from address through that reserved special interrupt service routines, such starting vector address. Address 000H 001H 002H 003H 004H Instruction instruction instruction instruction instruction instruction Remarks Jump RESET service routine Jump External interrupt service routine Jump TIMER0 service routine Jump TIMER1 service routine Jump service routine (PORTB)
*JMP instruction replaced instruction. Built-in contains general purpose data memory, RAM, system register. Data memory, RAM, system register accessed direct addressing instruction. following memory allocation map: $000 $01F: System register $020 $11F: Data memory (256 bits, divided into banks). $300 $319: space bits).
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NT6611
configuration system register: IRQX T0L.3 T0H.3 T1L.3 T1H.3 PA.3 PB.3 PC.3 PD.3 TBR.3 INX.3 DPL.3 IET0 IRQT0 T0M.2 T1M.2 T0L.2 T0H.2 T1L.2 T1H.2 PA.2 PB.2 PC.2 PD.2 TBR.2 INX.2 DPL.2 DPM.2 DPH.2 LCDOFF IET1 IRQT1 T0M.1 T1M.1 T0L.1 T0H.1 T1L.1 T1H.1 PA.1 PB.1 PC.1 PD.1 TBR.1 INX.1 DPL.1 DPM.1 DPH.1 IRQP T0M.0 T1M.0 T0L.0 T0H.0 T1L.0 T1H.0 PA.0 PB.0 PC.0 PD.0 TBR.0 INX.0 DPL.0 DPM.0 DPH.0 Remarks Interrupt enable flags Interrupt request flags Bit0-2: Timer0 Mode register Bit0-2: Timer1 Mode register Timer0 load/counter register nibble Timer0 load/counter register high nibble Timer1 load/counter register nibble Timer1 load/counter register high nibble PORTA PORTB PORTC PORTD Reserved Bonding option Table Branch Register Pseudo index register Data pointer nibble Data pointer middle nibble Data pointer high nibble Bit0: PA.1, PA.2 Alarm Bit1: HEAVY LOAD Mode Bit2: Bit3: segment outport Alarm Envelope Control Bit0: change duty duty, bias Reserved
AEC3
AEC2
AEC1
AEC0 DUTY
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NT6611
System Register $0DH bond bond bond bond Remarks Bit0: Bonding option internal weak drive Bit1: Bonding option internal weak drive Power-on Pull Pull high
NT6611 Bonding Option different bonding options possible user's needs. chip's program different program flows that will vary depending which bonding option used. readable contents will differ depending bonding.
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NT6611
System Register LCDOFF Remarks Bit0: PA.1, PA.2 ALARM output Bit1: heavy load mode Bit2: Power Control Bit3: seg1 output ports PORTA.1, PORTA.2 port PORTA.1, PORTA.2 ALARM output heavy load HEAVY LOAD mode signal signal Seg1 output Seg1 output ports Power
HEAVY LOAD Mode (HLM): This mode designed 32KHz crystal oscillator, that oscillation maintained noisy power environment. power might drop suddenly when ALARM driving speaker. designed control this power variation. consumption power will increase during mode, will affect oscillator. Note: needs about instruction cycles set-up oscillation 32.768KHz crystal oscillator.
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NT6611
System Register AEC: AEC3 AEC2 AEC1 AEC0 Remarks ALARM envelope control envelope envelope envelope envelope envelope Power
Default carrier frequency 4KHz. selected 2KHz code option. WRITE mode: control envelop selection. READ mode read current envelope wave forms. Below ALARM functional block equivalent circuit diagram. activate ALARM function, first switch ALARM OUTPUT mode. After setting equal then proper envelope. When data writes into AEC, envelope counter will synchronized same time. programmer read back envelope from register make pattern changes needed programmer. Read operation will affect alarm output waveform.
Sound Mixer 16Hz
mask option OSCI OSCO mask option 262K
programming alarm waveform shown below:
OUTPUT
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NT6611
System Register DUTY Description Bit0: duty control. driver duty, bias driver duty, bias Power
Driver driver contains controller, voltage generator, common signal pins, segment driver pins. There different driving modes that programmable, duty bias, other duty bias. DRIVING mode controlled register power-on status duty bias. controller consists display data duty generator. data dual port that transfers data segment pins automatically without program control. Configuration area: When segments used output ports: Address COM4 300H 301H 302H 303H COM3 COM2 COM1 DATA_BIT DATA_BIT DATA_BIT DATA_BIT segment also used output ports, selected bit3 system register When segments output ports, data written same address (300H 303H). used data memory needed. When "STOP" instruction executed, will turned off, data same before execution "STOP" instruction.
When segments used segment outputs: Address COM4 300H 301H 302H 303H SEG1 SEG2 SEG3 SEG4 COM3 SEG1 SEG2 SEG3 SEG4 COM2 SEG1 SEG2 SEG3 SEG4 COM1 SEG1 SEG2 SEG3 SEG4
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NT6611
Segments Address COM4 304H 305H 306H 307H 308H 309H 30AH 30BH 30CH 30DH 30EH SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 COM3 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 COM2 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 COM1 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 30FH 310H 311H 312H 313H 314H 315H 316H 317H 318H 319H Address COM4 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 COM3 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 COM2 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 COM1 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26
Port NT6611 CMOS quasi-I/O ports, PORTA, PORTB, PORTC, PORTD. ports programmable. PORTA, PORTA,B,C,D pull-high internally, weak drive. equivalent circuit below:
Data-Out
Timer0 Timer1 Configuration Operation Both Timer0 Timer1 consists 8-bit write-only timer load register (TL0L, TL0H; TL1L, TL1H), 8-bit read-only timer counter (TC0L, TC0H; TC1L, TC1H). Each them order digits high order digits. timer counter initialized writing data into timer load register (TL0L, TL0H; TL1L, TL1H). low-order digit should written first, then high-order digit. timer counter loaded with contents load register automatically when high order digit written counts overflow happen. timer overflow will generate interrupt interrupt enable flag set. timer programmed several different system clock sources setting Timer Mode register (TM0,TM1). Timer Load Register: Since register controls physical READ WRITE operations, please follow these steps: Write Operation: nibble first; High nibble update counter Read Operation: High Nibble first; nibble followed.
Data-In
Timer NT6611 8-bit timers. Their operation counting-up. timers consist 8-bit counter 8-bit preload register.
Fosc/4 Tosc PRE-SCALER SYNC 8-BIT COUNTER
timers provide following functions: Programmable interval timer function. Read counter value. Timer Mode Register
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NT6611
Load Reg.
Load Reg.
8-bit timer counter
Latch Reg.
8-bit counter counts prescaler overflow output pulses. Timer Mode registers (TM0, TM1) 4-bit registers used timer control shown table1 table These mode registers select input pulse sources into timer. Table Timer0 Mode Register ($02) TM0.2 TM0.1 TM0.0 Prescaler Divide Ratio
Clock Source System clock System clock System clock System clock System clock System clock System clock System clock
Table Timer1 Mode Register ($03) TM1.2 TM1.1 TM1.0 Prescaler Divide Ratio
Clock Source System clock System clock System clock System clock System clock System clock System clock System clock
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NT6611
Interrupt Four interrupt sources available NT6611: External interrupt share with PA.0) Timer0 interrupt Timer1 interrupt Port's falling edge detection interrupt
configuration system register $00: IET0 IET1 Remark Interrupt enable flags
External Interrupt External interrupt shared with bit0 PORTA. When bit3 system register 0(IEX) external interrupt will enabled, falling edge signal PA.0 will generate external interrupt. (Note: while external interrupt enabled, writing bit0 PORTA will generate external interrupt). Timer0, Timer1 Interrupt, Port Interrupt Ports input clock Timer0 Timer1 based clock. programming Timer interrupt, Port interrupt ports refer NT6610C spec. Interrupt Servicing Sequence Diagram:
Inst. cycle
Instruction Execution
Instruction Execution
Instruction Execution
Interrupt Generated
Interrupt Accepted
Vector Generated Stacking
Fetch Vector address Reset IE.X
Start vector address
Interrupt Nesting: During NT6610C interrupt service, user enable INTERRUPT enable flag before returning from interrupt. servicing sequence diagram shows next interrupt next nesting interrupt occurrences. interrupt request ready instruction execution enable, then interrupt will start immediately after next instruction executions. However, instruction instruction disables interrupt request enable flag, then interrupt service will terminated.
System Clock NT6611 clock source. OSC1 32.768KHz crystal 262KHz determined code option. generates basic clock pulses that provide system clock supply on-chip peripherals (TIMER0, TIMER1, LCD).
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NT6611
Instructions
instructions cycle word instructions. characteristics memory oriented operation. Arithmetic Logical Instruction Accumulator Type Mnemonic ADCM ADDM SBCM SUBM EORM ANDM X(,B) X(,B) X(,B) X(,B) X(,B) X(,B) X(,B) X(,B) X(,B) X(,B) X(,B) X(,B) X(,B) X(,B) Instruction Code 00000 0bbb xxxx 00000 1bbb xxxx 00001 0bbb xxxx 00001 1bbb xxxx 00010 0bbb xxxx 00010 1bbb xxxx 00011 0bbb xxxx 00011 1bbb xxxx 00100 0bbb xxxx 00100 1bbb xxxx 00101 0bbb xxxx 00101 1bbb xxxx 00110 0bbb xxxx 00110 1bbb xxxx 11110 0000 0000 Function Flag Change
AC,Mx
AC,Mx
AC,Mx
AC,Mx
AC,Mx
AC,Mx
AC,Mx
AC[3]; AC[0] shift right
Immediate Type Mnemonic ADIM SBIM EORIM ORIM ANDIM Instruction Code 01000 iiii xxxx 01001 iiii xxxx 01010 iiii xxxx 01011 iiii xxxx 01100 iiii xxxx 01101 iiii xxxx 01110 iiii xxxx Function Flag Change
AC,Mx
AC,Mx AC,Mx AC,Mx AC,Mx
assembler ASM66 V1.0, EORIM memonic EORI. However, EORI same operation identical with EORIM. Same ORIM with respect ORI, ANDIM with respect ANDI. Decimal Adjust Mnemonic Instruction Code 11001 0110 xxxx 11001 1010 xxxx Function AC;Mx Decimal adjust add. AC;Mx Decimal adjust sub. Flag Change
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NT6611
Transfer Instruction Mnemonic X(,B) X(,B) Instruction Code 00111 0bbb xxxx 00111 1bbb xxxx 01111 iiii xxxx Function Flag Change
AC,Mx
Control Instruction Mnemonic CALL Instruction Code 10010 xxxx xxxx 10000 xxxx xxxx 10011 xxxx xxxx 10001 xxxx xxxx 10100 xxxx xxxx 10101 xxxx xxxx 10110 xxxx xxxx 10111 xxxx xxxx 11000 xxxx xxxx RTNW RTNI HALT STOP TJMP Where, Program counter Accumulator Complement accumulator Carry flag Data memory page Stack Table Branch Register Immediate data Logical exclusive Logical Logical bank=000 11010 000h llll 11010 1000 0000 11011 0000 0000 11011 1000 0000 1110p xxxx xxxx 11110 1111 1111 11111 1111 1111 X(Include (PC11-PC8) (TBR) Function AC=0 CY=1 AC(0)=1 AC(1)=1 AC(2)=1 AC(3)=1 X(Not include hhhh; llll Flag Change
CY;PC
Operation
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NT6611
Absolute Maximum Ratings*
Supply Voltage -0.3V +5.5V Input Voltage. -0.3V VDD+0.3V Operating Ambient Temperature +60°C Storage Temperature -55°C +125°C
*Comments
Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage this device. These stress ratings only. Functional operation this device these other conditions above those indicated operational sections this specification implied intended. Exposed absolute maximum rating conditions extended periods affect device reliability.
Electrical Characteristics (VDD 3.0V, 25°C, FOSC 32.768KHz, unless otherwise specified)
Parameter Operating Voltage Operating Current Standby Current Standby Current Input High Voltage Input Voltage Output High Voltage Output Voltage Output High Voltage Output Voltage Output High Voltage Output Voltage Output High Voltage Output Voltage Lighting Symbol ISB1 ISB2 VOH1 VOL1 VOH2 VOL2 VOH3 VOL3 VOH4 VOL4 ILCD Min. Typ. Max. Unit output pins unload execute instruction output pins unload (HALT mode) exclude current output pins unload (STOP mode) off, current PORTA, PORTB, PORTC, PORTD PORTA, PORTB, PORTC, PORTD PORTA, PORTB, PORTC (IOH 15µA) PORTA, PORTB, PORTC (IOL= 300µA) (set PA.1and PA.2 ALARM output (set PA.1and PA.2 ALARM output SEGx, SEG1 output port (for reference only) SEGx, SEG1 output port (for reference only) COMx, (for reference only) COMx, (for reference only) HALT mode Conditions
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NT6611
Electrical Characteristics (VDD 5.0V, 25°C, FOSC 32.768KHz, unless otherwise specified)
Parameter Operating Voltage Operating Voltage Standby Current Standby Current Input High Voltage Input Voltage Output High Voltage Output Voltage Output High Voltage Output Voltage Output Voltage Output Voltage Output Voltage Output Voltage Lighting Note: Operation frequency ISB1 ISB1x (Frequency/32.768KHz) Operation frequency Iopx (Frequency/32.768KHz) Iop, Isb1 Isb2 Iopx ISB1x ISB2x Symbol ISB1 ISB2 VOH1 VOL1 VOH2 VOL2 VOH3 VOL3 VOH4 VOL4 ILCD 19.5 HALT mode Min. Typ. Max. Unit Conditions PORTA, PORTB, PORTC (IOH 15µA) PORTA, PORTB, PORTC (IOL= 300µA) (set PA.1 PA.2 ALARM output output pins unload (STOP mode) off, current PORTA, PORTB, PORTC, PORTD PORTA, PORTB, PORTC, PORTD SEGx, SEG1 output port (for reference only) SEGx, SEG1 output port (for reference only) COMx, (for reference only) COMx, (for reference only)
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NT6611
Characteristics (VDD 3.0V, 25°C, FOSC 32.768KHz unless otherwise specified)
Parameter Oscillation Start Time Halt Time Stop Time Frequency Stability Frequency Variation Symbol TSTT THTT TSPT Min. Typ. Max. Unit reduces Isb1 after instruction executing reduces Isb2 after instruction executing [F(3.0)-F(2.4)]/F(3.0), crystal oscillator (for reference only) (for reference only) Conditions
Characteristics (VDD 3.0V, 25°C, FOSC= 262KHz, unless otherwise specified)
Parameter Oscillation Start Time Halt Time Stop Time Frequency Stability Frequency Variation Symbol TSTT THTT TSPT Min. Typ. Max. Unit reduces Isb1 after instruction executing reduces Isb3 after instruction executing F(3.0)-F(2.4)/F(3.0), oscillator (for reference only) variation caused process variation (for reference only) Conditions
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NT6611
Timing Waveform
duty, bias waveform
Select Unselect Light Unlight
COMX
SEGX
15.625ms COM4 VDD3 COM1 COM3 VDD1 VDD3 COM2 COM2 VDD2 VDD1 COM1 VDD3 COM3 VDD2 VDD1 VDD3 COM4 VDD2 VDD1 SEGn+1 SEGn VDD3 VDD2 VDD1 VDD2 3.9ms
SEGn
SEGn+1
VDD3 VDD2 VDD1 VDD3 VDD2 VDD1 -VDD1 -VDD2 -VDD3
COM4 SEGn
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NT6611
duty, bias waveform
Select Unselect Light Unlight
11.7ms 3.9ms COM3 VDD2 VDD1
COM1
COM2 COM1 SEGn+2 COM2
VDD2 VDD1
COM3
VDD2 VDD1
SEGn+1 SEGn COM4 VDD2 VDD1
SEGn
VDD2 VDD1
SEGn+1
VDD2 VDD1
COM1 SEGn
VDD2 VDD1 -VDD1 -VDD2
waveform
Heavy load
more
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NT6611
Application Circuits (for reference only)
NT6611 chip substrate connects system ground. 262K (code option) Panel: duty, bias; (S/W select duty, auto bias) Panel: duty, bias; (S/W select duty, auto bias; ignore duty segments) PORTA
bias
RESET
NT6611
OSCI PORTA 750K TEST
OSC: 32.768KHz crystal (code option) LCD: duty, bias PORTB PORTA.0: external interrupt PORTA.1, PORTA.2: ALARM output (carrier frequency: 2KHz 4KHz code option) (code option)
bias
RESET PORTA.0 PORTA.1 PORTA.2 OSCI
NT6611
OSCO TEST
32768Hz
BUZZER
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NT6611
Application Circuits (continued)
OSC: 32.768KHz LCD: duty, bias PORTB.1 Output When higher than VLCD, reducing toVDD1 regulate voltage.
bias
VDD1 RESET OSCI
NT6611
OSCO PORTB.1 TEST
32768Hz
VDD1
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NT6611
Bonding Diagram
SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3
COM3 COM4 OSCI OSCO PORTD3 PORTD2 1790µm PORTD1 PORTD0 PORTC3 PORTC2 PORTC1 PORTC0 PORTB3
NT6611
1750µm
Substrate connects GND. bonding wire with diameter 1.0mil recommended. Designation SEG2 SEG1 TEST RESET PORTA0 PORTA1 PORTA2 PORTA3 PORTB0 PORTB1 PORTB2 PORTB3 PORTC0 PORTC1 PORTC2 PORTC3 PORTD0 PORTD1 PORTD2 PORTD3 OSCO OSCI COM4 -627 -517 -407 -297 -164 -I64 -770 -770 -770 -770 -770 -673 -770 -770 -770 -770 -770 -770 -770 -768 -650 -530 -421 -309 -200 Designation COM3 COM2 COM1 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3
unit: -165 -275 -385 -513 -641 -770 -164 -274 -392 -515 -625 -747 -747 -747 -747 -747 -747 -747 -747 -747 -747 -747 -747 -747 -747
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NT6611
Ordering Information
Part NT6611H Package CHIP FORM
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