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TC260 SD10 macros enable building high speed interfaces while consumin


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TC260 SD10 1.6/3.2Gb/s Dual Mode SerDes Macros
TC260 SD10 macros enable building high speed interfaces while consuming limited number pins between integrated circuits (ICs) implemented standard cell embedded array Toshiba's TC260 technology. More specifically, SD10 dual mode serial `SerDes' interface. supports data rates bands: 1-1.6Gb/s 2-3.2Gb/s. Designed high performance, SD10 used backplanes, build integrated physical layer circuits Fibre Channel, GigaEthernet 10GigaEthernet, on-board chipto-chip connections. FEATURES
Enables high bandwidth interfacing between System ICs, with pins Supports data rates bands: 1-1.6Gb/s 2-3.2Gb/s Optional HSPI compatible interface, coding Jitter compliance with GigaEthernet, Fibre Channel, 10GigaEthernet Adjustable interface voltage swing Application support for: High bandwidth backplanes GigaEthernet transceivers 10GigaEthernet XAUI interfaces 100MB/s 200MB/s Fibre Channel transceivers Other industry-standard interfaces On-board chip-to-chip connections Single channel multi-channel, with modular macros optimum configuration Built-in pre-emphasis equalization improved transmission over copper Internal impedance control Optional receiver driver redundancy With design-in support Toshiba's high speed applications team Optimized ASICs Toshiba's advanced TC260 technology 0.14µm drawn gate lengths Logic CMOS embedded DRAM process library including MIPS processors Standard cell embedded array
DESCRIPTION each SD10 interface SD10 transceiver. transceiver contains transmitter block receiver block. transmitter accepts 10-bit wide 8b10b encoded data parallel inputs serializes this data 1-bit wide 3.2Gb/s signal. transmitter driver outputs this signal differential signal over wires. data rate input wires 320Mb/s wire, line with clock rates easily achievable core area ASICs. receiver receiver buffer accepts differential signal recovers timing information. deserializer generates 10-bit wide logic signal, together with aligned clock. Options HSPI compatibility coding. Standard comma detection included. SD10 transceiver requires reference clock signal. transmitter includes pre-emphasis receiver includes equalization extend transmission over longer copper wires. data rates this description examples. Other data rates possible. BLOCK DIAGRAM Shown block diagrams SD10 full-duplex interface SD10 transceiver macro.
320Mb/s Wire Transmitter Block Transceiver Receiver Block Chip 3.2Gb/s Receiver Block Transceiver Transmitter Block Chip 320Mb/s Wire
Each 3.2Gb/s signal transmitted differential signal over wires.
Figure: SD10 Full-duplex Connection
TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
TC260 SD10 1.6/3.2 Gb/s Product Brief
SerDes interface data rate Gb/s 1-1.6 2-3.2 1-1.6 2-3.2 1.0625 1.25 2.125 1.0625 2.125 1-1.6 2-3.2 3.125 0.983
MODE REFCLK
Application
Transmitter
[9:0] Serializer BIST
BIST [9:0] [1:0] Comma Detect Aligner Deserializer Receiver
CDET
CDETEN
Backplanes On-board chip-to-chip 100MB/s Fibre Channel GigaEthernet 200MB/s Fibre Channel 100MB/s 200MB/s Fibre Channel Other industry-standard interfaces 10GigaEthernet 1394b*
Figure: SD10 Transceiver Block Diagram DEFINITION description SD10 transceiver shown below. name signal TD[9:0] REFCLK RD[9:0] RBC[1:0] TXP, RXP, CDETEN CDET MODE[ Description Transmitter block input Clock from chip core Transmit reference clock input Receiver block output Recovered clock, chip core Differential transmitter output signal Differential receiver input signal Enables comma detection byte alignment Enabled when comma characters detected Settings determine serial data rate band, parallel input output data rate, reference clock frequency
Table: Applications Data Rates
Contact Toshiba more information SD10 building devices these applications.
figures below show SD10 transceivers used Fibre Channel, GigaEthernet 10GigaEthernet applications.
Protocol Function
Medium Serilizer 8b10b Transmitter Deserializer Encoding Clock Decoding Receiver Recovery
Medium Medium
SD10 Transceiver
Figure: SD10 Transceiver Macro within Fibre Channel Interface
Reconciliation Layer
8b10b Encoding Decoding
Serilization Deserialization Clock Recovery
Medium Medium Transceiver Medium
Table: SD10 Macro Names Descriptions
SD10 Transceiver
APPLICATIONS Different applications require different data rates. Although designed high performance, SD10 handles range applications data rates.
Figure: SD10 Transceivers within 10GigaEthernet Interface
Reconciliation Layer
8b10b Encoding Decoding
Serilizer Deserializer Clock Recovery
Medium Medium Transceiver
Medium
SD10 Transceiver
Figure: SD10 Transceiver within GigaEthernet Interface
TC260 SD10 1.6/3.2 Gb/s Product Brief
abbreviations figure consistent with GigaEthernet standard explained. PMD: Physical Medium Dependent sublayer PMA: Physical Medium Attachment sublayer PCS: Physical Coding Sublayer MAC: Medium Access Control layer GMII: Medium Independent Interface MDI: Medium Dependent Interface Typically, 10-bit frames 8b10b coded. SD10 macro does include 8b10b encoder decoder. These functions provided user, available from third-party vendors Toshiba. SD10 macros enable building single channel multichannel interfaces shown figure right. typical GigaEthernet Fibre Channel applications transmitter blocks receiver blocks kept together transceivers. Backplane on-board chip-to-chip applications separated transmitter blocks
Chip1 Chip
receiver blocks. number SD10 transceivers chip depends serial data rate power consumption budget.
Figure: this Example Multi-channel Interface each Chip Contains Eight SD10 Transceivers.
CHARACTERISTICS Selected characteristics requirements listed. Parameter Zout* Zin* Tosk** Tisk Vod*** ToutR/ToutF Description Transmitter single-ended output impedance Receiver single-ended input impedance Skew between transmitter outputs Tolerable skew between receiver inputs Differential transmitter output signal swing Differential receiver input sensitivity Transmitter output rise/fall time
Output skew package dependent
Minimum -190
Typical
Maximum
Unit
75ohm also supported
50ohm. Voltage swing adjustable
Table: Selected Characteristics Requirements
Parameter Vcc2 Vcc3 Tstart
Description Supply voltage Supply voltage Start-up temperature Operating temperature
Minimum
Typical
Maximum
Unit
Table: Selected Characteristics Requirements
TC260 SD10 1.6/3.2 Gb/s Product Brief
SUPPORT TESTING Toshiba provides full design design-in support. Applications support available from Toshiba's experienced high-speed applications team. testing purposes, SD10 transceiver macro supports BIST. SD10 macro also contains internal loop backs serial testing receiver transmitter path. POSITIONING VERSUS SD11 Toshiba also offers SD11 1.25/2.5Gb/s dual mode SerDes macro. This macro transmits receives data bands 1-1.25Gb/s 2-2.5Gb/s. consumes less power enables building wider multi-channel interfaces. also offers more flexibility width data rate selection parallel input output. SD10 designed high performance. REFERENCES IEEE Draft 802.3z ANSI T11.2 PC-PH NCITS T11.2, Fibre Channel Physical Interface (FC-PI) NCITS T11.2, Fibre Channel High-Speed Parallel Interface (HSPI) ITU-T G.825 ITU-T G.958
trademarks their respective manufacturer registered certain jurisdictions.
TAEC Regional Sales Offices
NORTHWEST Jose, TEL: (408) 526-2400 FAX: (408) 526-2410 Portland, TEL: (503) 629-0818 FAX: (503) 629-0827 SOUTHWEST Irvine, TEL: (949) 453-0224 FAX: (949) 453-0125 Dallas, TEL: (972) 480-0470 FAX: (972) 235-4114 CENTRAL Chicago, TEL: (847) 945-1500 FAX: (847) 945-1044 NORTHEAST Boston, TEL: (781) 224-0074 FAX: (781) 224-1096 Edison, TEL: (732) 248-8070 FAX: (732) 248-8030 SOUTHEAST Atlanta, TEL: (770) 931-3363 FAX: (770) 931-7602
technical data controlled under U.S. Export Administration Regulations subject approval U.S. Department Commerce prior export. export re-export directly indirectly, contravention U.S. Export Administration regulations, strictly prohibited.

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