LC7471 On-Screen Display Controller NTSC-Format Video Prelim

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

LC7471 On-Screen Display Controller NTSC-Format Video Prelim

Datasheet Thumbnail

Top Searches for this datasheet

Ordering number:ENN*4088
LC7471
On-Screen Display Controller NTSC-Format Video
Preliminary Overview
LC7471 video display controller superimposing text low-level graphics onto NTSC-format television receiver. LC7471 incorporates character internal character generator ROM, 24-character 64-line display 176-character display RAM. 288, 18-pixel characters displayed under microprocessor control 24-character 12-line display. LC7471 features selectable pixel width pixel height, vertical horizontal display start positions. also features flashing enable each character position. LC7471 operates from supply available 22-pin shrink DIPs.
Package Dimensions
unit:mm 3059-DIP22S
[LC7471]
7.62
21.2
Features
Complete text graphics video overlay circuitry. 64-character internal character generator ROM. 24-character 64-line display ROM. 176-character display RAM. 288-character display capability. 18-pixel characters. Four pixel widths. Four pixel heights. Selectable background color. Approximately period character flashing option. flashing duty cycle. Internal external synchronization. Serial data control. supply. 22-pin shrink DIP.
0.95
0.48
1.78
0.51min 3.25 3.9max
SANYO DIP22S
Assignment
view
SANYO products described contained herein have specifications that handle applications that require extremely high levels reliability, such life-support systems, aircraft's control systems, other applications whose failure reasonably expected result serious physical and/or material damage. Consult with your SANYO representative nearest before using SANYO products described contained herein such applications. SANYO assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges,or other parameters) listed products specifications SANYO products described contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
81001TN (KT)/5182JN(US) No.4088-1/12
0.25
LC7471
Block Diagram
No.4088-2/12
LC7471
Description
Number Name VSS1 XOUT TEST SCLK LVBK LVCHA VDD2 CVOUT VSS2 CVIN VDD1 SYNI SEPC SEPOUT SEPIN OSCOUT OSCIN VDD1 Digital circuit ground Crystal oscillator input Crystal oscillator output Test output Active-LOW reset input with hysteresis Serial data clock input with hysteresis Serial data input with hysteresis Active-LOW chip select input with hysteresis Blanking-level adjustment input Character-level adjustment input Analog circuit supply Composite video output Analog circuit ground Composite video input logic supply Sync separator input Sync separator capacitor connection Sync separator output Vertical sync input Pixel-clock oscillator network connections logic supply Description
Specifications
Absolute Maximum Ratings
Parameter Supply voltage Input voltage Output voltage Allowable power dissipation Operating temperature Storage temperature Symbol Topr Tstg Conditions Ratings
VSS- VSS+7.0 VSS- VDD+0.3
Unit
25°C
VSS- VDD+0.3
+125
Reommended Operating Conditions 25°C
Parameter Logic supply voltage Analog supply voltage Logic supply voltage range Analog supply voltage range Symbol VDD1 VDD2 VDD1 VDD2 Conditions Ratings 1.27VDD1 Unit
Electrical Characteristics +70°C, VDD1 unless otherwise noted
Parameter Supply current SIN, SCLK LOW-level input voltage SIN, SCLK HIGH-level input voltage SYNI composite video input voltage CVIN composite video input voltage OSCIN LOW-level input current SIN, RST, SCLK SEPIN HIGH-level input current SEPOUT LOW-level output voltage SEPOUT HIGH-level output voltage Oscillator frequency CVOUT leakage current Symbol VIN1 VIN2 fOSC VI=VSS VI=VDD VDD1=4.5V, IOL=1mA VDD1=4.5V, IOH=1mA fXTAL=4fSC fXTAL=2fSC oscillator 14.318 7.159 Conditions VRST=VDD1, fXTAL=14.31MHz, fLC=7MHz, VDD2 outputs open
VSS-
0.8VDD1
Ratings
0.2VDD1
VDD1+0.3
Unit VP-P VP-P
No.4088-3/12
LC7471
Timing Characteristics +75°C, VDD1 5±0.5V
Parameter SCLK input pulsewidth HIGH-level input pulsewidth data enable input setup time data input setup time data enable input hold time data input hold time 16-bit data word write time data write time Symbol tW(SCLK) tW(CS) tSU(CS) tSU(SIN) tH(CS) tH(SIN) tword Conditions Ratings Unit
Input Timing Data address words input serial format SIN. 16-bit address word followed 16-bit data words input after falling edge address automati-
cally increments after each data word. data input timing shown following figure.
Only lower eight bits address word significant. Only lower eight bits data words addresses 000H 0AFH, lower bits data words
addresses 0B0H 0BBH lower bits data words addresses 0BCH 0BFH significant. non-significant bits should
No.4088-4/12
LC7471
Memory Configuration memory organized 16-bit words shown following table. Locations 000H 0AFH display RAM, locations 0B0H through 0BBH display line
Address 000H 0AFH 0B0H 0B1H 0B2H 0B3H 0B4H 0B5H 0B6H 0B7H 0B8H 0B9H 0BAH 0BBH 0BCH 0BDH 0BEH 0BFH Memory contents
HSZ31
address registers, locations 0BCH 0BDH display control registers, location 0BEH video signal control register location 0BFH general control register.
ADR5 ADR5 ADR5 ADR5 ADR5 ADR5 ADR5 ADR5 ADR5 ADR5 ADR5 ADR5
ADRA ADRA ADRA ADRA ADRA ADRA ADRA ADRA ADRA ADRA ADRA ADRA
HSZ30
ADR9 ADR9 ADR9 ADR9 ADR9 ADR9 ADR9 ADR9 ADR9 ADR9 ADR9 ADR9
HSZ21
ADR8 ADR8 ADR8 ADR8 ADR8 ADR8 ADR8 ADR8 ADR8 ADR8 ADR8 ADR8
HSZ20
ADR7 ADR7 ADR7 ADR7 ADR7 ADR7 ADR7 ADR7 ADR7 ADR7 ADR7 ADR7
HSZ11
ADR4 ADR4 ADR4 ADR4 ADR4 ADR4 ADR4 ADR4 ADR4 ADR4 ADR4 ADR4
ADR3 ADR3 ADR3 ADR3 ADR3 ADR3 ADR3 ADR3 ADR3 ADR3 ADR3 ADR3
ADR2 ADR2 ADR2 ADR2 ADR2 ADR2 ADR2 ADR2 ADR2 ADR2 ADR2 ADR2
ADR1 ADR1 ADR1 ADR1 ADR1 ADR1 ADR1 ADR1 ADR1 ADR1 ADR1 ADR1
ADR0 ADR0 ADR0 ADR0 ADR0 ADR0 ADR0 ADR0 ADR0 ADR0 ADR0 ADR0
Description
Display with 6-bit character code flashing enable Address display first character line Address display first character line Address display first character line Address display first character line Address display first character line Address display first character line Address display first character line Address display first character line Address display first character line Address display first character line Address display first character line Address display first character line Hrizontal display start position pixel width Vertivcal display start position pixel height Video signal phase, display blanking, oscillator control system reset selection Character blanking, flashing, test mode selection
ADR6 ADR6 ADR6 ADR6 ADR6 ADR6 ADR6 ADR6 ADR6 ADR6 ADR6 ADR6
HSZ10
VSZ31
VSZ30
VSZ21
VSZ20
VSZ11
VSZ10
INT/
BLK1
BLK0
BCOL
Note don't care Horizontal Display Control Register (0BCH) function each horizontal display control register shown following table. Note that LOWlevel pulse resets bits
Data Name HSZ10 HSZ11 HSZ20 HSZ21 HSZ30 HSZ31 where period clock oscillator. Note that increments multiples 4TC. Selects line pixel width shown table Selects line pixel width shown table Selects line line pixel width shown table function Selects horizontal start position display screen, given following equation Function
Table Line pixel width
HSZ11 HSZ10 Width 1TC/pixel 2TC/pixel 3TC/pixel 4TC/pixel
Table Line pixel width
HSZ21 HSZ20 Width 1TC/pixel 2TC/pixel 3TC/pixel 4TC/pixel
Table Line line pixel width
HSZ31 HSZ30 Width 1TC/pixel 2TC/pixel 3TC/pixel 4TC/pixel
No.4088-5/12
LC7471
Vertical Display Control Register (0BDH) function each vertical display control register shown following table. Note that LOW-level pulse resets bits
Data Name VSZ10 VSZ11 VSZ20 VSZ21 VSZ30 VSZ31 Selects line pixel height shown table Selects line pixel height shown table Selects line line pixel height shown table function where horizontal sync pulsewidth. Note that increments multiples lines from line line Selects vertical start position display screen, given following equation Function
Table Line pixel height
HSZ11 HSZ10 Height 1H/pixel 2H/pixel 3H/pixel 4H/pixel
Table Line pixel height
HSZ21 HSZ20 Height 1H/pixel 2H/pixel 3H/pixel 4H/pixel
Table Line line pixel height
VSZ31 VSZ30 Height 1H/pixel 2H/pixel 3H/pixel 4H/pixel
relationships between vertical sync horizontal sync pulses between horizontal vertical display start positions shown following figure.
No.4088-6/12
LC7471
Video Signal Control Register (0BEH) function each video signal control register shown following table. Note that LOW-level pulse resets bits
Data Name INT/NON Function Selects phase, hence background color, color burst shown table function function function Resets registers turns display when Note that device remains reset until goes HIGH again. function Selects character display when when Turns crystal oscillator oscillator when OFF, when Note that oscillators turned only when external synchronization selected character display OFF. function function Selects 262.5 lines/field, interlaced display when ines/field, non-interlaced display, when function
Table Phase selection
Phase phase
General Control Register (0BFH) function each general control register shown following table. Note that LOW-level pulse resets bits
Data Name BCOL BLK0 BLK1 function Selects external horizontal vertical synchronization when internal, when Selects display flashing duty cycle shown table Selects flashing period approximately when approximately when function Selects blanking area display shown table function function Selects normal operation when test mode, when Note that test mode should selected during normal operation. function Function Selects background color when (valid internal synchronization only), 0FF, when
Table Flashing duty cycle selection
Duty cycle Flashing
Table Blanking area selection
BLK1 BLK0 Blanking area Blanking Character size Frame size Total area
No.4088-7/12
LC7471
Display Configuration display configured 1,536 words from address 000H 5FFH shown following table. Each 16-bit word contains 7-bit character code single control bit. When control 7-bit character code significant used address character generator ROM, when 7-bit character
Address 000H Video signal control bits
ROM/
code ignored character code read from display RAM. display address automatically increments each time character code read from RAM. Note that your local SANYO representative offer advice specify generator character ROM.
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
Description
Address first character line
017H 018H
ROM/ ROM/
ADR5 ADR5
ADR4 ADR4
ADR3 ADR3
ADR2 ADR2
ADR1 ADR1
ADR0 ADR0
Address twenty-fourth character line Address first character line
5FFH
ROM/
ADR5
ADR4
ADR3
ADR2
ADR1
ADR0
Address twenty-fourth character line
function each significant display word shown following table.
Data Name ADR0 ADR1 ADR2 ADR3 ADR4 ADR5 ADR6 ROM/RAM Should Selects direct addressing. Selects indirect addressing from RAM. Specifies character generator address. ADR0 ADR5 should when Description
line addresses display shown following table.
Line Address(hex) Line Address(hex) Line Address(hex) Line Address(hex)
No.4088-8/12
LC7471
Screen Configuration character screen display configured lines characters, making maximum number characters when smallest character size used. number characters that displayed reduces character size increased. character screen configuration shown following table.
Line
Character number
start address each twelve display lines specified display line address registers RAM. example arrangement addresses shown following table. Note both addresses increment.
Character configuration (hex) Line
No.4088-9/12
LC7471
Composite Video Output character background images superimposed onto composite video signal. composite video signal output levels when sync pulse level 1.2V VDD=5.000V shown following figure voltages corresponding relative carrier amplitudes following table.
Relative carrier amplitude (IRE)
Output voltage amplitude 3.200 2.986 2.485 2.057 1.851 1.771 1.486 1.200
No.4088-10/12
LC7471
composite video signal output levels when sync pulse level 1.2V VDD=5.000V shown following figure, voltages corresponding relative carrier amplitudes following table.
Relative carrier amplitude (IRE)
Output voltage amplitude 2.800 2.628 2.100 1.657 1.480 1.375 1.075 0.800
No.4088-11/12
LC7471
Specifications SANYO products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer's products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer's products equipment. SANYO Electric Co., Ltd. strives supply high-quality high-reliability products. However, semiconductor products fail with some probability. possible that these probabilistic failures could give rise accidents events that could endanger human lives, that could give rise smoke fire, that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO products(including technical data,services) described contained herein controlled under applicable local export control laws regulations, such products must expor without obtaining expor license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written permission SANYO Electric Co., Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO product that intend use. Information (including circuit diagrams circuit parameters) herein example only guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties.
This catalog provides information August, 2001. Specifications information herein subject change without notice.
No.4088-12/12

LC7471 On-Screen Display Controller NTSC-Format Video Prelim

Top Searches for this datasheet

Other recent searches