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This document specifies SPANSION memory products that offered both Advanced Micro Devices Fujitsu. Although document marked with name company that originally developed specification, these products will offered customers both Fujitsu.
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There change this datasheet result offering device SPANSION revisions will occur when appropriate, changes will noted revision summary.
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memory
FUJITSU SEMICONDUCTOR DATA SHEET
DS05-20843-4E
FLASH MEMORY
CMOS
MBM29F017A-70/-90/-12
DESCRIPTION
MBM29F017A 16M-bit, V-Only Flash memory organized bytes bits each. bytes data divided into sectors bytes flexible erase capability. data will appear DQ0. MBM29F017A offered 48-pin TSOP package. This device designed programmed insystem with standard system supply. 12.0 required program erase operations. device also reprogrammed standard EPROM programmers. standard MBM29F017A offers access times between allowing operation high-speed microprocessors without wait states. eliminate contention device separate chip enable (CE), write enable (WE), output enable (OE) controls. (Continued)
PRODUCT LINE
Part Ordering Part ±10% MBM29F017A
Address Access Time (ns) Access Time (ns) Access Time (ns)
PACKAGES
48-pin Plastic TSOP
Marking Side
40-pin Plastic
Marking Side
(FPT-48P-M19)
(FPT-48P-M20)
(LCC-40P-M02)
MBM29F017A-70/-90/-12
(Continued)
MBM29F017A command compatible with JEDEC standard single-supply Flash standard. Commands written command register using standard microprocessor write timings. Register contents serve input internal state-machine which controls erase programming circuitry. Write cycles also internally latch addresses data needed programming erase operations. Reading data device similar reading from 12.0 Flash EPROM devices. MBM29F017A programmed executing program command sequence. This will invoke Embedded ProgramAlgorithm which internal algorithm that automatically times program pulse widths verifies proper cell margin. Each sector programmed verified less than seconds. Erase accomplished executing erase command sequence. This will invoke Embedded EraseAlgorithm which internal algorithm that automatically preprograms array already programmed before executing erase operation. During erase, device automatically times erase pulse widths verifies proper cell margin. This device also features sector erase architecture. sector erase mode allows sectors memory erased reprogrammed without affecting other sectors. sector typically erased verified within second already completely preprogrammed). MBM29F017A erased when shipped from factory. MBM29F017A device also features hardware sector group protection. This feature will disable both program erase operations combination eight sector groups memory. sector group consists four adjacent sectors grouped following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, 28-31. Fujitsu implemented Erase Suspend feature that enables user erase hold period time read data from program data non-busy sector. Thus, true background erase achieved. device features single power supply operation both read program functions. Internally generated regulated voltages provided program erase operations. detector automatically inhibits write operations during power transitions. program erase detected Data Polling DQ7, Toggle feature RY/BY output pin. Once program erase cycle been completed, device automatically resets read mode. MBM29F017A also hardware RESET pin. When this driven low, execution Embedded Program Embedded Erase operations will terminated. internal state machine will then reset into read mode. RESET tied system reset circuity. Therefore, system reset occurs during Embedded Program Embedded Erase operation, device will automatically reset read mode. This will enable system microprocessor read boot-up firmware from Flash memory. Fujitsu's Flash technology combines years EPROM E2PROM experience produce highest levels quality, reliability, cost effectiveness. MBM29F017A memory electrically erases bits within sector simultaneously Fowler-Nordheim tunneling. bytes programmed byte time using EPROM programming mechanism electron injection.
MBM29F017A-70/-90/-12
FEATURES
Single read, write, erase Minimizes system level power requirements Compatible with JEDEC-standard commands Pinout software compatible with single-power supply Flash Superior inadvertent write protection 48-pin TSOP, 40-pin Minimum 100,000 write/erase cycles High performance maximum access time Sector erase architecture Uniform sectors bytes each combination sectors erased. Also supports full chip erase Embedded EraseAlgorithms Automatically pre-programs erases chip sector Embedded ProgramAlgorithms Automatically programs verifies data specified address Data Polling Toggle feature detection program erase cycle completion Ready/BUSY output (RY/BY) Hardware method detection program erase cycle completion write inhibit Hardware RESET Resets internal state machine read mode Erase Suspend/Resume Supports reading programming data sector being erased Sector group protection Hardware method that disables combination sector groups from write erase operation sector group consists adjacent sectors bytes each) Temporary sector groups unprotection Hardware method temporarily enable combination sectors from write erase operations
MBM29F017A-70/-90/-12
ASSIGNMENT
TSOP(1) N.C. N.C. N.C. RESET N.C. N.C. N.C. N.C. N.C. RY/BY N.C. N.C.
(Marking Side)
MBM29F017A Normal Bend
(FPT-48P-M19)
N.C. N.C. RESET N.C. N.C. N.C.
(Marking Side)
MBM29F017A Reverse Bend
N.C. N.C. RY/BY N.C. N.C. N.C.
(FPT-48P-M20)
(Continued)
MBM29F017A-70/-90/-12
(Continued)
(TOP VIEW) N.C. RY/BY N.C.
(Marking side)
MBM29F017A SON-40
RESET N.C.
(LCC-40P-M02)
DESCRIPTION
name RY/BY RESET N.C. Function Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Ready-Busy Output Hardware Reset Pin/Sector Protection Unlock Internal Connection Device Ground Device Power Supply
MBM29F017A-70/-90/-12
BLOCK DIAGRAM
RY/BY Buffer
RY/BY
Erase Voltage Generator
Input/Output Buffers
State Control
RESET Command Register
Program Voltage Generator
Chip Enable Output Enable Logic
Data Latch
Y-Decoder
Y-Gating
Detector
Timer Program/Erase
Address Latch
X-Decoder
Cell Matrix
MBM29F017A-70/-90/-12
LOGIC SYMBOL
RESET RY/BY
MBM29F017A-70/-90/-12
DEVICE OPERATION
MBM29F017A User Operations Table Operation Auto-Select Manufacturer Code Auto-Select Device Code Read
RESET Code Code DOUT High-Z High-Z Code High-Z
Standby Output Disable Write Enable Sector Group Protection Verify Sector Group Protection Temporary Sector Group Unprotection Reset (Hardware) Legend: VIL, VIH, VIH,
Pulse Input. CHARACTERISTICS voltage levels.
Manufacturer device codes also accessed command register write sequence. Refer "MBM29F017A Command Definitions". Refer section Sector Group Protection. VIL, initiates write operations.
MBM29F017A-70/-90/-12
MBM29F017A Command Definitions Table Command Sequence Read/Reset*
Write Cycles Req'd
First Second Third Fourth Fifth Sixth Write Cycle Write Cycle Write Cycle Read/Write Write Cycle Write Cycle Cycle Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data Addr. Data XXXh XXXh XXXh XXXh XXXh XXXh RA*2
RD*2
XXXh
Reset/Read*1 Autoselect Byte Program Chip Erase Sector Erase Sector Erase Suspend Sector Erase Resume
XXXh XXXh XXXh XXXh XXXh XXXh XXXh XXXh XXXh XXXh
XXXh XXXh XXXh XXXh
Erase suspended during sector erase with Addr ("H" "L"). Data (B0h) Erase resumed after suspend with Addr ("H" "L"). Data (30h)
Either reset commands will reset device. fourth cycle only read. Notes operations defined "MBM29F017A User Operations". Address memory location read. Autoselect read address that sets Address memory location programmed. Addresses latched falling edge pulse. Address sector erased. combination A20, A19, A18, A17, will uniquely select sector. Data read from location during read operation. Device code/manufacture code address located Data programmed location Data latched rising edge Read Byte program functions non-erasing sectors allowed Erase Suspend mode. command combinations described "MBM29F017A Command Definitions" illegal.
MBM29F017A Sector Protection Verify Autoselect Codes Table Type Manufacture's Code Device Code Sector Group Protection Code (HEX) 01h*
Sector Group Addresses
Outputs protected sector addresses outputs unprotected sector addresses.
MBM29F017A-70/-90/-12
FLEXIBLE SECTOR-ERASE ARCHITECTURE
Thirty byte sectors sector groups each which consists adjacent sectors following pattern; sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, 28-31 Individual-sector multiple-sector erase capability Sector group protection user-definable SA31 SA30 SA29 SA28 byte byte byte byte 1FFFFFh 1EFFFFh 1DFFFFh 1CFFFFh 1BFFFFh 1AFFFFh 19FFFFh 18FFFFh 17FFFFh 16FFFFh 15FFFFh 14FFFFh 13FFFFh 12FFFFh 11FFFFh 10FFFFh Sectors Total 0FFFFFh 0EFFFFh 0DFFFFh 0CFFFFh 0BFFFFh 0AFFFFh 09FFFFh 08FFFFh 07FFFFh 06FFFFh 05FFFFh 04FFFFh byte byte byte byte 03FFFFh 02FFFFh 01FFFFh 00FFFFh 000000h Sector Group Sector Group
MBM29F017A-70/-90/-12
Sector Address Table SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 Address Range 000000h 00FFFFh 010000h 01FFFFh 020000h 02FFFFh 030000h 03FFFFh 040000h 04FFFFh 050000h 05FFFFh 060000h 06FFFFh 070000h 07FFFFh 080000h 08FFFFh 090000h 09FFFFh 0A0000h 0AFFFFh 0B0000h 0BFFFFh 0C0000h 0CFFFFh 0D0000h 0DFFFFh 0E0000h 0EFFFFh 0F0000h 0FFFFFh 100000h 10FFFFh 110000h 11FFFFh 120000h 12FFFFh 130000h 13FFFFh 140000h 14FFFFh 150000h 15FFFFh 160000h 16FFFFh 170000h 17FFFFh 180000h 18FFFFh 190000h 19FFFFh 1A0000h 1AFFFFh 1B0000h 1BFFFFh 1C0000h 1CFFFFh 1D0000h 1DFFFFh 1E0000h 1EFFFFh 1F0000h 1FFFFFh
MBM29F017A-70/-90/-12
Sector Group Addresses Table SGA0 SGA1 SGA2 SGA3 SGA4 SGA5 SGA6 SGA7 Sectors SA11 SA12 SA15 SA16 SA19 SA20 SA23 SA24 SA27 SA28 SA31
MBM29F017A-70/-90/-12
FUNCTIONAL DESCRIPTION
Read Mode MBM29F017A control functions which must satisfied order obtain data outputs. power control should used device selection. output control should used gate data output pins device selected. Address access time (tACC) equal delay from stable addresses valid output data. chip enable access time (tCE) delay from stable addresses stable valid data output pins. output enable access time delay from falling edge valid data output pins. (Assuming addresses have been stable least tACC-tOE time.) Standby Mode There ways implement standby mode MBM29F017A device, using both RESET pins; other RESET only. When using both pins, CMOS standby mode achieved with RESET inputs both held ±0.3 Under this condition current consumed less than standby mode achieved with RESET pins held VIH. Under this condition current reduced approximately During Embedded Algorithm operation, Active current (ICC2) required even VIH. device read with standard access time (tCE) from either these standby modes. When using RESET only, CMOS standby mode achieved with RESET input held ±0.3 "L"). Under this condition current consumed less than standby mode achieved with RESET held "L"). Under this condition current required reduced approximately Once RESET taken high, device requires wake time before outputs valid read access. standby mode outputs high impedance state, independent input. Output Disable With input logic high level (VIH), output from device disabled. This will cause output pins high impedance state. Autoselect autoselect mode allows reading binary code from device will identify manufacturer type. This mode intended programming equipment purpose automatically matching device programmed with corresponding programming algorithm. This mode functional over entire temperature range device. activate this mode, programming equipment must force (11.5 12.5 address identifier bytes then sequenced from device outputs toggling address from VIH. addresses DON'T CARES except (See "MBM29F017A Sector Protection Verify Autoselect Codes" sDEVICE OPERATION.) manufacturer device codes also read command register, instances when MBM29F017A erased programmed system without access high voltage pin. command sequence illustrated "MBM29F017A Command Definitions" sDEVICE OPERATION. (Refer Autoselect Command section.) Byte VIL) represents manufacturer's code (Fujitsu 04h) byte VIH) device identifier code MBM29F017A ADh. These bytes given "MBM29F017A Sector Protection Verify Autoselect Codes" sDEVICE OPERATION. identifiers manufacturer device will exhibit parity with defined parity bit. order read proper device codes when executing Autoselect, must VIL. (See "MBM29F017A Sector Protection Verify Autoselect Codes" sDEVICE OPERATION.) Autoselect mode also facilitates determination sector group protection system. performing read operation address location XX02h with higher order address bits A18, A19, desired sector group address, device will return protected sector group non-protected sector group.
MBM29F017A-70/-90/-12
Write Device erasure programming accomplished command register. contents register serve inputs internal state machine. state machine outputs dictate function device. command register itself does occupy addressable memory location. register latch used store commands, along with address data information needed execute command. command register written bringing VIL, while VIH. Addresses latched falling edge whichever happens later; while data latched rising edge whichever happens first. Standard microprocessor write timings used. Refer Write Characteristics Erase/Programming Waveforms specific timing parameters. Sector Group Protection MBM29F017A features hardware sector group protection. This feature will disable both program erase operations combination eight sector groups memory. Each sector group consists four adjacent sectors grouped following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, 28-31 (see "Sector Group Addresses" sFLEXIBLE SECTOR-ERASE ARCHITECTURE). sector group protection feature enabled using programming equipment user's site. device shipped with sector groups unprotected. activate this mode, programming equipment must force address control (suggest 11.5 VIL. sector addresses (A20, A19, A18) should sector protected. "Sector Address Table" "Sector Group Addresses" sFLEXIBLE SECTOR-ERASE ARCHITECTURE define sector address each thirty (32) individual sectors, sector group address each eight individual group sectors. Programming protection circuitry begins falling edge pulse terminated with rising edge same. Sector addresses must held constant during pulse. Refer figures sector protection waveforms algorithm. verify programming protection circuitry, programming equipment must force address with VIH. Scanning sector addresses (A20, A19, A18) while (A6, will produce logical code device output protected sector. Otherwise device will produce unprotected sector. this mode, lower order addresses, except don't care. Address locations with reserved Autoselect manufacturer device codes. also possible determine sector group protected system writing Autoselect command. Performing read operation address location XX02h, where higher order addresses (A20, A19, A18) desired sector group address will produce logical protected sector group. "MBM29F017A Sector Protection Verify Autoselect Codes" sDEVICE OPERATION Autoselect codes. Temporary Sector Group Unprotection This feature allows temporary unprotection previously protected sector groups MBM29F017A device order change data. Sector Group Unprotection mode activated setting RESET high voltage During this mode, formerly protected sector groups programmed erased selecting sector group addresses. Once taken away from RESET pin, previously protected sector groups will protected again. Refer Waveforms Sector Group Protection" sTIMING DIAGRAM "Sector Group Protection Algorithm" sFLOW CHART. Command Definitions Device operations selected writing specific address data sequences into command register. Writing incorrect address data values writing them improper sequence will reset device read mode. "MBM29F017A Command Definitions" sDEVICE OPERATION defines valid register command sequences. Note that Erase Suspend (B0h) Erase Resume (30h) commands valid only while Sector Erase operation progress. Moreover, both Read/Reset commands functionally equivalent, resetting device read mode.
MBM29F017A-70/-90/-12
Read/Reset Command read reset operation initiated writing read/reset command sequence into command register. Microprocessor read cycles retrieve array data from memory. device remains enabled reads until command register contents altered. device will automatically power-up read/reset state. this case, command sequence required read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that spurious alteration memory content occurs during power transition. Refer Read Characteristics Waveforms specific timing parameters. Autoselect Command Flash memories intended applications where local alters memory contents. such, manufacture device codes must accessible while device resides target system. PROM programmers typically access signature codes raising high voltage. However, multiplexing high voltage onto address lines generally desirable system design practice. device contains autoselect command operation supplement traditional PROM programming methodology. operation initiated writing autoselect command sequence into command register. Following command write, read cycle from address XX00h retrieves manufacture code 04h. read cycle from address XX01h returns device code ADh. (See "MBM29F017A Sector Protection Verify Autoselect Codes" sDEVICE OPERATION.) manufacturer device codes will exhibit parity with defined parity bit. Sector state (protection unprotection) will informed address XX02h. Scanning sector group addresses (A18, A19, A20) while (A6, will produce logical device output protected sector group. terminate operation, necessary write read/reset command sequence into register also write autoselect command during operation, execute after writing read/reset command sequence. Byte Programming device programmed byte-by-byte basis. Programming four cycle operation. There "unlock" write cycles. These followed program set-up command data write cycles. Addresses latched falling edge whichever happens later data latched rising edge whichever happens first. rising edge (whichever happens first) begins programming. Upon executing Embedded ProgramAlgorithm command sequence, system required provide further controls timings. device will automatically provide adequate internally generated program pulses verify programmed cell margin. This automatic programming operation completed when data equivalent data written this which time device returns read mode addresses longer latched. (See "Hardware Sequence Flags".) Therefore, device requires that valid address device supplied system this particular instance time. Data Polling must performed memory location which being programmed. commands written chip during this period will ignored. hardware reset occurs during programming operation, impossible guarantee data being written. Programming allowed sequence across sector boundaries. Beware that data cannot programmed back "1". Attempting either hang device result apparent success according data polling algorithm read from reset/read mode will show that data still "0". Only erase operations convert "0"s "1"s. "DQ2 DQ6" sTIMING DIAGRAM illustrates Embedded Programming Algorithm using typical command strings operations.
MBM29F017A-70/-90/-12
Chip Erase Chip erase cycle operation. There "unlock" write cycles. These followed writing "set-up" command. more "unlock" write cycles then followed chip erase command. Chip erase does require user program device prior erase. Upon executing Embedded EraseAlgorithm command sequence device will automatically program verify entire memory zero data pattern prior electrical erase. system required provide controls timings during these operations. automatic erase begins rising edge last pulse command sequence terminates when data (See Write Operation Status section.) which time device returns read mode. "Embedded Programming Algorithm" sFLOW CHART illustrates Embedded EraseAlgorithm using typical command strings operations. Sector Erase Sector erase cycle operation. There "unlock" write cycles. These followed writing "set-up" command. more "unlock" write cycles then followed sector erase command. sector address (any address location within desired sector) latched falling edge while command (Data 30h) latched rising edge After time-out from rising edge last sector erase command, sector erase operation will begin. Multiple sectors erased concurrently writing cycle operations "MBM29F017A Command Definitions" sDEVICE OPERATION. This sequence followed with writes Sector Erase command addresses other sectors desired concurrently erased. time between writes must less than otherwise that command will accepted erasure will start. recommended that processor interrupts disabled during this time guarantee this condition. interrupts re-enabled after last Sector Erase command written. time-out from rising edge last will initiate execution Sector Erase command (s). another falling edge occurs within time-out window timer reset. (Monitor determine sector erase timer window still open, section DQ3, Sector Erase Timer.) commands other than Sector Erase Erase Suspend during this time-out period will reset device read mode, ignoring previous command string. Resetting device once execution begun will corrupt data that sector. that case, restart erase those sectors allow them complete. (Refer Write Operation Status section DQ3, Sector Erase Timer operation.) Loading sector erase buffer done sequence with number sectors 31). Sector erase does require user program device prior erase. device automatically programs memory locations sector erased prior electrical erase. When erasing sector sectors remaining unselected sectors affected. system required provide controls timings during these operations. automatic sector erase begins after time from rising edge pulse last sector erase command pulse terminates when data (See Write Operation Status section.) which time device returns read mode. Data polling must performed address within sectors being erased. "Embedded Programming Algorithm" sFLOW CHART illustrates Embedded EraseAlgorithm using typical command strings operations. Erase Suspend Erase Suspend command allows user interrupt Sector Erase operation then perform data reads from programs sector being erased. This command applicable ONLY during Sector Erase operation which includes time-out period sector erase. Erase Suspend command will ignored written during Chip Erase operation Embedded ProgramAlgorithm. Writting Erase Suspend command during Sector Erase time-out results immediate termination time-out period suspension erase operation.
MBM29F017A-70/-90/-12
other command written during Erase Suspend mode will ignored except Erase Resume command. Writing Erase Resume command resumes erase operation. addresses "don't-cares" when writing Erase Suspend Erase Resume command. When Erase Suspend command written during Sector Erase operation, device will take maximum suspend erase operation. When device entered erase-suspended mode, RY/BY output will logic "1", will stop toggling. user must address erasing sector reading determine erase operation been suspended. Further writes Erase Suspend command ignored. When erase operation been suspended, device defaults erase-suspend-read mode. Reading data this mode same reading from standard read mode except that data must read from sectors that have been erase-suspended. Successively reading from erase-suspended sector while device erase-suspend-read mode will cause toggle. (See section DQ2.) After entering erase-suspend-read mode, user program device writing appropriate command sequence Byte Program. This program mode known erase-suspend-program mode. Again, programming this mode same programming regular Byte Program mode except that data must programmed sectors that erase-suspended. Successively reading from erase-suspended sector while device erase-suspend-program mode will cause toggle. erasesuspended program operation detected RY/BY output pin, Data polling DQ7, Toggle (DQ6) which same regular Byte Program operation. Note that must read from byte program address while read from address. resume operation Sector Erase, Resume command (30h) should written. further writes Resume command this point will ignored. Another Erase Suspend command written after chip resumed erasing. Write Operation Status Hardware Sequence Flags Table Status Embedded ProgramAlgorithm Embedded EraseAlgorithm progress Erase Suspend Read (Erase Suspended Sector) Erase Suspended Mode Erase Suspend Read (Non-Erase Suspended Sector) Erase Suspend Program (Non-Erase Suspended Sector) Embedded ProgramAlgorithm Exceeded Time Limits Embedded EraseAlgorithm Erase Suspended Mode Erase Suspend Program (Non-Erase Suspended Sector) Data Toggle Toggle Data Toggle*1 Toggle Toggle Toggle Data Data Toggle Toggle Data
Performing successive read operations from address will cause toggle. Reading byte address being programmed while erase-suspend program mode will indicate logic bit. However, successive reads from erase-suspended sector will cause toggle. Notes reserved pins future use. Fujitsu internal only.
MBM29F017A-70/-90/-12
Data Polling MBM29F017A device features Data Polling method indicate host that embedded algorithms progress completed. During Embedded ProgramAlgorithm, attempt read device will produce complement data last written DQ7. Upon completion Embedded ProgramAlgorithm, attempt read device will produce true data last written DQ7. During Embedded EraseAlgorithm, attempt read device will produce output. Upon completion Embedded EraseAlgorithm attempt read device will produce output. flowchart Data Polling (DQ7) shown "Embedded EraseAlgorithm" sFLOW CHART. Data polling will also flag entry into Erase Suspend. will switch start Erase Suspend mode. Please note that address erasing sector must applied order observe Erase Suspend Mode. During Program Erase Suspend, Data polling will perform same regular program execution outside suspend mode. chip erase, Data Polling valid after rising edge sixth pulse write pulse sequence. sector erase, Data Polling valid after last rising edge sector erase pulse. Data Polling must performed sector address within sectors being erased sector that within protected sector group. Otherwise, status valid. Just prior completion Embedded Algorithm operation change asynchronously while output enable (OE) asserted low. This means that device driving status information instant time then that byte's valid data next instant time. Depending when system samples output, read status valid data. Even device completed Embedded Algorithm operations valid data, data outputs still invalid. valid data will read successive read attempts. Data Polling feature only active during Embedded Programming Algorithm, Embedded Erase Algorithm, Erase Suspend, erase-suspend-program mode, sector erase time-out. (See "Hardware Sequence Flags".) Waveforms Chip/Sector Erase Operations" sTIMING DIAGRAM Data Polling timing specifications diagrams. Toggle MBM29F017A also features "Toggle method indicate host system that embedded algorithms progress completed. During Embedded Program Erase Algorithm cycle, successive attempts read toggling) data from device address will result toggling between zero. Once Embedded Program Erase Algorithm cycle completed, will stop toggling valid data will read next successive attempts. During programming, Toggle valid after rising edge fourth pulse four write pulse sequence. chip erase, Toggle valid after rising edge sixth pulse write pulse sequence. Sector Erase, Toggle valid after last rising edge sector erase pulse. Toggle active during sector erase time out. Either toggling will cause toggle. addition, Erase Suspend/Resume command will cause toggle. Waveforms Data Polling During Embedded Algorithm Operations" sTIMING DIAGRAM Toggle timing specifications diagrams.
MBM29F017A-70/-90/-12
Exceeded Timing Limits will indicate program erase time exceeded specified limits (internal pulse count). Under these conditions will produce "1". This failure condition which indicates that program erase cycle successfully completed. Data Polling only operating function device under this condition. circuit will partially power down device under these conditions. pins will control output disable functions described "MBM29F017A User Operations" sDEVICE OPERATION. failure condition also appear user tries program location that previously programmed this case device locks never completes Embedded ProgramAlgorithm. Hence, system never reads valid data never stops toggling. Once device exceeded timing limits, will indicate "1." Please note that this device failure condition since device incorrectly used. this occurs, reset device. Sector Erase Timer After completion initial sector erase command sequence sector erase time-out will begin. will remain until time-out complete. Data Polling Toggle valid after initial sector erase command sequence. Data Polling Toggle indicates device been written with valid erase command, used determine sector erase timer window still open. high ("1") internally controlled erase cycle begun; attempts write subsequent commands (other than Erase Suspend) device will ignored until erase operation completed indicated Data Polling Toggle ("0"), device will accept additional sector erase commands. insure command been accepted, system software should check status prior following each subsequent sector erase command. were high second status check, command have been accepted. Refer "Hardware Sequence Flags" Toggle This toggle bit, along with DQ6, used determine whether device Embedded EraseAlgorithm Erase Suspend. Successive reads from erasing sector will cause toggle during Embedded EraseAlgorithm. device erase-suspended-read mode, successive reads from erase-suspended sector will cause toggle. When device erase-suspended-program mode, successive reads from byte address non-erase suspended sector will indicate logic bit. different from that toggles only when standard program Erase, Erase Suspend Program operation progress. behavior these status bits, along with that DQ7, summarized follows: Mode Program Erase Erase Suspend Read (Erase-Suspended Sector) Erase Suspend Program Toggle Toggle Toggle Toggle Toggle
These status flags apply when outputs read from sector that been erase-suspended. These status flags apply when outputs read from byte address non-erase suspended sector.
MBM29F017A-70/-90/-12
example, used together determine erase-suspend-read mode. (DQ2 toggles while does not.) also "Hardware Sequence Flags" "Temporary Sector Group Unprotection" sTIMING DIAGRAM. Furthermore, also used determine which sector being erased. When device erase mode, toggles this read from erasing sector. RY/BY Ready/Busy MBM29F017A provides RY/BY open-drain output indicate host system that Embedded Algorithms either progress been completed. output low, device busy with either program erase operation. output high, device ready accept read/write erase operation. When RY/BY low, device will accept additional program erase commands with exception Erase Suspend command. MBM29F017A placed Erase Suspend mode, RY/BY output will high, means connecting with pull-up resistor VCC. During programming, RY/BY driven after rising edge fourth pulse. During erase operation, RY/BY driven after rising edge sixth pulse. RY/BY will indicate busy condition during RESET pulse. Refer Waveforms Toggle During Embedded Algorithm Operations" sTIMING DIAGRAM detailed timing diagram. RY/BY pulled high standby mode. Since this open-drain output, several RY/BY pins tied together parallel with pull-up resistor VCC. RESET Hardware Reset MBM29F017A device reset driving RESET VIL. RESET must kept (VIL) least operation progress will terminated internal state machine will reset read mode after RESET driven low. hardware reset occurs during program operation, data that particular location will indeterminate. When RESET internal reset complete, device goes standby mode cannot accessed. Also, note that data output pins tri-stated duration RESET pulse. Once RESET taken high, device requires wake time until outputs valid read access. RESET tied system reset input. Therefore, system reset occurs during Embedded Program Erase Algorithm, device will automatically reset read mode this will enable system's microprocessor read boot-up firmware from Flash memory. Data Protection MBM29F017A designed offer protection against accidental erasure programming caused spurious system level signals that exist during power transitions. During power device automatically resets internal state machine Read mode. Also, with control register architecture, alteration memory contents only occurs after successful completions specific multi-bus cycle command sequences. device also incorporates several features prevent inadvertent write cycles resulting from power-up power-down transitions system noise. Write Inhibit avoid initiation write cycle during power-up power-down, write cycle locked less than VLKO (typically VLKO, command register disabled internal program/erase circuits disabled. Under this condition device will reset read mode. Subsequent writes will ignored until level greater than VLKO. users responsibility ensure that control pins logically correct prevent unintentional writes when above Write Pulse "Glitch" Protection Noise pulses less than (typical) will initiate write cycle.
MBM29F017A-70/-90/-12
Logical Inhibit Writing inhibited holding VIL, VIH. initiate write cycle must logical zero while logical one. Power-Up Write Inhibit Power-up device with will accept commands rising edge internal state machine automatically reset read mode power-up. Handling Package metal portion marking side connected with internal chip electrically. Please attention occur electrical connection during operation. worst case, caused permanent damage device system excessive current.
MBM29F017A-70/-90/-12
ABSOLUTE MAXIMUM RATINGS
Parameter Storage Temperature Ambient Temperature with Power Applied Voltage with respect Ground pins except RESET Power Supply Voltage RESET
Symbol Tstg VIN, VOUT
Rating -2.0 -2.0 -2.0 +125 +7.0 +7.0 +13.5
Unit
Voltage defined basis Minimum voltage input pins -0.5 During voltage transitions, input pins undershoot -2.0 periods Maximum voltage output pins +0.5 During voltage transitions, outputs overshoot +2.0 periods Minimum input voltage RESET pins -0.5 During voltage transitions, RESET pins undershoot -2.0 periods Voltage difference between input power supply voltage (VIN VCC) does exceed +9.0 Maximum input voltage RESET pins +13.0 which overshoot +14.0 periods WARNING: Semiconductor devices permanently damaged application stress (voltage, current, temperature, etc.) excess absolute maximum ratings. exceed these ratings.
RECOMMENDED OPERATING CONDITIONS
Parameter Ambient Temperature Power Supply Voltages Symbol Condition -90/-12 -90/-12 Value +4.75 +4.50 +5.25 +5.50 Unit
Voltage defined basis Note Operating ranges define those limits between which functionality device guaranteed. WARNING: recommended operating conditions required order ensure normal operation semiconductor device. device's electrical characteristics warranted when device operated within these ranges. Always semiconductor devices within their recommended operating condition ranges. Operation outside these ranges adversely affect reliability could result device failure. warranty made with respect uses, operating conditions, combinations represented data sheet. Users considering application outside listed conditions advised contact their FUJITSU representatives beforehand.
MBM29F017A-70/-90/-12
MAXIMUM OVERSHOOT/ MAXIMUM UNDERSHOOT
+0.8 -0.5 -2.0
Maximum Undershoot Waveform
VCC+2.0 VCC+0.5 +2.0
Maximum Overshoot Waveform
+14.0 +13.0 VCC+0.5
Note This waveform applied RESET.
Maximum Overshoot Waveform
MBM29F017A-70/-90/-12
CHARACTERISTICS
Value Parameter Input Leakage Current Output Leakage Current RESET Inputs Leakage Current Active Current Active Current Current (Standby) Symbol ILIT ICC1 ICC2 ICC3 Test Conditions VCC, VOUT VCC, Max, RESET 12.5 VIL, VIL, Max, VIH, RESET Max, ±0.3 RESET ±0.3 Max, RESET Current (Standby, Reset) Input Level Input High Level Voltage Autoselect Sector Protection (A9, RESET) Output Voltage Level Output High Voltage Level VOH2 Lock-Out Voltage VLKO -100 VCC-0.4 ICC4 RESET ±0.3 VOH1 12.0 -2.5 -0.5 11.5 VCC+0.5 12.5 0.45 -1.0 -1.0 +1.0 +1.0 Unit
current listed includes both operating current frequency dependent component MHz). frequency component typically mA/MHz, with VIH. active while Embedded Algorithm (program erase) progress. Applicable sector protection function. (VID -VCC) exceed
MBM29F017A-70/-90/-12
CHARACTERISTICS
Read Only Operations Characteristics Symbol JEDEC Standard Read Cycle Time Address Output Delay Chip Enable Output Delay Output Enable Output Delay Chip Enable Output High-Z Output Enable Output High-Z Output Hold Time From Addresses, whichever occurs first RESET Read Mode tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX tACC tREADY Value Test Setup -70*
Parameter
-90*2
-12*2
Unit
Test Conditions: Output Load: gate Input rise fall times: Input pulse levels: Timing measurement reference level Input: Output:
Test Conditions: Output Load: gate Input rise fall times: Input pulse levels: 0.45 Timing measurement reference level Input: Output:
Diode 1N3064 Equivalent Device Under Test Diode 1N3064 Equivalent
Notes including capacitance including capacitance Test Conditions
MBM29F017A-70/-90/-12
Write (Erase/Program) Operations Parameter Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time
Read Output Enable Hold Time Toggle Data Polling
Symbol
MB29F017A Unit
JEDEC Standard
tAVAV tAVWL tWLAX tDVWH tWHDX
tOES tOEH
Read Recover Time Before Write High Low) Read Recover Time Before Write High Low) Setup Time Setup Time Hold Time Hold Time Write Pulse Width Pulse Width Write Pulse Width High Pulse Width High Programming Operation Sector Erase Operation Delay Time from Embedded Output Enable Setup Time Voltage Transition Time Write Pulse Width Setup Time Active Setup Time Active Recover Time From RY/BY
tGHWL tGHEL tELWL tWLEL tWHEH tEHWH tWLWH tELEH tWHWL tEHEL tWHWH1 tWHWH2
tGHWL tGHEL tWPH tCPH tWHWH1 tWHWH2 tEOE tVCS tVLHT tWPP tOESP tCSP
(Continued)
MBM29F017A-70/-90/-12
(Continued)
Parameter RESET Hold Time Before Read Program/Erase Valid Delay Rise Time RESET Pulse Width Symbol
JEDEC Standard
MB29F017A Unit
tBUSY tVIDR
This does include preprogramming time. This timing Sector Protection operation.
MBM29F017A-70/-90/-12
ERASE PROGRAMMING PERFORMANCE
Limits Parameter Sector Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycle 100,000 16.8 cycle Excludes programming prior erasure Excludes system-level overhead Excludes system-level overhead Unit Comments
TSOP CAPACITANCE
Value Parameter Input Capacitance Output Capacitance Control Capacitance Symbol COUT CIN2 Test Setup VOUT Unit
Note Test conditions +25°C,
CAPACITANCE
Value Parameter Input Capacitance Output Capacitance Control Capacitance Symbol COUT CIN2 Test Setup VOUT Unit
Note Test conditions +25°C,
MBM29F017A-70/-90/-12
TIMING DIAGRAM
Switching Waveforms
WAVEFORM INPUTS Must Steady Change from Change from Change Permitted Does Apply OUTPUTS Will Steady Will Changing from Will Changing from Changing, State Unknown Center Line HighImpedance "Off" State
tACC
Address Stable
tOEH
High-Z
Output Valid
Waveforms Read Operations
MBM29F017A-70/-90/-12
tACC
Address Stable
RESET
High-Z
Output Valid
Waveforms Read Operations
MBM29F017A-70/-90/-12
Cycle
Data Polling
XXXh
tGHWL tWPH tWHWH1
DOUT DOUT
Data
Notes address memory location programmed. data programmed byte address. output complement data written device. DOUT output data written device. Figure indicates last cycles four cycle sequence.
Alternate Controlled Program Operation Timings
MBM29F017A-70/-90/-12
Cycle
Data Polling
XXXh
tGHEL tCPH tWHWH1
DOUT
Data
Notes address memory location programmed. data programmed byte address. output complement data written device. DOUT output data written device. Figure indicates last cycles four cycle sequence.
Alternate Controlled Program Operation Timings
MBM29F017A-70/-90/-12
XXXh
XXXh
XXXh
XXXh
XXXh
tGHWL tWPH
Chip Erase 10h/30h tVCS
Data
sector address Sector Erase. Addresses Chip Erase.
Waveforms Chip/Sector Erase Operations
MBM29F017A-70/-90/-12
tOEH
Valid Data
High-Z
tWHWH1 Invalid Valid Data
High-Z
Valid Data (The device completed Embedded operation). Waveforms Data Polling During Embedded Algorithm Operations
tOEH
tOES
Data (DQ7 DQ0) Toggle Toggle Stop Toggling Valid
Stops Toggling (The device completed Embedded operation). Waveforms Toggle During Embedded Algorithm Operations
MBM29F017A-70/-90/-12
Rising edge last signal
Entire programming erase operations
RY/BY
tBUSY
RY/BY Timing Diagram During Program/Erase Operations
RESET
RY/BY
tREADY
RESET Timing Diagram
MBM29F017A-70/-90/-12
A20, A19,
SGAX
SGAY
tVLHT tOESP tWPP tVLHT tVLHT tVLHT
tCSP
Data
tVCS
SGAX Sector Group Address initial sector SGAY Sector Group Address next sector
Waveforms Sector Group Protection
MBM29F017A-70/-90/-12
tVCS RESET
tVIDR tVLHT
tVLHT RY/BY
Program Erase Command Sequence
tVLHT
Unprotection period
Temporary Sector Group Unprotection
Enter Embedded Erasing
Erase Suspend Erase
Enter Erase Suspend Program Erase Suspend Program
Erase Resume Erase Suspend Read Erase Erase Complete
Erase Suspend Read
DQ2* Toggle with
read from erase-suspended sector.
MBM29F017A-70/-90/-12
FLOW CHART
EMBEDDED ALGORITHMS
Start
Write Program Command Sequence (See Below)
Data Polling Device
Increment Address
Last Address
Programming Completed
Program Command Sequence (Address/Command):
Program Address/Program Data
Embedded Programming Algorithm
MBM29F017A-70/-90/-12
EMBEDDED ALGORITHMS
Start
Write Erase Command Sequence (See Below) Data Polling Toggle Successfully Completed
Erasure Completed
Chip Erase Command Sequence* (Address/Command):
Individual Sector/Multiple Sector* Erase Command Sequence (Address/Command):
Sector Address/30h
Sector Address/30h
Additional sector erase commands optional.
Sector Address/30h
insure command been accepted, system software should check status prior following each subsequent sector erase command. were high second status check, command have been accepted.
Embedded EraseAlgorithm
MBM29F017A-70/-90/-12
Start
Read Byte (DQ7 DQ0) Addr.
Data? Read Byte (DQ7 DQ0) Addr.
Byte address programming sector addresses within sector being erased during sector erase operation sector group address within sector being protected during chip erase operation.
Data? Fail
Pass
Note rechecked even because change simultaneously with DQ5.
Data Polling Algorithm
MBM29F017A-70/-90/-12
Start
Read (DQ7 DQ0) Addr. Read (DQ7 DQ0) Addr.
Toggle Read (DQ7 DQ0) Addr.
Read (DQ7 DQ0) Addr.
Toggle Fail
Pass
Read toggle twice determine whether toggling. rechecked even because stop toggling same time changing "1". Toggle Algorithm
MBM29F017A-70/-90/-12
Start
Sector Addr. (A20, A19, A18)
PLSCNT
VID, VID, VIL, RESET
Activate Pulse
Increment PLSCNT
Time
VIH, should remain
Read from Sector Addr. (A20, A19, A18) PLSCNT Remove from Write Reset Command Data 01h? Protect Another Sector? Device Failed Remove from Write Reset Command
Sector Protection Completed
Sector Group Protection Algorithm
MBM29F017A-70/-90/-12
Start
RESET
Perform Erase Program Operations
RESET
Temporary Sector Unprotection Completed
Protected sector groups unprotected. previously protected sector groups protected once again. Temporary Sector Group Unprotection Algorithm
MBM29F017A-70/-90/-12
ORDERING INFORMATION
Part MBM29F017A-70PFTN MBM29F017A-90PFTN MBM29F017A-12PFTN MBM29F017A-70PFTR MBM29F017A-90PFTR MBM29F017A-12PFTR MBM29F017A-70PNS MBM29F017A-90PNS MBM29F017A-12PNS Package 48-pin plastic TSOP (FPT-48P-M19) 48-pin plastic TSOP (FPT-48P-M20) 40-pin plastic (LCC-40P-M02) Access Time Remarks
MBM29F017
PFTN
PACKAGE TYPE PFTN 48-Pin Thin Small Outline Package (TSOP Normal Bend PFTR 48-Pin Thin Small Outline Package (TSOP Reverse Bend 40-Pin Small Outline Nonleaded Package (SON) SPEED OPTION Product Selector Guide
Device Revision
DEVICE NUMBER/DESCRIPTION MBM29F017 Mega-bit 8-Bit) CMOS Flash Memory V-only Read, Write, Erase Bytes Sectors)
MBM29F017A-70/-90/-12
PACKAGE DIMENSIONS
48-pin Plastic TSOP (FPT-48P-M19)
LEAD
Note Values include resin protrusion. Resin protrusion gate protrusion +0.15(.006)Max(each side). Note Pins width pins thickness include plating thickness. Note Pins width include cutting remainder.
INDEX
Details part
0.25(.010)
0~8°
0.60±0.15 (.024±.006)
20.00±0.20 (.787±.008) 18.40±0.20 (.724±.008)
12.00±0.20
(.472±.008) 1.10 -0.05
+0.10 +.004
.043 -.002 (Mounting height) (Mounting height)
0.50(.020)
0.10(.004)
0.17 -0.08 .007 -.003
+0.03 +.001
0.10±0.05 (.004±.002) (Stand height) 0.22±0.05 (.009±.002) 0.10(.004)
2003 FUJITSU LIMITED F48029S-c-6-7
Dimensions (inches). Note: values parentheses reference values.
(Continued)
MBM29F017A-70/-90/-12
48-pin Plastic TSOP (FPT-48P-M20)
LEAD
Note Values include resin protrusion. Resin protrusion gate protrusion +0.15(.006)Max(each side). Note Pins width pins thickness include plating thickness. Note Pins width include cutting remainder.
INDEX
Details part 0.60±0.15 (.024±.006)
0~8° 0.25(.010)
0.17 -0.08
+0.03 +.001
0.10(.004)
.007 -.003 0.50(.020)
0.22±0.05 (.009±.002)
0.10(.004)
0.10±0.05 (.004±.002) (Stand height)
1.10 -0.05
+0.10 +.004
18.40±0.20
(.724±.008) 20.00±0.20 (.787±.008)
.043 -.002 (Mounting height)
12.00±0.20(.472±.008)
(Mounting height)
2003 FUJITSU LIMITED F48030S-c-6-7
Dimensions (inches). Note: values parentheses reference values.
(Continued)
MBM29F017A-70/-90/-12
(Continued)
40-pin Plastic (LCC-40P-M02)
10.75±0.10(.423±.004)
Note Resin residue marked dimensions 0.15 single side. Note geometry change with models.
0.75(.030)MAX (TOTAL HEIGHT) 0.50(.020)TYP
10.10±0.20 (.398±.008) 10.00±0.10 (.394±.004)
INDEX
0.05(.002)
Details part 0.10(.004)TYP
Details part
*0.625(.025)TYP
0.05(.002)
0(0)MIN (STAND OFF)
0.50(.020)TYP 0.32±0.05 (.013±.002)
1997 FUJITSU LIMITED C40052S-4C-3
Dimensions (inches). Note: values parentheses reference values.
MBM29F017A-70/-90/-12
FUJITSU LIMITED
Rights Reserved. contents this document subject change without notice. Customers advised consult with FUJITSU sales representatives before ordering. information, such descriptions function application circuit examples, this document presented solely purpose reference show examples operations uses Fujitsu semiconductor device; Fujitsu does warrant proper operation device with respect based such information. When develop equipment incorporating device based such information, must assume responsibility arising such information. Fujitsu assumes liability damages whatsoever arising information. information this document, including descriptions function schematic diagrams, shall construed license exercise intellectual property right, such patent right copyright, other right Fujitsu third party does Fujitsu warrant non-infringement third-party's intellectual property right other right using such information. Fujitsu assumes liability infringement intellectual property rights other rights third parties which would result from information contained herein. products described this document designed, developed manufactured contemplated general use, including without limitation, ordinary industrial use, general office use, personal use, household use, designed, developed manufactured contemplated accompanying fatal risks dangers that, unless extremely high safety secured, could have serious effect public, could lead directly death, personal injury, severe physical damage other loss (i.e., nuclear reaction control nuclear facility, aircraft flight control, traffic control, mass transport control, medical life support system, missile launch control weapon system), requiring extremely high reliability (i.e., submersible repeater artificial satellite). Please note that Fujitsu will liable against and/or third party claims damages arising connection with above-mentioned uses products. semiconductor devices have inherent chance failure. must protect against injury, damage loss from such failures incorporating safety design measures into your facility equipment such redundancy, fire protection, prevention over-current levels other abnormal operating conditions. products described this document represent goods technologies subject certain restrictions export under Foreign Exchange Foreign Trade Japan, prior authorization Japanese government will required export those products from Japan.
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