Cost VMEbus Interface Controller Family 80-Mbyte-per-second block

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Cost VMEbus Interface Controller Family 80-Mbyte-per-second block

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CY7C960A
Cost VMEbus Interface Controller Family
80-Mbyte-per-second block transfer rates VME64 transactions provided, including A64/D64, A40/MD32 transfers Auto Slot CR/CSR space standard (Rev. VMEbus transactions implemented VMEbus Interrupter local required Programmable from VMEbus, serial PROM, local DRAM controller, including refresh Local controller Flexible VMEbus address scheme User-configured VMEbus response 64-pin TQFP, 10x10 (CY7C960A)
Functional Description
CY7C960A Slave VMEbus Interface Controller provides board designer with integrated, full-featured VME64 interface. This 64-pin device programmed handle every transaction defined VME64 specification. CY7C960A contains circuitry needed control large DRAM arrays local circuitry without intervention local CPU. There registers read write, complex command blocks constructed memory. CY7C960A simply fetches configuration parameters during power-on reset period. After reset CY7C960A responds appropriately VMEbus activity controls local circuitry transparently.
CY7C960A Logic Block Diagram
STROBE DENO* DENIN* DENIN1* LADI LAEN LEDI LEDO ABEN*
REGION [3:0]
[5:0]
REGION/ TABLE POWER-ON RESET GENERATOR
CY7C964 CONTROLLER
LOCAL ADDRESS CONTROLLER
[7:1] WORD
SYSRESET* DS0* DS1* DTACK* WRITE* IRQ* IACK* IACKIN* IACKOUT*
TIMING GENERATOR
CHIP SELECT OUTPUT PATTERN TABLE
CS[5:0]
CONTROL INTERF REFRESH CONTROLLER INTERRUPT INTERF DRAM CONTROLLER
DATABYTE LANE DECODER
DATA BYTE ENABLE CONTROLLER
[3:0] LACK*
LOCAL CONTROL CIRCUIT
LDEN* PREN* SWDEN* R/W*
LIRQ*
RAS* CAS*
c960-1
Cypress Semiconductor Corporation
3901 North First Street
Jose
95134
408-943-2600 September 2000
CY7C960A
Configuration
CY7C960A
View
CAS*/CS5 ROW/CS2 PREN* SWDEN* RAS*/CS4 COL/CS3 DBE0 DBE1 DBE2 DBE3
LACK* LIRQ* LDEN* REGION3/CS2 REGION2 WRITE* REGION1 REGION0 DENIN* 2728 IRQ* DS1* LWORD DENIN1* LAEN
Functional Description (continued)
CY7C960A controls bridge between VMEbus local DRAM I/O. Once programmed, CY7C960A provides activities such DRAM refresh local handshaking manner that requires additional local circuitry. VMEbus control signals connected directly CY7C960A. VMEbus address data signals connected companion address/data transceivers which controlled CY7C960A. CY7C964 VMEbus Interface Logic Circuit ideal companion device: CY7C964 provides slice data address logic that been optimized VME64 transactions. addition providing specified drive strength timing VME64 transactions, CY7C964 contains circuitry needed multiplex address/data multiplexed VMEbus transactions. contains counters latches needed during operations; also contains address comparators which used board's Slave Address Decoder. application, four CY7C964 devices controlled single CY7C960A. applications, CY7C960A controls CY7C964 devices address latch. design CY7C960A makes unnecessary know details VMEbus transaction timing protocol. complex VMEbus activities translated CY7C960A simple local cycles involving familiar control signals. Similarly, necessary understand operation companion device, CY7C964: control sequences
ABEN* DTACK* DS0* SYSRESET* LEDO LEDI
DENO* IACKOUT* IACKIN* IACK*
LADI STROBE
part generated automatically CY7C960A response VMEbus local activity. more information desired, consult CY7C964 chapter VMEBus Interface Handbook. VMEbus transactions supported CY7C960A include D16, (incl. UAT), MD32, D64, A16, A24, A32, A40, single-cycle block-transfer reads writes, Read-Modify-Write cycles (incl. multiplexed), Address-only (with without Handshake). CY7C960A functions VMEbus Interrupter, supports Auto Slot standard CR/CSR space. CY7C960A also handles LOCK cycles, although full LOCK support possible within constraints CY7C960A pinout. local side, needed program CY7C960A, manage transactions. programmable parameters initialized through either VMEbus, serial PROM, some other local circuit. CY7C960A incorporates reliable power-on reset circuit, parameters self-loaded device power-up after system reset. VMEbus used provide parameters, VMEbus Master provides programming information using protocol, described handbook, which compliant with Auto Slot protocol from VME64 specification. assist generating configuration file, WindowsTM-based program, WinSvic Software, available which guides user through process selecting appropriate options. Contact your Sales Office further details.
CY7C960A
System Diagram Using CY7C960A
[31:0] DRAMMEMORY [3:0], LACK* RAS*, CAS*, ROW,COL
LIRQ* CS[2:0] SWDEN D[31:16] SWAP BUFFER LD[15:0]
DECODER
VCOMP REGION [31:0] [7:1, LWORD]
CY7C964
CY7C964
CY7C964
CY7C964
CY7C960A
A[7:1], LWORD*
D[31:24]
D[23:16]
A[31:24]
A[23:16]
A[15:8]
AM[5:0]
DS1/0* DTACK WRITE*
D[15:8]
D[7:0]
VMEDATABUS ADDRESS
D[31:0]
[31:1], LWORD* VMEI NTERRUPT
IRQ* IACK* IACKIN* IACKOUT* SYSRESET*
CY7C960A
Specifications VMEbus Signals AS*, DS1*, DS0*, DTACK*
Parameter Description Minimum High-Level Input Voltage Maximum Low-Level Input Voltage Minimum High-Level Output Voltage Maximum Low-Level Output Voltage Maximum Input Leakage Current Input Clamp Voltage Maximum Output Leakage Current Test Conditions Comm. Min., Min., Max., Min., Max. VOUT Outputs Disabled -1.2 Industrial -1.2 Military -1.2 Units
Specifications VMEbus Signals AM5, AM4, AM3, AM2, AM1, AM0, IRQ*, Write
Parameter Description Maximum High-Level Input Voltage Maximum Low-Level Input Voltage Minimum High-Level Output Voltage Minimum Low-Level Output Voltage Maximum Input Leakage Current Input Clamp Voltage Maximum Output Leakage Current Test Conditions Comm. Min., Min., Max., Min., Max. VOUT Outputs Disabled -1.2 Industrial -1.2 Military -1.2 Units
Specifications Other Output Signals[1]
Parameter Description Maximum High-Level Input Voltage Maximum Low-Level Input Voltage Minimum High-Level Output Voltage Minimum Low-Level Output Voltage Maximum Input Leakage Current Input Clamp Voltage Maximum Output Leakage Current Test Conditions Comm. Min., Min., Max., Min., Max. VOUT Outputs Disabled -1.2 Industrial -1.2 Military -1.2 Units
Note: Some signals have on-chip pull-up pull-down resistors. these signals value modified.
CY7C960A
Capacitance Signals
Parameters COUT Description Input Capacitance Output Capacitance Test Conditions 25°C, MHz, 5.0V Max. Units
Pullup/Pulldown Current Signals
Parameters Description Input Pull-up Current Input Pull-up Current Test Conditions -55°C, 5.5V -55°C, 5.5V Typ. Max.
Operating Current (CY7C960A)
Parameters Description Test Conditions Maximum Operating Current external load Max. Units
Related Documents
VMEBus Interface Handbook
Ordering Information
Ordering Code CY7C960A-ASC CY7C960A-NC CY7C960A-UM CY7C960A-UMB Document 38-00250-E Package Name Package Type 10x10 body 64-Lead Plastic Thin Quad Flatpack 14x14 body 64-Lead Plastic Thin Quad Flatpack 14x14 body lead Ceramic Quad Flatpack 14x14 body lead Ceramic Quad Flatpack Military Operating Range Commercial
Windows trademark Microsoft Corporation.
CY7C960A
Package Diagrams
64-Pin Thin Plastic Quad Flat Pack
51-85051-A
CY7C960A
Package Diagrams (continued)
64-Lead Plastic Thin Quad Flatpack
CY7C960A
Package Diagrams (continued)
64-Lead Ceramic Quad Flatpack (Cavity
Cypress Semiconductor Corporation, 2000. information contained herein subject change without notice. Cypress Semiconductor Corporation assumes responsibility circuitry other than circuitry embodied Cypress Semiconductor product. does convey imply license under patent other rights. Cypress Semiconductor does authorize products critical components life-support systems where malfunction failure reasonably expected result significant injury user. inclusion Cypress Semiconductor products life-support systems application implies that manufacturer assumes risk such doing indemnifies Cypress Semiconductor against charges.

Cost VMEbus Interface Controller Family 80-Mbyte-per-second block

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