matched-delay outputs: Bank undivided pass-through (QA) Bank programma
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2.5GHz DIFF. IN-TO-LVPECL Precision EdgePROGRAMMABLE CLOCK DIVIDER/FANOUT SY89871U FINAL BUFFER WITH INTERNAL TERMINATION
matched-delay outputs: Bank undivided pass-through (QA) Bank programmable divide (QB0, QB1) Matched delay: outputs have matched delay, independent divider setting Guaranteed performance: 2.5GHz fMAX 250ps tr/tf 670ps (matched delay) 15ps within-device skew jitter design (rms) cycle-to-cycle jitter 10ps (pk-pk) total jitter Power supply 3.3V 2.5V Unique input termination DC-coupled AC-coupled inputs: differential inputs (LVPECL, LVDS, CML, HSTL) TTL/CMOS inputs select reset 100K compatible LVPECL outputs Parallel programming capability Wide operating temperature range: -40°C +85°C Available 16-pin (3mm 3mm) MLFpackage Precision Edge
SY89871U 2.5V/3.3V LVPECL output precision clock divider capable accepting high-speed differential clock input DC-coupled) CML, LVPECL, HSTL LVDS clock input signal dividing down frequency using programmable divider ratio create frequencylocked lower speed version input clock (Bank Available divider ratios typical 622MHz clock system this would provide availability 311MHz, 155MHz, 77MHz 38MHz auxiliary clock components. differential input buffer unique internal termination design that allows access termination network through pin. This feature allows device easily interface different logic standards. VREF-AC reference included AC-coupled applications. SY89871U includes phase-matched output banks. Bank (QA) frequency-matched copy input. Bank (QB0, QB1) divided down output input frequency. Bank Bank maintain matched delay independent divider setting.
APPLICATIONS
OC-3 OC-192 SONET/SDH applications Transponders Oscillators SONET/SDH line cards
FUNCTIONAL BLOCK DIAGRAM
VREF-AC
TYPICAL PERFORMANCE
QA@622MHz QB@155.5MHz
Divided
622MHz Output
/QB0
/QB1
155.5MHz
Decoder
Output
/QB0
/RESET
Precision Edge trademark Micrel, Inc. MicroLeadFrame trademarks Amkor Technology, Inc.
Rev.: Amendment:
Issue Date: February 2003
Micrel
Precision EdgeSY89871U
PACKAGE/ORDERING INFORMATION
Ordering Information
Part Number
VREF-AC
/QB0 /QB1
Package Type MLF-16 MLF-16
Operating Range Industrial Industrial
Package Marking SY89871U SY89871U
SY89871UMI SY89871UMITR*
*Tape Reel
16-Pin MLF
Number Name QB0, /QB0 QB1, /QB1 /RESET VREF-AC Function Differential Buffered Output Clocks: This differential output divided-down version input frequency matched output delay with Bank Divided "Truth Table." Unused output pairs left floating. Differential Buffered Undivided Output Clock. Positive Power Supply: Bypass with 0.1µF//0.01µF capacitors. Output Reset: Internal pull-up. Logic will reset divider select. "Truth Table." Input threshold VCC/2. Differential Input: Internal termination resistors input. "Input Interface Applications" section. Reference Voltage: Equal VCC-1.4V (approx.), used AC-coupled applications. Maximum sink/source current 0.5mA. "Input Interface Applications" section. Termination Center-Tap: LVDS inputs, leave this floating. Otherwise, "Input Interface Application" section. Ground. Select Pins: "Truth Table." LVTTL/CMOS logic levels. Internal pull-up resistor. Logic HIGH left unconnected (divided mode). LSB. Input threshold VCC/2.
TRUTH TABLE
/RESET Bank Output Input Clock Input Clock Input Clock Input Clock Input Clock Bank Outputs Input Clock Input Clock Input Clock Input Clock LOW, HIGH
/RESET
Micrel
Precision EdgeSY89871U
Absolute Maximum Ratings(Note
Supply Voltage (VCC) -0.5V +4.0V Input Voltage (VIN) -0.5V +0.3V Output Current (IOUT) Continuous 50mA Surge 100mA Current (IVT) ±100mA Input Current (IIN) ±50mA VREF-AC Sink/Source Current (IVREF-AC), Note ±2mA Lead Temperature (soldering, 10sec.) 220°C Storage Temperature (TS) -65°C +150°C
Note
Operating Ratings(Note
Supply Voltage (VCC) +2.375V +3.63V Ambient Temperature (TA) -40°C +85°C Package Thermal Resistance MLF(JA) Still-Air 60°C/W 500lfpm 54°C/W MLF(JB), Note Junction-to-Board 32°C/W
Note Note Note
Permanent device damage occur ABSOLUTE MAXIMUM RATINGS exceeded. This stress rating only functional operation implied conditions other than those detailed operational sections this data sheet. Exposure ABSOLUTE MAXIMUM RATlNG conditions extended periods affect device reliability. data sheet limits guaranteed device operated beyond operating ratings. limited drive capability input same package only. Junction-to-board resistance assumes exposed soldered equivalent) device's most negative potential PCB.
ELECTRICAL CHARACTERISTICS(Note
-40°C +85°C, unless otherwise stated. Symbol VDIFF_IN |IIN| VREF-AC
Note Note Note Note Note Note
Parameter Power Supply Voltage Power Supply Current Differential Input Resistance, (IN, /IN) Input HIGH Voltage, (IN, /IN) Input Voltage, (IN, /IN) Input Voltage Swing Differential Input Voltage Swing Input Current, (IN, /IN) Reference Voltage
Condition
2.375
3.63
Units
load, Note Note Notes Notes Note Note -0.3
VCC+0.3 VCC+0.2
VCC-1.525 VCC-1.425 VCC-1.325
circuit designed meet specifications shown above table after thermal equilibrium been established. Specification packaged product only. internal termination (see "Input Stucture Buffer") input current depends applied voltages inputs. apply combination voltages that causes input current exceed maximum limit. "Timing Diagram" definition. (max.) specified when floating. "Typical Operating Characteristics" section VDIFF definition. Operating using limited AC-coupled PECL applications only. Connect directly pin.
Micrel
Precision EdgeSY89871U
(100KEP) LVPECL ELECTRICAL CHARACTERISTICS(Note
3.3V ±10% 2.5V ±5%; -40°C +85°C, -2V, unless otherwise stated. Symbol VOUT VDIFF_OUT
Note Note
Parameter Output HIGH Voltage Output Voltage Output Voltage Swing Differential Output Voltage Swing
Condition
Units
VCC-1.145 VCC-1.020 VCC-0.895 VCC-1.945 VCC-1.820 VCC-1.695 1.10 1050
circuit designed meet specifications shown above table after thermal equilibrium been established. Parameters 2.5V. They vary with VCC. Specification packaged product only.
LVTTL/LVCMOS ELECTRICAL CHARACTERISTICS(Note
3.3V ±10% 2.5V ±5%; -40°C +85°C Symbol
Note Note
Parameter Input HIGH Voltage Input Voltage Input HIGH Current Input Current
Condition
Units
-125 -300
circuit designed meet specifications shown above table after thermal equilibrium been established. Specification packaged product only.
Micrel
Precision EdgeSY89871U
ELECTRICAL CHARACTERISTICS(NOTE
3.3V ±10% 2.5V ±5%; -40°C +85°C, unless otherwise stated. Symbol fMAX tPLH tPHL tSKEW Parameter Maximum Output Toggle Frequency Maximum Input Frequency Differential Propagation Delay IN-to-QA Within-Device Skew (Differential) QB0-to-QB1 Within-Device Skew (Differential) QA-to-QB Part-to-Part Skew (Differential) Tjitter
Note Note Note Note Note Note
Condition Output Swing 400mV Note Input Swing 400mV Input Swing 400mV Note Note Note Note Note
Units
ps(rms) ps(pk-pk)
Cycle-to-Cycle Jitter Total Jitter Reset Recovery Time Output Rise/Fall Times (20% 80%)
Measured with 400mV input signal, duty cycle, loading with VCC-2V, unless otherwise stated. Specification packaged product only. Bank (pass-through) maximum frequency limited output stage. Bank (input-to-output ÷16) accept input frequency >3GHz, while Bank will slew rate limited. Skew measured between outputs under identical transitions. Cycle-to-cycle jitter definition: variation period between adjacent cycles over random sample adjacent cycle pairs. Tjitter_cc=Tn-Tn+1, where time between rising edges output signal. Total jitter definition: with ideal clock input, frequency fMAX (device), more than output edge 1012 output edges will deviate more than specified peak-to-peak jitter value.
TIMING DIAGRAM
VCC/2 /RESET Swing VOUT Swing
Micrel
Precision EdgeSY89871U
TYPICAL OPERATING CHARACTERISTICS
3.3V, 400mV, 25°C, unless otherwise stated.
Output Amplitude Frequency
PROPAGATION DELAY (ps) AMPLITUDE (mV) 1000 1500 2000 2500 3000 3500
Propagation Delay Input Swing
PROPAGATION DELAY (ps)
Propagation Delay Temperature
1000 1200 INPUT SWING (mV)
TEMPERATURE (°C)
FREQUENCY (MHz)
QA@622MHz QB@155.5MHz 622MHz Output
1.25GHz Output
Output Swing (200mV/div.)
155.5MHz Output
Output Swing (100mV/div.)
/QB0 TIME (1ns/div.)
TIME (100ps/div.)
2.5GHz Output
Output Swing (100mV/div.)
TIME (100ps/div.)
Micrel
Precision EdgeSY89871U
DEFINITION SINGLE-ENDED DIFFERENTIAL SWING
VIN, VOUT 800mV (typical)
VDIFF_IN, VDIFF_OUT 1600mV (typical)
Figure Single-Ended Swing
Figure Differential Swing
INPUT BUFFER STRUCTURE
1.86k
1.86k
/RESET
1.86k
1.86k
SY89871U
Figure Simplified Differential Input Buffer
Figure Simplified TTL/CMOS Input Buffer
Micrel
Precision EdgeSY89871U
INPUT INTERFACE APPLICATIONS
PECL
SY89871U VREF-AC 0.01µF VREF-AC
Bypass with 0.01µF
SY89871U
SY89871U .01µF VCC-2V* VREF-AC
Figure DC-Coupled Input Interface
Figure AC-Coupled Input Interface
Figure DC-Coupled PECL Input Interface
PECL Rpd* Rpd* VREF-AC SY89871U
LVDS SY89871U
HSTL SY89871U VREF-AC
0.01µF Note: 3.3V, 2.5V,
VREF-AC
Figure AC-Coupled PECL Input Interface
Figure LVDS Input Interface
Figure HSTL Input Interface
RELATED PRODUCT SUPPORT DOCUMENTATION
Part Number SY89874U Function 2.5GHz Diff. In-to-LVPECL Programmable Clock Divider Fanout Buffer w/Internal Termination MLFApplication Note Solutions Products Applications Data Sheet Link
Micrel
Precision EdgeSY89871U
LVPECL OUTPUT TERMINATION RECOMMENDATIONS
+3.3V
+3.3V
+3.3V
Figure Parallel Termination-Thevenin Equivalent
Note +2.5V systems: 250, 62.5
+3.3V
+3.3V
"source"
"destination" (Optional) 0.01µF
Figure Three-Resistor "Y-Termination"
Note Note Note Note Power-saving alternative Thevenin termination. Place termination resistors close destination inputs possible. resistor sets bias voltage, equal +3.3V systems +2.5V systems optional bypass capacitor intended compensate tr/tf mismatches.
+3.3V
+3.3V -1.3V +3.3V
+3.3V
1.6k
Figure Terminating Unused
Note Note Unused output (/Q) must terminated balance output. +2.5V systems: 250, 62.5, 1.25k, 1.2k.
Micrel
Precision EdgeSY89871U
LEAD MicroLeadFrame(MLF-16)
0.85 +0.15 -0.65 3.00BSC 2.75BSC
0.42 +0.18 -0.18 0.23 +0.07 -0.05 0.01 +0.04 -0.01 1.60 +0.10 -0.10 0.42 +0.18 -0.18
0.65 +0.15 -0.65 0.20 REF.
0.50
2.75BSC 3.00BSC
1.60 +0.10 -0.10
SEATING PLANE VIEW 0.23 +0.07 -0.05 0.01 +0.04 -0.01
0.42 +0.18 -0.18
BOTTOM VIEW
0.40 +0.05 -0.05
0.5BSC EVEN TERMINAL/SIDE
SECTION "C-C" SCALE: NONE
DIMENSIONS THICKNESS ALLOWABLE 0.305mm MAX. PACKAGE WARPAGE 0.05mm. THIS DIMENSION APPLIES PLATED TERMINAL MEASURED BETWEEN 0.20mm 0.25mm FROM TIP. APPLIES ONLY TERMINALS
Package Exposed
Rev.
CompSide Island
Heat Dissipation Heat Dissipation Heavy Copper Plane Heavy Copper Plane
Thermal Consideration 16-Pin MLFPackage (Always solder, equivalent, exposed PCB) Package Notes: Note Package meets Level moisture sensitivity classification, shipped dry-pack form. Note Exposed pads must soldered ground proper thermal management.
MICREL, INC.
1849 FORTUNE DRIVE JOSE, 95131
(408) 944-0800
(408) 944-0970
http://www.micrel.com
information furnished Micrel this datasheet believed accurate reliable. However, responsibility assumed Micrel use. Micrel reserves right change circuitry specifications time without notification customer. Micrel Products designed authorized components life support appliances, devices systems where malfunction product reasonably expected result personal injury. Life support devices systems devices systems that intended surgical implant into body support sustain life, whose failure perform reasonably expected result significant injury user. Purchaser's sale Micrel Products life support appliances, devices systems Purchaser's risk Purchaser agrees fully indemnify Micrel damages resulting from such sale. 2003 Micrel, Incorporated.
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