µPD78F9831 8-BIT SINGLE-CHIP MICROCONTROLLER µPD78F9831 8-bi

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µPD78F9831 8-BIT SINGLE-CHIP MICROCONTROLLER µPD78F9831 8-bi

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INTEGRATED CIRCUIT
µPD78F9831
8-BIT SINGLE-CHIP MICROCONTROLLER
µPD78F9831 8-bit single-chip microcontroller (for driving) 78K/0S series. µPD78F9831 produced replacing internal µPD789830 with larger flash memory. Flash memory written erased electrically without having remove from board. Therefore, µPD78F9831 best suited prototypes system development, low-volume production, systems likely upgraded frequently. functions µPD78F9831 described following user's manuals. Refer these manuals when designing system based µPD78F9831. U13679E µPD789830 Subseries User's Manual 78K/0S Series User's Manual, Instruction U11047E
FEATURES
Internal flash memory: Kbytes sizes Internal Kbytes data bits Variable minimum instruction execution time: From high-speed (0.4 With main system clock running MHz) very low-speed (122 With subsystem clock running 32.768 kHz) ports Serial interface (UART00) controller/driver segment signal outputs common signal outputs bias mode Four timers: 16-bit timer 8-bit timer Watch timer Watchdog timer Pulse output: Clock output/buzzer output Built-in return signal detection circuit Power supply voltage:
APPLICATIONS
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Document U13477EJ1V0DS00 (1st edition) Date Published 2001 CP(K) Printed Japan
mark
shows major revised points.
1998
µPD78F9831
ORDERING INFORMATION
Part Number Package 100-pin plastic LQFP (fine pitch)
µPD78F9831GC-8EU
Data Sheet U13477EJ1V0DS
µPD78F9831
78K/0S SERIES DEVELOPMENT
78K/0S series products shown below. subseries names indicated frames.
Products mass production Subseries products support SMB. Small-scale package, general-purpose applications 44-pin 42/44-pin 30-pin 30-pin 28-pin
PD789046 PD789026 PD789088 µPD789074 PD789014 PD789074 with added subsystem clock PD789014 with enhanced timer increased ROM, capacity PD789074 with enhanced timer increased ROM, capacity PD789026 with enhanced timer
Products under development
On-chip UART capable voltage (1.8 operation
Small-scale package, general-purpose applications converter 44-pin 44-pin 30-pin 30-pin 30-pin 30-pin 30-pin 30-pin
PD789177 PD789167 PD789156 PD789146 PD789134A PD789124A PD789114A PD789104A PD789177Y PD789167Y PD789167 with enhanced 10-bit converter PD789104A with enhanced timer PD789146 with enhanced 10-bit converter PD789104A with added EEPROMµ PD789124A with enhanced 10-bit converter oscillation version PD789104A PD789104A with enhanced 10-bit converter PD789026 with added 8-bit converter multiplier
Inverter control 44-pin
PD789842
On-chip inverter controller UART
drive 52-pin 78K/0S Series
PD789871
Total display outputs:
drive 80-pin 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 64-pin 64-pin 52-pin 52-pin
PD789488 µPD789477 PD789417A PD789407A PD789456 PD789446 PD789436 PD789426 PD789316 PD789306 PD789467 PD789327
SIO, 10-bit converter, on-chip voltage booster type SIO, 8-bit converter, resistance division type PD789407A with enhanced 10-bit converter SIO, 8-bit converter, resistance division type PD789446 with enhanced 10-bit converter SIO, 8-bit converter, on-chip voltage booster type µPD789426 with enhanced 10-bit converter SIO, 8-bit converter, on-chip voltage booster type oscillation version µPD789306 on-chip voltage booster type 8-bit converter on-chip voltage booster type on-chip resistance division type
drive 144-pin 88-pin
PD789835 PD789830
Segment/common outputs: Segments: commons:
ASSP 64-pin 44-pin 44-pin 20-pin 20-pin
PD789803 PD789800 PD789840 PD789861 PD789860
keyboard, on-chip function keyboard, on-chip function keypad, on-chip oscillation version µPD789860 keyless entry, on-chip return circuit
Remark
vacuum fluorescent display (VFD) typical name. some documents, however, described fluorescent indicator panel (FIP). have identical functions.
Data Sheet U13477EJ1V0DS
µPD78F9831
major functional differences among subseries listed below.
Timer 8-Bit 16Watch Serial Interface (UART: MIN. Value Remark
Function Subseries Name Small scale, generalpurpose applications
Capacity (Bytes)
8-Bit 10-Bit
µPD789046 µPD789026 µPD789088 µPD789074 µPD789014
Note (UART: (UART:
On-chip EEPROM oscillation version
Smallscale, generalpurpose applications function
µPD789177 µPD789167 µPD789156 µPD789146
µPD789134A µPD789124A µPD789114A µPD789104A
Inverter control
µPD789842
drive µPD789871 drive µPD789488
(UART: (UART: (UART:
µPD789477
µPD789417A µPD789407A µPD789456 µPD789446 µPD789436 µPD789426 µPD789316 µPD789306 µPD789427 µPD789327
drive ASSP
oscillation version
oscillation version, onchip EEPROM On-chip EEPROM
µPD789835 µPD789830 µPD789803 µPD789800 µPD789840 µPD789861 µPD789860
(UART:
(USB:
Note 10-bit timer: channel
Data Sheet U13477EJ1V0DS
µPD78F9831
FUNCTIONS
Item Internal memory Flash memory data Minimum instruction execution time Kbytes Kbytes bits 0.4/1.6 (operation with main system clock running MHz) (operation with subsystem clock running 32.768 kHz) bits registers 16-bit operations manipulations (such set, reset, test) Total port pins CMOS input/output pins N-ch open-drain input/output Serial interface controller/driver UART mode segment signal outputs common signal outputs bias mode Timers 16-bit timer 8-bit timer Watch timer Watchdog timer Pulse output Vectored interrupt sources Power supply voltage Operating ambient temperature Package Maskable Nonmaskable Clock output/buzzer output internal external interrupts Internal interrupt 100-pin plastic LQFP (fine pitch) Function
General-purpose registers Instruction
ports
Data Sheet U13477EJ1V0DS
µPD78F9831
CONTENTS
CONFIGURATION (TOP VIEW) BLOCK DIAGRAM FUNCTIONS
Port Pins. Non-Port Pins. Input/Output Circuits Handling Unused Pins
MEMORY SPACE INTERRUPT FUNCTIONS FLASH MEMORY PROGRAMMING.18
Selecting Transmission Method Flash Memory Programming Functions Connecting Flashpro Example Settings Flashpro (PG-FP3)
INSTRUCTION OVERVIEW
Legend. Operations.
ELECTRICAL CHARACTERISTICS.28 PACKAGE DRAWINGS
RECOMMENDED SOLDERING CONDITIONS.39 APPENDIX DIFFERENCES BETWEEN µPD78F9831 MASKED PRODUCT APPENDIX DEVELOPMENT TOOLS.41 APPENDIX RELATED DOCUMENTS
Data Sheet U13477EJ1V0DS
µPD78F9831
CONFIGURATION (TOP VIEW)
100-pin plastic LQFP (fine pitch)
µPD78F9831GC-8EU
COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 COM0 P20/INTP0 P21/INTP1 P22/INTP2/BUZ P23/PCL P25/TxD00 P26/RxD00 P40/INTP3
COM14 COM15
P41/INTP4 VDD0 VSS0 RESET VSS1 VDD1
Cautions normal operation mode, connect directly VSS0 VSS1 pin. Connect (Internally Connected) directly VSS0 VSS1 pin. Leave open.
P57/S32 P56/S33 P55/S34 P54/S35 P53/S36 P52/S37 P51/S38 P50/S39
Data Sheet U13477EJ1V0DS
µPD78F9831
IC0, INTP0-INTP4 P00-P07 P10-P17 P20-P26 P30-P34 P40, P50-P57
Buzzer Clock Internally Connected External Interrupt Input Non-connection Port Port Port Port Port Port
RESET RxD00 S0-S39 TxD00 VDD0, VDD1 VSS0, VSS1 XT1,
Programming Clock Reset Receive Data Segment Output Transmit Data Power Supply Programming Power Supply Ground Crystal (Main system Clock) Crystal (Subsystem Clock)
COM0-COM15 Common Output
Data Sheet U13477EJ1V0DS
µPD78F9831
BLOCK DIAGRAM
8-bit TIMER COUNTER 16-bit TIMER COUNTER PCL/P23 BUZ/P22 RxD00/P26 TxD00/P25 P00-P07
PORT0
PORT1
P10-P17
PCL/BUZZER UNIT(PBU)
PORT2
P20-P26
UART00
78K/0S CORE
FLASH MEMORY
PORT3
P30-P34
WATCH TIMER
PORT4
P40,
WATCHDOG TIMER CONTROLLER/ DRIVER
PORT5
P50-P57
S0-S31 S32/P57-S39/P50 COM0-COM15
SYSTEM CONTROL
RESET INTP0/P20 INTP1/P21 INTP2/P22 INTP3/P40 INTP4/P41
VDD0 VSS0 VDD1 VSS1
INTERRUPT CONTROL
Data Sheet U13477EJ1V0DS
µPD78F9831
FUNCTIONS Port Pins
Function Port 8-bit input/output port either input output 1-bit units When used input port, whether on-chip pull-up resistor used specified software. Port 8-bit input/output port either input output 1-bit units When used input port, whether on-chip pull-up resistor used specified software. Port 7-bit input/output port either input output 1-bit units used N-ch open-drain input/output port pin. When Reset Input Also Used
Name P00-P07
P10-P17
Input
P30-P34
Input
INTP0 INTP1 INTP2/BUZ TxD00 RxD00
Port 5-bit input/output port either input output 1-bit units When used input port, whether on-chip pull-up resistor used specified software. Port 2-bit input/output port either input output 1-bit units Port 8-bit input/output port either input output 1-bit units
Input
P50-P57
Input
INTP3 INTP4
Input
S39-S32
Data Sheet U13477EJ1V0DS
µPD78F9831
Non-Port Pins
Input Function External interrupt input which effective edges (rising and/or falling edges) specified When Reset Input Also Used P22/BUZ Input Output Output Output Output Serial data input asynchronous serial interface Serial data output from asynchronous serial interface Buzzer output Clock output Segment signal output from controller/driver Input Input Input Input Output P57-P50 Output Input Input Input Input System reset input Positive supply voltage ports Positive supply voltage circuits other than ports Port section ground potential Ground potential circuits other than ports This internally connected. Connect this directly VSS0 VSS1 also left open). This internally connected. Connect this directly VSS0 VSS1 pin. This internally connected. Leave this open. This used flash memory programming mode applies high voltage when program written verified. normal operation mode, connect this directly VSS0 VSS1 pin. Connected crystal subsystem clock oscillation Common signal output from controller/driver Connected crystal main system clock oscillation Output Input P22/INTP2
Name INTP0 INTP1 INTP2 INTP3 INTP4 RxD00 TxD00 S0-S31 S32-S39 COM0COM15 RESET VDD0 VDD1 VSS0 VSS1
Data Sheet U13477EJ1V0DS
µPD78F9831
Input/Output Circuits Handling Unused Pins
Table lists types input/output circuits each explains unused pins handled. Figure shows configuration each type input/output circuit. Table 3-1. Type Input/Output Circuit Each Handling Unused Pins
Name P00-P07 P10-P17 P20/INTP0 P21/INTP1 P22/INTP2/BUZ P23/PCL P25/TxD00 P26/RxD00 P30-P34 P40/INTP3 P40/INTP4 P50/S39P57/S32 S0-S31 COM0-COM15 RESET 17-I Connect these pins VDD0, VDD1, VSS0, VSS1 respective resistor. Output Leave these pins open. 13-AB Connect these pins VSS0 VSS1 respective resistor. Connect these pins VDD0, VDD1, VSS0, VSS1 respective resistor. Circuit Type Recommended Connection Unused Pins Connect these pins VDD0, VDD1, VSS0, VSS1 respective resistor. Connect these pins VSS0 VSS1 respective resistor.
17-H 18-C
Input Input Input
Connect this VSS0 VSS1 pin. Leave this open. Connect this directly VSS0 VSS1 pin, leave open. Connect this directly VSS0 VSS1 pin. Leave this open. Connect this directly VSS0 VSS1 pin.
Data Sheet U13477EJ1V0DS
µPD78F9831
Figure 3-1. Input/Output Circuits (1/2)
Type
Type VDD0 Data P-ch IN/OUT Output disable N-ch VSS0
Schmitt trigger input with hysteresis
Input enable
Type
Type
VDD0
Pull-up enable VDD0 Data P-ch
P-ch
Input enable
IN/OUT Output disable N-ch VSS0
Type Pull-up enable VDD0 Data
VDD0
Type
P-ch Data
VDD0 P-ch IN/OUT IN/OUT Output disable N-ch VSS0
P-ch
Output disable
N-ch VSS0
Input enable
Data Sheet U13477EJ1V0DS
µPD78F9831
Figure 3-1. Input/Output Circuits (2/2)
Type 13-AB IN/OUT Data Output disable N-ch VSS0 VDD0
Type 17-I VDD0 Data
P-ch
IN/OUT Output disable
N-ch
VSS0
P-ch Input enable
Port read
Input buffer with intermediate withstand voltage
VLC0 VLC3
P-ch N-ch P-ch N-ch
Type feedback cut-off
P-ch
N-ch
P-ch
data VLC2
P-ch N-ch
N-ch
P-ch
N-ch
VSS1
Type 17-H VLC0
P-ch N-ch
Type 18-C VLC0
P-ch N-ch
VLC3
P-ch N-ch P-ch N-ch
VLC1
P-ch N-ch P-ch N-ch
data VLC2
N-ch P-ch N-ch
N-ch P-ch
data VLC4
N-ch P-ch N-ch
N-ch P-ch
VSS1
VSS1
Data Sheet U13477EJ1V0DS
µPD78F9831
MEMORY SPACE
µPD78F9831 access Kbytes memory space. Figure shows memory map. Figure 4-1. Memory
FFFFH Special function register bits FF00H FEFFH Internal high-speed 1,024 bits FB00H FAFFH Unusable FA50H FA4FH data bits Data memory space FA00H F9FFH F700H F6FFH Internal low-speed 1,024 bits F300H F2FFH C000H BFFFH Unusable Program area 0080H 007FH CALLT table area 0040H 003FH Program area 0020H 001FH 0000H 0000H Vector table area BFFFH Unusable
Internal flash memory Program memory space 49,152 bits
Data Sheet U13477EJ1V0DS
µPD78F9831
INTERRUPT FUNCTIONS
There types sources interrupt functions shown below. Nonmaskable interrupt: source Maskable interrupts sources Table 5-1. Interrupt Source List
Vector Table Address 0004H Basic Configuration TypeNote
Interrupt Source Interrupt Type PriorityNote Name Nonmaskable INTWDT Trigger Watchdog timer overflow (watchdog timer mode selected) Watchdog timer overflow (interval timer mode selected) input edge detection
Internal/ External Internal
Maskable
INTWDT
INTP0 INTP1 INTP2 INTSER00
External
0006H 0008H 000AH
Occurrence serial interface (UART00) reception error serial interface (UART00) reception serial interface (UART00) transmission Generation 16-bit timer match signal Occurrence 16-bit timer overflow Logical 16-bit timer match signal overflow signal Generation 8-bit timer match signal Interval timer interrupt Watch timer interrupt return signal detection input edge detection
Internal
000CH
INTSR00
000EH
INTST00
0010H
INTTM40
0012H
INTTM41 INTTM4
0014H 0016H
INTTM00
0018H
INTWTI INTWT INTKR00 INTP3 INTP4
001AH 001CH External 001EH 0020H 0022H
Notes Priorities intended priority more simultaneously generated maskable interrupts. highest priority lowest priority. Basic configuration types correspond Figure 5-1. Remark Only watchdog timer interrupt sources, non-maskable maskable (internal), selected.
Data Sheet U13477EJ1V0DS
µPD78F9831
Figure 5-1. Basic Configuration Interrupt Function Internal nonmaskable interrupt
Internal
Interrupt request
Vector table address generator
Standby release signal
Internal maskable interrupt
Internal
Interrupt request
Vector table address generator
Standby release signal
External maskable interrupt
Internal
INTM0, INTM1, KRM00
Interrupt request
Edge detector
Vector table address generator
Standby release signal
INTM0 External interrupt mode register INTM1 External interrupt mode register KRM00 return mode register Interrupt request flag Interrupt enable flag Interrupt mask flag
Data Sheet U13477EJ1V0DS
µPD78F9831
FLASH MEMORY PROGRAMMING
Flash memory used built-in program memory µPD78F9831. flash memory written even while device mounted target system (on-board write). write program into flash memory, connect dedicated flash writer (Flashpro (model number: FL-PR3, PG-FP3)) both host machine target system. Remark FL-PR3 manufactured Naito Densei Machida Mfg. Co., Ltd.
Selecting Transmission Method
Flashpro writes into flash memory means serial transmission. transmission method used writing selected from those listed Table 6-1. select transmission method, format shown Figure 6-1, according number pulses listed Table 6-1. Table 6-1. Transmission Methods
Transmission Method UART Pseudo 3-wire modeNote TxD00/P25 RxD00/P26 (serial clock input) (serial data input) (serial data output) PinsNote Number Pulses
Notes When flash memory programming mode set, pins used memory programming enter same state that immediately after reset. Therefore, when external device connected port cannot recognize that state port immediately after reset, pins must connected VDD0 VDD1 pin, VSS0 VSS1 resistor. Serial transfer controlling ports using software Caution select transmission method, always corresponding number pulses listed Table 6-1. Figure 6-1. Format Transmission Method Selection
RESET
Data Sheet U13477EJ1V0DS
µPD78F9831
Flash Memory Programming Functions
Flash memory writing other operations performed transmitting/receiving commands data according selected transmission method. Table lists main flash memory programming functions. Table 6-2. Main Flash Memory Programming Functions
Function Batch erase Batch blank check Data write Erases entire contents memory. Checks that entire contents memory have been erased. Write flash memory according specified write start address number bytes data written. Compares entire contents memory with input data. Description
Batch verify
Connecting Flashpro
connection between Flashpro µPD78F9831 varies with transmission method (UART pseudo 3-wire). Figures show connection each transmission method. Figure 6-2. Flashpro Connection UART Mode
Flashpro
PD78F9831
VPPnNote RESET
VDD0, VDD1 RESET RxD00 TxD00 VSS0, VSS1
Note Figure 6-3. Flashpro Connection Pseudo 3-Wire Mode
Flashpro VPPnNote RESET VDD0, VDD1 RESET (serial clock) (serial input) (serial output) VSS0, VSS1
PD78F9831
Note
Data Sheet U13477EJ1V0DS
µPD78F9831
Example Settings Flashpro (PG-FP3)
When writing flash memory using Flashpro (PG-FP3), make following settings. Load parameter file. Select mode serial communication serial clock with type command. Make settings according example settings PG-FP3 shown below. Table 6-3. Example Settings PG-FP3
Communication Mode UART COMM PORT Target Board UART Pseudo 3-wire mode COMM PORT Example Settings PG-FP3 UART-ch0 Target Board 4.1943 9,600 bpsNote Port Target Board Flashpro Target Board Flashpro 4.1943 Pulse NumberNote
Notes This number pulses that supplied Flashpro serial communication initialization. pins that will used communication determined according this number. Select 9,600 bps, 19,200 bps, 38,400 bps, 76,800 bps. Remark COMM PORT Serial port selection Serial clock frequency selection Input clock source selection
Data Sheet U13477EJ1V0DS
µPD78F9831
INSTRUCTION OVERVIEW
instruction µPD78F9831 listed later.
7.1.1
Legend
Operand formats descriptions
description made operand field each instruction conforms operand format instructions listed below (the details conform with assembly specification). more than operand format listed instruction, selected. Uppercase letters, pair used specify keywords, which must written exactly they appear. meanings these special characters follows: Immediate data specification Relative address specification Absolute address specification Indirect address specification Immediate data should described using appropriate values labels. specification values labels must accompanied pair Operand registers, expressed formats, described using both functional names etc.) absolute names (R0, other names listed Table 7-1). Table 7-1. Operand Formats Descriptions
Format saddr saddrp addr16 addr5 word byte Description (R0), (R1), (R2), (R3), (R4), (R5), (R6), (R7) (RP0), (RP1), (RP2), (RP3) Special function register symbol FE20H FF1FH: Immediate data label FE20H FF1FH: Immediate data label (even addresses only) 0000H FFFFH: Immediate data label (only even address 16-bit data transfer instructions) 0040H 007FH: Immediate data label (even addresses only) 16-bit immediate data label 8-bit immediate data label 3-bit immediate data label
Data Sheet U13477EJ1V0DS
µPD78F9831
7.1.2 NMIS Descriptions operation field register (8-bit accumulator) register register register register register register register register pair (16-bit accumulator) register pair register pair register pair Program counter Stack pointer Program status word Carry flag Auxiliary carry flag Zero flag Interrupt request enable flag Flag indicate that nonmaskable interrupt being handled Contents memory location indicated parenthesized address register name Logical product (AND) Logical (OR) Exclusive Inverted data
Upper lower bits 16-bit register
addr16 16-bit immediate data label jdisp8 Signed 8-bit data (displacement value) 7.1.3 Description flag operation field cleared cleared according result restored previous value
(blank) change
Data Sheet U13477EJ1V0DS
µPD78F9831
Operations
Flag Mnemonic #byte saddr, #byte sfr, #byte saddr saddr, sfr, !addr16 !addr16, PSW, #byte PSW, [DE] [DE], [HL] [HL], byte] byte], saddr [DE] [HL] byte] MOVW #word saddrp saddrp,
Note Note Note
Operand
Byte
Clock byte (saddr) byte byte (saddr) (saddr) (addr16) (addr16) byte (DE) (DE) (HL) (HL) byte) byte) (saddr) (sfr) (DE) (HL) byte) word (saddrp) (saddrp)
Operation
Note
Note
Notes Except when Except when Only when Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13477EJ1V0DS
µPD78F9831
Flag Mnemonic XCHW #byte saddr, #byte saddr !addr16 [HL] byte] ADDC #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] SUBC #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] Operand
Note
Byte
Clock byte
Operation
(saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr) (saddr) byte (saddr) (addr16) (HL) byte)
Note Only when Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13477EJ1V0DS
µPD78F9831
Flag Mnemonic #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] ADDW SUBW CMPW #word #word #word saddr saddr INCW DECW RORC ROLC Operand Byte Clock byte (saddr) (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr) (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr) byte (saddr) (addr16) (HL) byte) word word word rr+1 (saddr) (saddr) rr-1 (saddr) (saddr) (CY, Am-1 (CY, Am+1 Am-1 Am+1 Operation
Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13477EJ1V0DS
µPD78F9831
Flag Mnemonic SET1 saddr. sfr. PSW. [HL]. CLR1 saddr. sfr. PSW. [HL]. SET1 CLR1 NOT1 CALL !addr16 Operand Byte Clock (saddr. bit) sfr. PSW. (HL). (saddr. bit) sfr. PSW. (HL). 3)H, 3)L, addr16, 1)H, 1)L, (00000000, addr5 (00000000, addr5), (SP), (SP), NMIS PSW, rpH, rpL, (SP), (SP), addr16 jdisp8 Operation
CALLT
[addr5]
RETI
PUSH
MOVW
!addr16 $addr16
Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13477EJ1V0DS
µPD78F9831
Flag Mnemonic $addr16 $addr16 $addr16 $addr16 saddr. bit, $addr16 Operand Byte Clock Operation jdisp8 jdisp8 jdisp8 jdisp8 jdisp8 (saddr. bit) jdisp8 sfr. jdisp8 jdisp8 PSW. jdisp8 (saddr. bit) jdisp8 sfr. jdisp8 jdisp8 PSW. then jdisp8 then jdisp8 (saddr) (saddr) then jdisp8 (saddr) Operation (Enable Interrupt) (Disable Interrupt) HALT Mode STOP Mode
sfr. bit, $addr16 bit, $addr16 PSW. bit, $addr16 saddr. bit, $addr16
sfr. bit, $addr16 bit, $addr16 PSW. bit, $addr16 DBNZ $addr16
$addr16
saddr, $addr16
HALT STOP
Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13477EJ1V0DS
µPD78F9831
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Parameter Supply voltage Symbol Input voltage Output voltage High-level output current Each Total pins Low-level output current Each Total pins Operating ambient temperature During normal operation During flash memory programming Storage temperature Tstg Pins other than N-ch open drain Conditions Rated Value -0.3 +6.5 -0.3 +10.5 -0.3 -0.3 -0.3 +125
Note Note
Unit
Note less Caution Product quality suffer absolute maximum rating exceeded even momentarily parameter. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions that ensure that absolute maximum ratings exceeded. Remark characteristic dual-function does differ between port function secondary function, unless otherwise stated.
Data Sheet U13477EJ1V0DS
µPD78F9831
CHARACTERISTICS MAIN SYSTEM CLOCK OSCILLATION CIRCUIT
Resonator Ceramic resonator Recommended Circuit
Parameter Oscillator frequency (fX)
Note
Conditions
MIN.
TYP.
MAX.
Unit
Oscillation settling timeNote
Time after reaches MIN. oscillation voltage range
Crystal
Oscillator frequency (fX)Note
Oscillation settling timeNote
External clock
input frequency (fX)
Note
OPEN
input high/low level width (tXH, tXL)
Notes Only characteristic oscillation circuit indicated. description characteristic instruction execution time. Time required oscillation settle once reset sequence ends STOP mode deselected. Cautions When using main system clock oscillation circuit, observe following conditions wiring that section enclosed dotted lines above diagrams, avoid influence wiring capacitance. Keep wiring short possible. allow signal wires cross another. Keep wiring away from wires that carry high, non-stable current. Keep grounding point capacitors same level VSS0. connect grounding point grounding wire that carries high current. extract signal from oscillation circuit. Before switching from subsystem clock back main system clock, always allow sufficient time oscillation settle specifying program. Remark resonator selection oscillator constant, customers requested either evaluate oscillation themselves apply resonator manufacturer evaluation.
Data Sheet U13477EJ1V0DS
µPD78F9831
CHARACTERISTICS SUBSYSTEM CLOCK OSCILLATION CIRCUIT
Resonator Crystal Recommended Circuit
Parameter Oscillator frequency (fXT)Note
Conditions
MIN.
TYP. 32.768
MAX.
Unit
Oscillation settling timeNote
External clock
input frequency (fXT)Note
input high/low level width (tXTH, tXTL)
14.3
15.6
Notes Only characteristic oscillation circuit indicated. description characteristic instruction execution time. Time required oscillation settle after reaches MIN. value oscillation voltage range. Cautions When using subsystem clock oscillation circuit, observe following conditions wiring that section enclosed dotted lines above diagrams, avoid influence wiring capacitance. Keep wiring short possible. allow signal wires cross another. Keep wiring away from wires that carry high, non-stable current. Keep grounding point capacitors same level VSS0. connect grounding point grounding wire that carries high current. extract signal from oscillation circuit. subsystem clock oscillation circuit designed have amplification degree maintain current drain. Therefore, more likely malfunction result noise than main system clock oscillation circuit. When using subsystem clock, therefore, particularly careful attention wired. Remark resonator selection oscillator constant, customers requested either evaluate oscillation themselves apply resonator manufacturer evaluation.
Data Sheet U13477EJ1V0DS
µPD78F9831
CHARACTERISTICS (1/2)
Parameter Output current, high Output current, Symbol Total pins Total pins High-level input voltage VIH1 VIH2 VIH3 VIH4 P00-P07, P10-P17, P23, P25, P50-P57 RESET, P20-P22, P26, P30-P34, P40, (N-ch open drain) XT1, 0.7VDD 0.8VDD 0.7VDD Low-level input voltage VIL1 VIL2 VIL3 VIL4 P00-P07, P10-P17, P23, P25, P50-P57 RESET, P20-P22, P26, P30-P34, P40, (N-ch open drain) XT1, High-level output voltage Low-level output voltage -100 VOL1 Pins other than VOL2 (N-ch open drain) High-level input leakage current ILIH1 P00-P07, P10-P17, P20-P23, P25, P26, P30-P34, P40, P41, P50-P57, RESET XT1, (N-ch open drain) P00-P07, P10-P17, P20-P23, P25, P26, P30-P34, P40, P41, P50-P57, RESET, (When input instruction executed) XT1, (N-ch open drain) When input instruction executed Conditions MIN. TYP. MAX. 0.3VDD 0.2VDD 0.3VDD Unit
ILIH2 ILIH3 Low-level input leakage current ILIL1
ILIL2 ILIL3
Remark characteristic dual-function does differ between port function secondary function, unless otherwise stated.
Data Sheet U13477EJ1V0DS
µPD78F9831
CHARACTERISTICS (2/2)
Parameter High-level output leakage current Low-level output leakage current Software-specified pull-up resistor Power supply currentNote Symbol ILOH ILOL VOUT VOUT P00-P07, P10-P17, P30-P34 5.0-MHz crystal oscillation operating mode 5.0-MHz crystal oscillation HALT mode 32.768-kHz crystal oscillation operating modeNote 32.768-kHz crystal oscillation HALT modeNote STOP mode ±10%Note ±10%Note ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10%
Note
Conditions
MIN.
TYP.
MAX.
Unit
IDD1
0.05
IDD2
Note
IDD3
IDD4
IDD5
Notes Neither power supply current flowing when active (LCDON20 LIPS20 port current (including current flowing through on-chip pull-up resistor) included. During high-speed mode operation (when processor clock control register (PCC) cleared 00H) During low-speed mode operation (when 02H) While main system clock stopping Remark characteristic dual-function does differ between port function secondary function, unless otherwise stated.
Data Sheet U13477EJ1V0DS
µPD78F9831
CHARACTERISTICS
Parameter drive voltage Symbol VLCD VLCD Conditions VAON20 VAON20 Segment output voltageNote VODS When output level VLC0 When output level VLC2 When output level VLC3 Common output voltageNote VODC When output level VLC0 When output level VLC1 When output level VLC4 Segment output resistance Common output resistance input frequency operating currentNote RSEG RCOM fLCD VLCn VLCn COMq, VAON20 VAON20 ILCD1 ILCD2 ±10%, VAON20 ±10%, VAON20 7.81 MIN. VLCD 3/5VLCD 2/5VLCD VLCD 4/5VLCD 1/5VLCD 12.5 10.0 78.13 78.13 TYP. MAX. Unit
Notes Voltages when load applied Total current flowing through VDD0 (including current flowing through divider resistor) When LCDON20 LIPS20 (the display turned internal drive power supplied), power supply current included power supply current IDD5 (STOP mode) characteristics. Remark
Data Sheet U13477EJ1V0DS
µPD78F9831
CHARACTERISTICS Basic operations
Parameter Cycle time (minimum instruction execution time) Interrupt input high/low level width RESET level width Symbol Conditions Operation based main system clock Operation based subsystem clock tINTH, tINTL tRSL INTP0 INTP4 MIN. TYP. MAX. Unit
(main system clock)
Cycle time
Guaranteed operating range
Supply voltage
Serial Interface (UART00)
Parameter Transfer rate Symbol Conditions Operation MIN. TYP. MAX. 78,125 Unit
Data Sheet U13477EJ1V0DS
µPD78F9831
TIMING MEASUREMENT POINTS (except inputs)
0.8VDD 0.2VDD Measurement points 0.8VDD 0.2VDD
CLOCK TIMING
1/fX VIH4 (MIN.) VIL4 (MAX.)
input
1/fXT tXTL tXTH VIH4 (MIN.) VIL4 (MAX.)
input
INTERRUPT INPUT TIMING
tINTL tINTH
INTP0-INTP4
RESET INPUT TIMING
tRSL
RESET
Data Sheet U13477EJ1V0DS
µPD78F9831
DATA MEMORY STOP MODE SUPPLY VOLTAGE DATA RETENTION CHARACTERISTICS
Parameter Data retention power supply voltage Release signal time Oscillation stabilization wait timeNote Symbol VDDDR Conditions MIN. TYP. MAX. Unit
tSREL tWAIT Release RESET Release interrupt request
Note
Notes Oscillation stabilization wait time time stopping operation prevent unstable operation when oscillation started. Selection /fX, /fX, possible with bits (OSTS0 OSTS2) oscillation stabilization time select register (OSTS). Remark System clock oscillation frequency
DATA RETENTION TIMING (STOP mode release RESET)
Internal reset operation HALT mode STOP mode Data retention mode Operation mode
VDDDR STOP instruction execution
tSREL
RESET
tWAIT
DATA RETENTION TIMING (Standby release signal: STOP mode release interrupt signal)
HALT mode STOP mode Data retention mode Operation mode
VDDDR STOP instruction execution
tSREL
Standby release signal (interrupt request) tWAIT
Data Sheet U13477EJ1V0DS
µPD78F9831
FLASH MEMORY WRITE/ERASE CHARACTERISTICS
Parameter Operating frequency Write current (VDD pin) Write currentNote (VPP pin) Erase currentNote (VDD pin) Erase currentNote (VPP pin) Erase time Write count supply voltage VPP0 VPP1 Erase/write regarded cycle. normal operation During flash memory programming 10.0 0.2VDD 10.3 Times IPPE IDDE When supply voltage VPP1 5.0-MHz crystal oscillation operation mode When supply voltage VPP1 IPPW
Note
Symbol IDDW
Conditions
MIN.
TYP.
MAX.
Unit
When supply voltage VPP1 5.0-MHz crystal oscillation operation mode When supply voltage VPP1
Note port current (including current that flows on-chip pull-up resistors) included.
Data Sheet U13477EJ1V0DS
µPD78F9831
PACKAGE DRAWINGS
100-PIN PLASTIC LQFP (FINE PITCH) (14x14)
detail lead
NOTE Each lead centerline located within 0.08 true position (T.P.) maximum material condition.
ITEM
MILLIMETERS 16.00±0.20 14.00±0.20 14.00±0.20 16.00±0.20 1.00 1.00 0.22 +0.05 -0.04 0.08 0.50 (T.P.) 1.00±0.20 0.50±0.20 0.17 +0.03 -0.07 0.08 1.40±0.05 0.10±0.05 1.60 MAX.
S100GC-50-8EU, 8EA-2
Data Sheet U13477EJ1V0DS
µPD78F9831
RECOMMENDED SOLDERING CONDITIONS
µPD78F9831 should soldered mounted under following recommended conditions. details recommended soldering conditions, refer document Semiconductor Device Mounting Technology Manual (C10535E). soldering methods conditions other than those recommended below, contact sales representative. Table 10-1. Surface Mounting Type Soldering Conditions
µPD78F9831GC-8EU: 100-pin plastic LQFP (fine pitch)
Recommended Condition Symbol IR35-00-2
Soldering Method Infrared reflow
Soldering Conditions Package peak temperature: Time: sec. Max. higher), Count: twice less Package peak temperature: Time: sec. Max. higher), Count: twice less temperature: Max., Time: sec. Max. (per row)
VP15-00-2
Partial heating
Caution
different soldering methods together (except partial heating).
Data Sheet U13477EJ1V0DS
µPD78F9831
APPENDIX DIFFERENCES BETWEEN µPD78F9831 MASKED PRODUCT
µPD78F9831 produced replacing internal masked product µPD789830 with larger flash memory, adding ports µPD789830. Unlike bare chips masked products, shipped
µPD78F9831 contained 100-pin plastic LQFP package. Table lists differences between µPD78F9831
µPD789830. Table A-1. Differences between µPD78F9831 µPD789830
Flash Memory Product Item Internal memory Flash memory/ROM display ports Kbytes Kbytes bits Total: port pins P00-P07, P10-P17, P20-P26, P30P34, P40, P41, P50-P57 Total: pins INTP0-INTP4 100-pin plastic LQFP Refer individual related data sheets. Total: port pins P00-P07, P10, P11, P20-P26, P30P34, P50-P57 Total: pins INTP0-INTP2 88-pin bare chip Masked Product
µPD78F9831
Kbytes Kbyte
µPD789830
External interrupt input pins
Interrupt sources Form shipment Electrical characteristics
Data Sheet U13477EJ1V0DS
µPD78F9831
APPENDIX DEVELOPMENT TOOLS
following development tools available system development using µPD78F9831. Language Processing Software
RA78K0SNotes CC78K0S
Notes
Assembler package common 78K/0S Series compiler package common 78K/0S Series Device file µPD789830 Subseries compiler library source file common 78K/0S Series
DF789831
Notes
CC78K0S-L
Notes
Flash Memory Writing Tools
Flashpro (Part FL-PR3Note PG-FP3) FA-100GC-8EUNote Flash programmer dedicated on-chip flash memory microcontroller
Flash memory writing adapter 100-pin plastic LQFP (fine pitch) (GC-8EU type)
Debugging Tools
IE-78K0S-NS In-circuit emulator This in-circuit emulator used debug hardware software when application systems which 78K/0S Series developed. IE-78K0S-NS supports integrated debugger (ID78K0S-NS). IE-78K0S-NS used combination with interface adapter connection adapter, emulation probe, host machine. This adapter used supply power from outlet.
IE-70000-MC-PS-B adapter IE-70000-98-IF-C Interface adapter IE-70000-CD-IF-A card/interface IE-70000-PC-IF-C Interface adapter IE-70000-PCI-IF-A Interface adapter IE-789831-NS-EM1 Emulation board NP-100GC Emulation probe TGC-100SDWNote Conversion adapter SM78K0SNotes ID78K0S-NSNotes DF789831
Notes
This adapter required when PC-9800 series (except notebook type) used host machine IE-78K0S-NS supported). These card interface cable required when notebook used host machine IE-78K0S-NS (PCMCIA socket supported). This adapter required when PC/ATor compatible used host machine IE-78K0S-NS (ISA supported). This adapter required when incorporated personal computer used host machine IE-78K0S-NS. This board used emulate peripheral hardware specific device. IE-789046-NS-EM1 used combination with in-circuit emulator. Board connect in-circuit emulator target system. This used combination with TGC-100SDW. Conversion socket connect NP-100GC target system board which 100-pin plastic LQFP (fine pitch) (GC-8EU type) mounted. System simulator common 78K/0S Series Integrated debugger common 78K/0S Series Device file µPD789830 Subseries
Data Sheet U13477EJ1V0DS
µPD78F9831
Real-time
MX78K0SNotes 78K/0S Series
Notes Based PC-9800 series (Japanese Windows) Based PC/AT compatibles (Japanese/English Windows) Based HP9000 series (HP-UX) SPARCstation (SunOS, Solaris) Products made Naito Densei Machida Mfg. Co., Ltd. (044-822-3813). Product made TOKYO ELETEC Corporation further information, consult: Tokyo Electronic Div. (TEL 03-3820-7112) Osaka Electronic Div. (TEL 06-6244-6672) Daimaru Kogyo Corporation. Remark RA78K0S, CC78K0S, SM78K0S used combination with DF789831.
Data Sheet U13477EJ1V0DS
µPD78F9831
APPENDIX RELATED DOCUMENTS
related documents indicated this publication include preliminary versions. versions marked such. Documents Related Devices
Document Name Document U13284E This document U13679E U11047E U14458E
However, preliminary
µPD789830 Data Sheet µPD78F9831 Data Sheet µPD789830 Subseries User's Manual
78K/0S Series User's Manual, Instruction 78K/0, 78K/0S Series Flash Memory Writing
Documents Related Development Tools (User's Manuals)
Document Name RA78K0S Assembler Package Operation Language Structured Assembly Language CC78K0S Compiler Operation Language SM78K0S, SM78K0 System Simulator Ver.2.10 Later Windows Based SM78K Series System Simulator Ver.2.10 Later Operation Document U11622E U11599E U11623E
U11816E U11817E U14611E
External Part User Open Interface Specifications Operation
created
ID78K0-NS, ID78K0S-NS Integrated Debugger Ver.2.20 Later Windows Based IE-78K0S-NS In-circuit Emulator IE-789831-NS-EM1 Emulation Board PG-FP3 Flash Memory Programmer
U14910E
U13549E U14202E U13502E
Documents Related Embedded Software (User's Manuals)
Document Name 78K/0S Series MX78K0S Fundamental Document U12938E
Caution
related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U13477EJ1V0DS
µPD78F9831
Other Related Documents
Document Name SEMICONDUCTOR SELECTION GUIDE Products Packages (CD-ROM) Semiconductor Device Mounting Technology Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System Guide Prevent Damage Semiconductor Devices Electrostatic Discharge (ESD) Document X13769X C10535E C11531E C10983E C11892E
Caution
related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U13477EJ1V0DS
µPD78F9831
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
registered trademark corporation. EEPROM trademark Corporation. Windows registered trademark trademark Microsoft Corporation United States and/or other countries. PC/AT trademark Corporation. HP9000 series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. SunOS Solaris trademarks Microsystems, Inc.
Data Sheet U13477EJ1V0DS
µPD78F9831
Regional Information
Some information contained this document vary from country country. Before using product your application, pIease contact office your country obtain list authorized representatives distributors. They will verify:
Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements
addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
Electronics (Germany) GmbH
Benelux Office Eindhoven, Netherlands Tel: 040-2445845 Fax: 040-2444580
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics Hong Kong Ltd. Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-3067-5800 Fax: 01-3067-5899 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Electronics (France) S.A. Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290 Madrid Office Madrid, Spain Tel: 091-504-2787 Fax: 091-504-2860
Electronics Singapore Pte. Ltd.
Novena Square, Singapore Tel: 253-8311 Fax: 250-3583
Electronics Taiwan Ltd. Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 Fax: 02-66
Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 Fax: 08-63
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
Brasil S.A.
Electron Devices Division Guarulhos-SP, Brasil Tel: 11-6462-6810 Fax: 11-6462-6829
J01.2
Data Sheet U13477EJ1V0DS
µPD78F9831
[MEMO]
Data Sheet U13477EJ1V0DS
µPD78F9831
information this document current February, 2001. information subject change without notice. actual design-in, refer latest publications NEC's data sheets data books, etc., most up-to-date specifications semiconductor products. products and/or types available every country. Please check with sales representative availability additional information. part this document copied reproduced form means without prior written consent NEC. assumes responsibility errors that appear this document. does assume liability infringement patents, copyrights other intellectual property rights third parties arising from semiconductor products listed this document other liability arising from such products. license, express, implied otherwise, granted under patents, copyrights other intellectual property rights others. Descriptions circuits, software other related information this document provided illustrative purposes semiconductor product operation application examples. incorporation these circuits, software information design customer's equipment shall done under full responsibility customer. assumes responsibility losses incurred customers third parties arising from these circuits, software information. While endeavours enhance quality, reliability safety semiconductor products, customers agree acknowledge that possibility defects thereof cannot eliminated entirely. minimize risks damage property injury (including death) persons arising from defects semiconductor products, customers must incorporate sufficient safety measures their design, such redundancy, fire-containment, anti-failure features. semiconductor products classified into following three quality grades: "Standard", "Special" "Specific". "Specific" quality grade applies only semiconductor products developed based customer-designated "quality assurance program" specific application. recommended applications semiconductor product depend quality grade, indicated below. Customers must check quality grade each semiconductor product before using particular application. "Standard": Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade semiconductor products "Standard" unless otherwise expressly specified NEC's data sheets data books, etc. customers wish semiconductor products applications intended NEC, they must contact sales representative advance determine NEC's willingness support given application. (Note) "NEC" used this statement means Corporation also includes majority-owned subsidiaries. "NEC semiconductor products" means semiconductor product developed manufactured defined above).

µPD78F9831 8-BIT SINGLE-CHIP MICROCONTROLLER µPD78F9831 8-bi

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