µPD78F0833Y 8-BIT SINGLE-CHIP MICROCONTROLLERS DESCRIPTION

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µPD78F0833Y 8-BIT SINGLE-CHIP MICROCONTROLLERS DESCRIPTION

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INTEGRATED CIRCUIT
µPD78F0833Y
8-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
µPD78F0833Y product µPD780833Y Subseries 78K/0 Series, equivalent
µPD780833Y with flash memory place internal ROM.
This device programmed (write, delete, rewrite) without being removed from board. Detailed function descriptions provided following user's manuals. sure read them before designing.
µPD780833Y Subseries User's Manual:
U13892E
78K/0 Series User's Manual Instructions: U12326E
FEATURES
Pin-compatible with mask versions (except pin) Flash memory: (self-programming supported)
Internal high-speed RAM: 1,024 bytes Internal expansion RAM: 2,048 bytes Supply voltage:
Remark differences between flash memory version mask version, refer DIFFERENCES BETWEEN µPD78F0833Y MASK VERSION.
APPLICATIONS
audios, etc.
ORDERING INFORMATION
Part Number Package 80-pin plastic
µPD78F0833YGC-8BT
information this document subject change without notice. Before using this document, please confirm that this latest version.
devices/types available every country. Please check with local representative availability additional information.
Document U15013EJ2V0DS00 (2nd edition) Date Published January 2001 CP(K) Printed Japan
2001
µPD78F0833Y
78K/0 SERIES LINEUP
products 78K/0 Series listed below. names enclosed boxes subseries names.
Products mass production Products under development subseries products compatible with bus. Control PD78075B PD78078
100-pin 100-pin 100-pin 100-pin 80-pin 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 64-pin 42/44-pin
PD78078 with reduced noise PD78078Y PD78070AY µPD780018AY PD780058Y PD78058FY PD78054Y PD780078Y µPD780034AY µPD780024AY PD78018FY PD78054 with timer added enhanced external interface
ROMless version PD78078
PD78070A PD780058 PD78058F PD78054 PD780065 PD780078 µPD780034A µPD780024A PD78014H PD78018F PD78083
Inverter control
PD78078Y with enhanced serial limited functions PD78054 with enhanced serial PD78054 with reduced noise PD78018F with UART added, enhanced PD780024A with expanded PD780034A with timer added enhanced serial PD780024A with enhanced PD78018F with enhanced serial PD78018F with reduced noise
Basic subseries control On-chip UART capable voltage operation (1.8 On-chip inverter controller UART. Reduced noise.
64-pin
PD780988
drive
100-pin 80-pin 80-pin 78K/0 Series 80-pin
PD780208 PD780232 PD78044H PD78044F
drive PD780338
PD78044F with enhanced C/D. Display output total:
panel control. On-chip C/D. Display output total:
PD78044F with N-ch open drain added. Display output total:
Basic subseries driving VFD. Display output total:
120-pin 120-pin 120-pin 100-pin 100-pin 100-pin
PD780308 with enhanced display function timer. Segment signal output: pins max. PD780308 with enhanced display function timer. Segment signal output: pins max. PD780308 with enhanced display function timer. Segment signal output: pins max. PD780308Y PD78064Y PD78064 with enhanced expanded ROM, PD78064 with reduced noise
Basic subseries driving LCD. On-chip UART.
PD780328 PD780318 PD780308 PD78064B PD78064 PD780948 PD78098B PD780701Y PD780833Y
Meter control interface supported
100-pin 80-pin 80-pin 80-pin
On-chip DCAN controller
PD78054 with IEBuscontroller added. Reduced noise.
On-chip DCAN/IEBus controller On-chip J1850 (CLASS2) controller
100-pin 80-pin 80-pin
PD780958 PD780852 PD780824
industrial meter control On-chip controller/driver automobile meter drive automobile meter drive. On-chip DCAN controller
Remark (Vacuum Fluorescent Display) referred FIP(Fluorescent Indicator Panel) some documents, functions same.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
major functional differences among subseries listed below.
Function Subseries Name Control Capacity Timer 8-bit 10-bit 8-bit (UART: I2C: (I2C: Serial Interface External MIN. Value Expansion
8-bit 16-bit Watch
µPD78078Y
µPD78070AY
µPD780018AY
µPD780058Y µPD78058FY
(time-division UART: 1ch, I2C: (UART: I2C: (UART: I2C: (UART: I2C: (I2C: (time-division UART: I2C: (UART: I2C:
µPD78054Y
µPD780078Y
µPD780034AY µPD780024AY
µPD78018FY
drive
µPD780308Y
µPD78064Y
µPD780701Y
(UART: I2C:
interface µPD780833Y supported
Data Sheet U15013EJ2V0DS
µPD78F0833Y
FUNCTION OVERVIEW
Item Internal memory Flash memory High-speed Expansion Memory space General-purpose registers Minimum instruction execution time 1,024 bytes 2,048 bytes bits registers bits registers banks) On-chip minimum instruction execution time variable function 0.48 µs/0.96 µs/1.92 µs/3.84 µs/7.68 4.19 operation) 16-bit operation Multiply/divide bits bits, bits bits) manipulation (set, reset, test, Boolean operation) adjust, etc.
µPD78F0833Y
Instruction
ports
Total: CMOS input: input/CMOS output: N-ch open-drain I/O:
converter Serial interface
8-bit resolution channels 3-wire serial mode: channels UART mode: channel mode: channel 16-bit timer/event counter: 8-bit timer/event counter: Watch timer: Watchdog timer: channels channels channel channel
Timer
Timer outputs Clock output
(8-bit output: 32.8 kHz, 65.5 kHz, 130.9 kHz, 261.9 kHz, 523.6 kHz, 1.05 MHz, 2.10 MHz, 4.19 4.19 operation with system clock) J1850 (CLASS2) interface Maskable Internal: External: Internal: +85°C 80-pin plastic
controller Vectored interrupts
Non-maskable Software Power supply voltage Operating ambient temperature Package
Data Sheet U15013EJ2V0DS
µPD78F0833Y
CONTENTS
CONFIGURATION (TOP VIEW) BLOCK DIAGRAM FUNCTIONS
Port Pins Non-Port Pins Circuits Recommended Connection Unused Pins
DIFFERENCES BETWEEN µPD78F0833Y MASK VERSION MEMORY SIZE SWITCHING REGISTER (IMS) INTERNAL EXPANSION SIZE SWITCHING REGISTER (IXS) FLASH MEMORY PROGRAMMING
Selection Communication Mode. Flash Memory Programming Functions Flashpro Flashpro Connection Flash Memory Programming Self Write
ELECTRICAL SPECIFICATIONS PACKAGE DRAWING RECOMMENDED SOLDERING CONDITIONS APPENDIX DEVELOPMENT TOOLS APPENDIX RELATED DOCUMENTS
Data Sheet U15013EJ2V0DS
µPD78F0833Y
CONFIGURATION (TOP VIEW)
80-pin plastic
µPD78F0833YGC-8BT
P70/PCL P71/SDA0 P72/SCL0 P73/TO01 P74/TI001 P75/TI011 P00/INTP0 P01/INTP1 P02/INTP2 P03/INTP3 AVREF1 P80/ANI01 P81/ANI11 P82/ANI21 P83/ANI31 P84/ANI41 P85/ANI51 P86/ANI61 P87/ANI71 AVSS1
AVSS0 P97/ANI70 P96/ANI60 P95/ANI50 P94/ANI40 P93/ANI30 P92/ANI20 P91/ANI10 P90/ANI00 AVREF0 AVDD0 VDD1 VSS1 RESET C2TX C2RX
P27/TI51/TO51 P26/ASCK0/TI52/TO52 P25/TxD0 P24/RxD0 P23/TI50/TO50 P07/INTP7 P06/INTP6 P05/INTP5 P04/INTP4 P22/SCK31 P21/SO31 P20/SI31
Cautions Connect directly VSS1 normal operation mode. Connect AVDD0 VDD0. Connect AVSS0 AVSS1 pins VSS0.
P30/SI30 P31/SO30 P32/SCK30 VDD0 VSS0 P34/TO00 P35/TI000 PTI010
Data Sheet U15013EJ2V0DS
µPD78F0833Y
IDENTIFICATION
ANI00 ANI70, ANI01 ANI71: ASCK0: AVDD0: AVREF0, AVREF1: AVSS0, AVSS1: C2RX: C2TX: INTP0 INTP7: P07: P27: P36: P47: P57: P67: P75: P87: P97: Analog input Asynchronous serial clock Analog power supply Analog reference voltage Analog ground CLASS2 receive data CLASS2 transmit data External interrupt input Port Port Port Port Port Port Port Port Port PCL: RxD0: RESET: SCK30, SCK31: SCL0: SDA0: SI30, SI31: SO30, SO31: TI000, TI010, TI001, TI011, TI50, TI51, TI52: Timer input TO00, TO01, TO50, TO51, TO52: TxD0: VDD0, VDD1: VPP: VSS0, VSS1: Timer output Transmit data Power supply Programming power supply Ground Crystal Programmable clock Receive data Reset Serial clock Serial clock Serial data Serial input Serial output
Data Sheet U15013EJ2V0DS
µPD78F0833Y
BLOCK DIAGRAM
TO00/P34 TI000/P35 TI010/P36 TO01/P73 TI001/P74 TI011/P75 Port 8-bit timer/ event counter 16-bit timer/ event counter Port
16-bit timer/ event counter
TI50/TO50/P23
TI51/TO51/P27
8-bit timer/ event counter
Port
TI52/TO52/P26
8-bit timer/ event counter Port
Watchdog timer 78K/0 core Watch timer SI30/P30 SO30/P31 SCK30/P32 SI31/P20 SO31/P21 SCK31/P22 RxD0/P24 TxD0/P25 ASCK0/P26 SDA0/P71 SCL0/P72 ANI00/P90 ANI70/P97 AVDD0 AVSS0 AVREF0 ANI01/P80 ANI71/P87 AVSS1 AVREF1 C2RX C2TX INTP0/P00 INTP7/P07 PCL/P70 Flash memory Port
Serial interface
Serial interface
UART0
Internal high-speed 1,024 bytes
Internal expansion 2,048 bytes
Port
Port
converter Port
converter
J1850 (CLASS2) Interrupt control Clock output control VDD0 VDD1 VSS0 VSS1
Port
System control
RESET
Data Sheet U15013EJ2V0DS
µPD78F0833Y
FUNCTIONS
Port Pins (1/2)
Name Function After Reset Alternate Function INTP0 INTP7
Port 8-bit port Input/output specified 1-bit units. on-chip pull-up resistor specified software. Port 8-bit port Input/output specified 1-bit units. on-chip pull-up resistor specified software.
Input
Input
SI31 SO31 SCK31 TI50/TO50 RxD0 TxD0 ASCK0/TI52/TO52 TI51/TO51
Port 7-bit port Input/output specified 1bit units.
on-chip pull-up resistor specified software.
Input
SI30 SO30 SCK30
N-ch open-drain port LEDs driven directly. on-chip pull-up resistor specified software. TO00 TI000 TI010
Port 8-bit port Input/output specified 1-bit units. on-chip pull-up resistor specified software. Interrupt request flag (KRIF) falling edge detection. Port 8-bit port level input/CMOS output Input/output specified 1-bit units. on-chip pull-up resistor specified software. Port 4-bit port Input/output specified 1-bit units. on-chip pull-up resistor specified software.
Input
Input
Input
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Port Pins (2/2)
Name Function After Reset Alternate Function
Port 6-bit port Input/output specified 1bit units.
on-chip pull-up resistor specified software. N-ch open-drain port
Input
SDA0 SCL0
on-chip pull-up resistor specified software.
TO01 TI001 TI011
Port 1-bit port Input/output specified 1-bit units. Port 1-bit port Input/output specified 1-bit units.
Input
ANI01 ANI71
Input
ANI00 ANI70
Non-Port Pins (1/2)
Name Function After Reset Alternate Function
INTP0 INTP7
Input
External interrupt request input which valid edge specified (rising edge, falling edge, both rising falling edges) Serial interface SIO30 serial data input Serial interface SIO31 serial data input
Input
SI30 SI31 SO30 SO31 SDA0 SCK30 SCK31 SCL0 RxD0 TxD0 ASCK0 TI000
Input
Input
Output
Serial interface SIO30 serial data output Serial interface SIO31 serial data output
Input
Serial interface IIC0 serial data input/output Serial interface SIO30 serial clock input/output Serial interface SIO31 serial clock input/output Serial interface IIC0 serial clock input/output
Input Input
Input Output Input Input
Asynchronous serial interface serial data input Asynchronous serial interface serial data output Asynchronous serial interface serial clock input External count clock input 16-bit timer/event counter Capture trigger input capture register (CR000 CR010) 16-bit timer/event counter Capture trigger input capture register (CR000) 16-bit timer/event counter
Input Input Input Input
P26/TI52/TO52
TI010
TI001
External count clock input 16-bit timer/event counter Capture trigger input capture register (CR001 CR011) 16-bit timer/event counter Capture trigger input capture register (CR001) 16-bit timer/event counter
TI011
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Non-Port Pins (2/2)
Name Function After Reset Alternate Function TI50 TI51 TI52 TO00 TO01 TO50 TO51 TO52 ANI00 ANI70 ANI01 ANI71 AVREF0 AVREF1 Output Input Output Input External count clock input 8-bit timer/event counter External count clock input 8-bit timer/event counter External count clock input 8-bit timer/event counter 16-bit timer/event counter output 16-bit timer/event counter output 8-bit timer/event counter output 8-bit timer/event counter output 8-bit timer/event counter output Clock output converter (AD00) analog input Input Input Input Input P23/TO50 P27/TO51 P26/ASCK0/TO52 P23/TI50 P27/TI51 P26/ASCK0/TI52
converter (AD01) analog input
converter (AD00) reference voltage input converter (AD01) analog power supply reference voltage input converter (AD00) analog power supply converter (AD00) ground potential. Make same potential VSS1 converter (AD01) ground potential. Make same potential VSS1
C2RX C2TX RESET VDD0 VDD1 VSS0 VSS1
Input Output Input Input
CLASS data input CLASS data output System reset input Connecting crystal resonator oscillation
Positive power supply ports Positive power supply (other than ports) Ground potential ports Ground potential (other than ports) Applying high voltage program write/verify Connect directly VSS0 VSS1 normal operation mode.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Circuits Recommended Connection Unused Pins circuit type each recommended connection unused pins shown Table 3-1. circuit configuration each type, Figure 3-1. Table 3-1. Circuit Types Recommended Connection Unused Pins (1/2)
Name P00/INTP0 P07/INTP7 Circuit Type Recommended Connection Unused Pins Input: Independently connect resistor. Output: Leave open. Independently connect VSS0 resistor. Output: Leave open.
P20/SI31 P21/SO31 P22/SCK31 P23/TI50/TO50 P24/RxD0 P25/TxD0 P26/ASCK0/TI52/TO52 P27/TI51/TO51 P30/SI30 P31/SO30 P32/SCK30 13-P
Input:
Input:
Independently connect resistor. Output: Leave open. Input: Independently connect VSS0 resistor. Output: Leave open.
P34/TO00 P35/TI000 P36/TI010
Input:
Independently connect
resistor. Output: Leave open. P70/PCL P71/SDA0 P72/SCL0 13-R Input: Independently connect VSS0 resistor. Output: Leave open. Input: Independently connect
resistor. Output: Leave open. Input: Independently connect VSS0 resistor. Output: Leave open. 11-E
P73/TO01 P74/TI001 P75/TI011 P80/ANI01 P87/ANI71 P90/ANI00 P97/ANI70 C2RX C2TX RESET
Input Output Input
Connect resistor. Leave open.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Table 3-1. Circuit Types Recommended Connection Unused Pins (2/2)
Name AVDD0 AVREF0 AVREF1 AVSS0 AVSS1 Connect directly VSS1 Connect SS0. Circuit Type Recommended Connection Unused Pins Connect DD0.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Figure 3-1. Circuit List (1/2)
TYPE TYPE Pull-up enable VDD0 Data P-ch IN/OUT Output disable Schmitt-triggered input with hysteresis characteristics Input enable TYPE TYPE VDD0 VDD0 P-ch Data N-ch VSS0 Output disable Pull-up enable Data P-ch VDD0 P-ch IN/OUT N-ch VSS0 input N-ch VSS0 VDD0
P-ch
TYPE
VDD0
TYPE 11-E VDD0
Pull-up enable Data
Data P-ch VDD0 P-ch IN/OUT Output disable Comparator
P-ch IN/OUT N-ch P-ch VSS0 N-ch AVSS VREF (threshold voltage)
Output disable Input enable
N-ch VSS0 Input enable
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Figure 3-1. Circuit List (2/2)
TYPE 13-R TYPE 13-P IN/OUT IN/OUT Data Output disable N-ch Data Output disable N-ch VSS0
VSS0
Input enable
Data Sheet U15013EJ2V0DS
µPD78F0833Y
DIFFERENCES BETWEEN µPD78F0833Y MASK VERSION
µPD78F0833Y incorporates flash memory which program written, deleted, overwritten while mounted board. Table lists differences between µPD78F0833Y mask versions. Table 4-1. Difference Between µPD78F0833Y Mask Version
Item Internal capacity Internal structure Electrical specifications, recommended soldering conditions Flash memory provided Provided Mask Provided provided
µPD78F0833Y
µPD780833Y
Refer data sheet individual products.
Caution There differences noise immunity noise radiation between flash memory mask versions. When pre-producing application with flash memory version then mass-producing with mask version, sure conduct sufficient evaluations commercial samples (CS) (not engineering sample, mask version.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
MEMORY SIZE SWITCHING REGISTER (IMS)
This register sets internal memory capacity software. with 8-bit memory manipulation instruction. RESET input sets CFH. Figure 5-1. Format Memory Size Switching Register (IMS)
Symbol RAM2 RAM1 RAM0 ROM3 ROM2 ROM1 ROM0 Address FFF0H After reset
RAM2
RAM1
RAM0 1,024 bytes Setting prohibited
Selection internal high-speed capacity
Other than above
ROM3
ROM2
ROM1
ROM0 Setting prohibited
Selection internal capacity
Other than above
Data Sheet U15013EJ2V0DS
µPD78F0833Y
INTERNAL EXPANSION SIZE SWITCHING REGISTER (IXS)
This register sets internal expansion capacity software. with 8-bit memory manipulation instruction. RESET input sets 0CH. Caution default value (setting prohibited). sure initial setting. Figure 6-1. Format Internal Expansion Size Switching Register (IXS)
Symbol IXRAM4 Address FFF4H After reset
IXRAM3 IXRAM2 IXRAM1 IXRAM0
IXRAM4 IXRAM3 IXRAM2
IXRAM1 IXRAM0
Selection internal high-speed capacity 2,048 bytes Setting prohibited
Other than above
Data Sheet U15013EJ2V0DS
µPD78F0833Y
FLASH MEMORY PROGRAMMING
Writing flash memory performed without removing memory from target system. Writing performed with dedicated flash programmer Flashpro (part number: FL-PR2) Flashpro (part number: FLPR3 PG-FP3) connected host machine target system. Moreover, writing flash memory also performed using flash memory writing adapter connected Flashpro Flashpro III. Remark FL-PR2 FL-PR3 products Naito Densei Machida Mfg. Co., Ltd. Selection Communication Mode Writing flash memory performed using Flashpro Flashpro serial communication mode. communication mode selected from those Table 7-1. selection communication mode made using format shown Figure 7-1. Each communication mode selected number pulses shown Table 7-1. Table 7-1. List Communication Modes
Communication Mode 3-wire serial (SIO3) Channels UsedNote SI30/P30 SO30/P31 SCK30/P32 SI31/P20 SO31/P21 SCK31/P22 Pulses
Note Shifting flash memory programming mode sets pins used flash memory programming same state immediately after reset. Therefore, ports enter output high-impedance state. external devices acknowledge output high-impedance state, handling such connecting resistor connecting resistor required. Cautions sure select number pulses shown Table communication mode. performing write operations flash memory UART communication mode, system clock oscillation frequency higher. Figure 7-1. Format Communication Mode Selection
pulses RESET Flash memory write mode
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Flash Memory Programming Functions Operations such writing flash memory performed various command/data transmission reception operations according selected communication mode. Table shows major functions flash memory programming. Table 7-2. Major Functions Flash Memory Programming
Function Reset Batch verify Batch contents verify Batch delete Batch blank check High-speed write Continuous write Batch prewrite Status Oscillation frequency setting Delete time setting Silicon signature read Description Used detect write stop communication synchronization. Compares entire memory contents input data. Compares entire memory contents different modes. Deletes entire memory contents. Checks deletion status entire memory. Writes flash memory according write start address number write data (bytes). Successively writes using data input high-speed write operation. Writes entire memory. Checks current operation mode whether operation ended. Inputs resonator oscillation frequency information. Inputs memory delete time. Outputs device name, memory capacity, device block information.
Flashpro Flashpro Connection connection Flashpro Flashpro µPD78F0833Y shown Figure 7-2. Figure 7-2. Connection Flashpro Flashpro 3-Wire Serial (SIO3) Mode
Flashpro Flashpro RESET
PD78F0833Y
VDD0 RESET SCK3n SI3n SO3n VSS0
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Flash Memory Programming Self Write With µPD78F0833Y, possible rewrite flash memory using program. Flash memory configuration configuration flash memory shown Figure 7-3. Figure 7-3. Flash Memory Configuration
Normal operation mode F7FFH F000H EFFFH Internal expansion area F7FFH F000H EFFFH FLPMC Flash memory area This area cannot accessed with normal instruction. Erase/ 8000H write Self-write mode Internal expansion area Erase/write routine call
9BFFH
Flash memory area FLPMC
Firmware area (including erase/ write routine)
0000H
0000H
Flash programming mode control register (FLPMC) flash programming mode control register (FLPMC) register checking operating mode selection status. FLPMC 1-bit 8-bit memory manipulation instruction. RESET input clears this register 08H.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Figure 7-4. Format Flash Programming Mode Control Register (FLPMC)
Symbol FLPMC FLSPM0 Address FFCDH After reset 08HNote R/WNote
voltage application status voltage required flash memory erase/write applied pin. Voltage greater than that applied pin.
FLSPM0 Normal operating mode Self-write mode
Operating mode selection
Notes changes depending level pin. read-only. Cautions sure bits bits indicates status voltage applied pin. voltage required erase/write applied. However, even does necessarily mean that voltage required erase/write applied. Configure hardware that voltage required erase/write applied pin. Also, software will used addition hardware check that voltage required erase/write applied, provide external hardware detection circuit output.
Self-write procedure procedure performing self write shown below (see Figure 7-5). Disable interrupts. Designate self-write mode (FLPMC 09H). Select register bank Specify start address entry register. VPP: signal power supply Check level. Initialize flash subroutine. parameters. Control flash memory (erase, write, etc.).
(10) VPP: (OFF signal power supply (11) Designate normal operating mode (FLPMC 08H).
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Figure 7-5. Self-Programming Flowchart
Disable interrupts.
Designate self-write mode (FLPMC 09H).
Select register bank
Specify entry address.
VPP:
Initialize flash subroutine.
parameters.
Pre-write
Erase
Error? Write data Number errors? timeNote Error? Verify Less than timesNote
Error? (10) VPP: Designate normal operating mode (FLPMC 08H).
(11)
Flash memory error
Note Differs depending user program.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Figure 7-6. Self-Write Timing
RESET TRSL Normal operating mode Normal Mode program setting processing Normal operating mode Normal Mode program setting processing 0.2VDD 0.2VDD 0.2VDD
operation program processing
Self-write mode Erase Write Verify
Reset mode
Reset mode
FLPMC VPP: Writing flash memory. ±0.3 VPP: FLPMC
Data Sheet U15013EJ2V0DS
µPD78F0833Y
resources resources used during self write follows: Register bank: BANK3 bytes) register: Status flag register: Function number register: Entry area start address Stack area: Maximum bytes Write data storage area: bytes Entry area: bytes area used self-write subroutines. specified user using register. Status register
Parameter setting error Verify error Write error Blank check error
Entry area description entry area shown Table 7-3. Table 7-3. Entry Area
Offset Value Description Reserved area byte) Reserved area byte) Flash memory start address bytes) Flash memory address bytes) Number bytes written flash memory byte) Write time data byte) Erase time data bytes) Reserved area bytes) Write data storage buffer start address bytes) Total block number byte) Total area number byte) Reserved area bytes)
Example
When value register register bank 0FD00H 0FD00H: Status 0FD02H: Flash memory start address 0FD06H: Number bytes written flash memory
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Next, entry area will explained detail. Flash memory start address This flash memory address value used _FlashByteWrite subroutine. Flash memory address This flash memory address value used _FlashGetInfo subroutine. Number bytes written flash memory Area number number bytes written flash memory. Write time data following values based operating frequency.
(MHz) 1.00 1.28 1.29 2.56 2.57 5.12 5.13 8.38 Setting Value
Erase time data Setting value Erase time Operating frequency/29 (Erase time range: seconds) Example Erase time: seconds, operating frequency: 4.19 Setting value 4194304/512 16385 (decimal) 4001H (hexadecimal) Write data storage buffer start address This area contains start address write data storage buffer area. data (write data), which data this area specified address, written flash memory (_FlashByteWrite subroutine). data this area specified start address possible specify maximum bytes write data. Total block number This total flash memory block number used _FlashGetInfo subroutine. Total area number This total flash memory area used _FlashGetInfo subroutine.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Self-write subroutines self-write subroutines their functions shown Table below. Table 7-4. List Self-Write Subroutines
Function Number Decimal Hexadecimal _FlashEnv _FlashSetEnv _FlashGetInfo _FlashAreaBlankCheck _FlashAreaPreWrite _FlashAreaErase _FlashByteWrite _FlashAreaVerify Initializes flash subroutine. Sets parameters. Reads flash memory data Performs blank check specified area. Performs prewrite specified area. Erases specified area. Writes continuously byte units. Performs internal verification specified area. Subroutine Name Function
Self-write circuit configuration configuration self-write circuit shown Figure 7-7. Figure 7-7. Self-Write Circuit Configuration
PD78F0833Y
VOUT 10.2 ON/OFF power supply (µPC29S10, etc.) OUTPUT INPUT 13.5
Output port
Data Sheet U15013EJ2V0DS
µPD78F0833Y
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings 25°C)
Parameter Supply voltage Symbol AVDD AVREF AVSS Input voltage P07, P27, P32, P36, P47, P57, P67, P75, P87, P97, C2RX, RESET N-ch open-drain -0.3 +10.5 -0.3 +0.3 -0.3
AVDD AVREF
Conditions
Ratings -0.3 +6.5
Unit
Output voltage
-0.3 -0.3
P07, P27, P36, P47, P57, P67, P75, P87, P97, C2TX
Analog input voltage Output current, high
ANI00 ANI70 Analog input ANI01 ANI71 P07, P27, P32, P36, P47, P57, P67, P70, P75, P87, P97, C2TX Total pins
AVREF -0.3
Peak value
Output current, lowNote
P07, P27, P32, P36, P47, P57, P67, P75, P87, P97, C2TX
value
Peak value value
+150
Total pins
Peak value value
Operating ambient temperature Storage temperature
During normal operation During flash memory programming
Tstg
Note value should calculated follows: [rms value] [Peak value] Duty Caution Product quality suffer absolute maximum rating exceeded even single parameter even momentarily. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions ensuring that absolute maximum ratings exceeded. Remark Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
System Clock Oscillator Characteristics
Resonator Ceramic resonator Recommended Circuit
Parameter Oscillation frequency X)Note
Conditions
MIN.
TYP.
MAX.
Unit
Oscillation stabilization time Note
Crystal resonator
Oscillation frequency X)Note
Oscillation stabilization time Note
Notes Indicates only oscillator characteristics. Time required stabilize oscillation after reset STOP mode release. Caution When using system clock oscillator, wiring area enclosed with broken line above figures should carried follows avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near line through which high fluctuating current flows. Always keep ground point oscillator same potential VSS1 ground capacitor ground pattern which high current flows. fetch signals from oscillator. Remark resonator selection oscillator constant, users required either evaluate oscillation themselves apply resonator manufacturer evaluation.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Capacitance 25°C,
Parameter Input capacitance Output capacitance capacitance Symbol Conditions Unmeasured pins returned Unmeasured pins returned P07, Unmeasured pins returned P27, P36, P47, P67, P75, P32, P57, P87, MIN. TYP. MAX. Unit
COUT
Remark Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Characteristics +85°C, AVDD AVREF
Parameter Input voltage, high Symbol VIH1 Conditions P21, P25, P31, P34, P47, P67, P73, P87, P07, P20, P24, P26, P27, P30, P32, P35, P36, P74, P75, RESET (N-ch open-drain) C2RX P21, P25, P31, P34, P47, P67, P73, P87, P07, P20, P24, P26, P27, P30, P32, P35, P36, P74, P75, C2RX, RESET (N-ch open-drain) -100 MIN. 0.7VDD TYP. MAX. Unit
VIH2
0.8VDD
VIH3 VIH4 VIH5 VIH6 Input voltage, VIL1
0.7VDD 0.8VDD
0.3VDD
VIL2
0.2VDD
VIL3 VIL4 VIL5 Output voltage, high VOH1
P07, P27, P32, P36, P47, P57, P67, P70, P75, P87, P97, C2TX P71, P07, P27, P32, P36, P47, P57, P67, P70, P75, P87, P97, C2TX P07, P36, P67, P97, C2RX, P27, P32, P47, P57, P75, P87, RESET
0.75 0.3VDD
VOH2
Output voltage,
VOL1 VOL2 VOL3
VOL4
Input leakage current, high
LIH1
LIH2 LIH3 Input leakage current, LIL1
P07, P36, P67, P97, C2RX, P27, P32, P47, P57, P75, P87, RESET
LIL2 LIL3
Note
Note low-level input leakage current -200 (MAX.) flows only clock after read instruction been executed port (P33). times other than this 1-clock interval (MAX.) current flows. Remark Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Characteristics +85°C, AVDD AVREF
Parameter Output leakage current, high Symbol VOUT Conditions P07, P36, P67, P87, P27, P32, P47, P57, P70, P75, P97, C2TX MIN. TYP. MAX. Unit
Output leakage current,
VOUT
P07, P27, P36, P47, P57, P67, P75, P87, P97, C2TX P07, P27, P32, P36, P47, P57, P67, P70,
Software pull-up resistor
Supply currentNote
4.19 crystal oscillation operation modeNote 8.38 crystal oscillation operation modeNote
1,200
4.19 crystal oscillation HALT 8.38 crystal oscillation HALT
modeNote modeNote
STOP mode
Notes Total current flowing internal power supply VSS1 AVREF, AVDD, port current (onchip pull-up resistor) included. During high-speed mode operation (when processor clock control register (PCC) 00H). During low-speed mode operation (when processor clock control register (PCC) 04H). WTN0 operating current receive wait state operating current CLASS2 signal (when bits (C2SC1 C2SC0) class2 clock selection register (C2CLK) 00B) included. Remark Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Characteristics Basic operation +85°C,
Parameter Cycle time (Minimum instruction execution time) TI000, TI010, TI001, TI011 input high-/low-level width TI50, TI51, TI52 input frequency TI50, TI51, TI52 input high-/low-level width Interrupt request input high-/low-level width RESET low-level width TIH0 TIL0 Symbol Conditions Using ceramic resonator Using crystal resonator MIN. 0.238 0.476 TYP. MAX. Unit
Note
TIH5 TIL5
INTH INTL
INTP0 INTP7,
Note Selection fX/4, fX/64 available with bits (PRM0n0, PRM0n1) prescaler mode register (PRM0n). However, TI00n valid edge selected count clock, value becomes fsam
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Serial interface +85°C, SIO3 3-wire serial mode (internal clock output): SIO30, SIO31
Parameter SCK3 cycle time SCK3 high-/low-level width setup time SCK3) hold time (from SCK3) Delay time from SCK3 output Symbol KCY1 KH1, Conditions MIN. tKCY1/2 TYP. MAX. Unit
SIK1
KSI1 Note
KSO1
Note load capacitance SCK3 output lines. SIO3 3-wire serial mode (external clock input): SIO30, SIO31
Parameter SCK3 cycle time SCK3 high-/low-level width setup time SCK3) hold time (from SCK3) Delay time from SCK3 output Symbol KCY2 KH2, Conditions MIN. TYP. MAX. Unit
SIK2
KSI2 Note
KSO2
Note load capacitance output line. UART0 (dedicated baud rate generator output)
Parameter Transfer rate Symbol Conditions MIN. TYP. MAX. 131,250 Unit
UART0 (external clock input)
Parameter ASCK0 cycle time ASCK0 high-/low-level width Transfer rate Symbol KCY3 KH3, tKL3 Conditions MIN. TYP. MAX. Unit
39,063
Data Sheet U15013EJ2V0DS
µPD78F0833Y
mode
Parameter Symbol Standard Mode MIN. SCL0 clock frequency free time (between stop start condition) Hold timeNote SCL0 clock low-level width SCL0 clock high-level width Start/restart condition setup time Data hold time CBUS compatible master Data setup time SDA0 SCL0 signal rise time SDA0 SCL0 signal fall time Stop condition setup time Capacitive load each line SU:DAT SU:STO MAX. High-Speed Mode MIN. MAX. Unit
0.9Note
HD:STA HIGH SU:STA HD:DAT
Note 1,000
Note Note
Notes Upon occurrence start condition, first clock pulse generated after hold period. fill undefined area SCL0 falling edge, necessary device internally provide SDA0 signal VIHmin. SCL0 signal) with least hold time. device does extend SCL0 signal hold time LOW), only maximum data hold time HD:DAT needs fulfilled. high-speed-mode available standard-mode system. this time, conditions described below must satisfied. device does extend SCL0 signal state hold time tSU:DAT device extends SCL0 signal state hold time sure transmit next data SDA0 line before SCL0 line released (tRmax. tSU:DAT 1,000 1,250 standard mode specification).
Data Sheet U15013EJ2V0DS
µPD78F0833Y
CLASS2 +85°C, Internal clock count limit
Parameter Internal clock cycle time Symbol tCCLK Conditions MIN. TYP. MAX. Unit
normal mode
Parameter Rise transfer delay time (from C2TX C2RX) Fall transfer delay time (from C2TX C2RX) Symbol tPDR Conditions MIN. TYP. MAX. tCCLK Unit
tPDF
tCCLK
speed mode
Parameter Rise transfer delay time (from C2TX C2RX) Fall transfer delay time (from C2TX C2RX) Symbol tPDRX Conditions MIN. TYP. MAX. tCCLK Unit
tPDFX
tCCLK
Transmit receive pulse width normal mode)
Symbol When Passive "0", Active When Passive "1", Active When Active "SOF" When Passive "EOF" Idle point When Active "Break" tXMIN tXNOM tXMAX tRMIN higher higher RMAX lower lower lower tCCLK Unit
Transmit receive pulse width speed mode)
Symbol When Passive "0", Active When Passive "1", Active When Active "SOF" When Passive "EOF" Idle point When Active "Break" tXMIN tXNOM tXMAX tRMIN RMAX tCCLK Unit
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Timing Test Points (Excluding Input)
0.8VDD 0.2VDD
Test points
0.8VDD 0.2VDD
Clock Timing
1/fX VIH5 (MIN.) VIL5 (MAX.)
input
Timing
tTIL0 tTIH0
TI000, TI010, TI001, TI011
1/fTI5 tTIL5 tTIH5
TI50, TI51, TI52
Interrupt Request Input Timing
tINTL
tINTH
INTP0 INTP7
RESET Input Timing
tRSL
RESET
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Serial Transfer Timing 3-wire serial mode:
tKCYn tKLn tKHn
SCK30, SCK31
tSIKn SI30, SI31 tKSOn
tKSIn
Input data
SO30, SO31
Output data
UART mode (external clock input):
tKCY3 tKL3 tKH3
ASCK0
mode
tLOW SCL0 tHIGH tHD:DAT tHD:STA SDA0 tBUF tSU:DAT tSU:STA tHD:STA tSU:STO
Stop condition
Start condition
Restart condition
Stop condition
Data Sheet U15013EJ2V0DS
µPD78F0833Y
CLASS2 Transfer Waveform (Example Short Pulse Width)
C2TX s-tPDF s-tPDR
tPDR
tPDF
tPDR
C2RX
C2TX s-tPDFX s-tPDRX
tPDRX
tPDFX
tPDRX
C2RX
Remarks meanings symbols above figure follows. tPDR: CLASS2 transceiver rise transfer delay time normal mode tPDF CLASS2 transceiver fall transfer delay time normal mode tPDRX: CLASS2 transceiver rise transfer delay time speed mode tPDFX: CLASS2 transceiver fall transfer delay time speed mode values tPDR, tPDF, tPDRX, tPDFX specified using class rise transfer delay time correct register (C2PDR) class fall transfer delay time correct register (C2PDF).
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Converter Characteristics AVDD AVREF AVSS
Parameter Resolution Overall errorNote CONV VIAN RAIREF AVSS Symbol Conditions MIN. TYP. MAX. ±0.6 AVREF Unit %FSR
Conversion time Analog input voltage AVREF resistance
Note Excluding quantization error (±1/2%FSR). This value indicated ratio full-scale value. Data Memory STOP Mode Supply Voltage Data Retention Characteristics +85°C)
Parameter Data retention power supply voltage Data retention power supply current Release signal time Oscillation stabilization wait time Symbol VDDDR Conditions MIN. TYP. MAX. Unit
DDDR
VDDDR
SREL WAIT Release RESET Release interrupt request
Note
Note Selection 212/fX 214/fX, 15/f 216/f 217/fX possible with bits (OSTS0 OSTS2) oscillation stabilization time select register (OSTS). Data Retention Timing (STOP Mode Release RESET)
Internal reset operation HALT mode STOP mode Data retention mode Operating mode
STOP instruction execution
VDDDR
tSREL
RESET tWAIT
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Data Retention Timing (Standby Release Signal: STOP Mode Release Interrupt Request Signal)
HALT mode STOP mode Data retention mode Operating mode
STOP instruction execution
VDDDR
tSREL
Standby release signal (Interrupt request) tWAIT
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Flash Memory Programming Characteristics (VDD 10.3 Basic Characteristics
Parameter supply voltage supply voltage Symbol VPPL supply current Programming temperature Write time TPRG CWRT TPRG +40°C Conditions Operating voltage during write operation When detecting level When programming flash memory 10.0 MIN. 10.0 TYP. MAX. 0.2VDD 10.3 Unit Times
Remark operating clock range flash memory programming mode same normal operating mode. Write Operation Characteristics
Parameter time time from time from RESET Time from RESET count start Count execution time counter high-/low-level width counter noise elimination width Symbol PSRON DRPSR PSRRF RFCF Conditions high voltage high voltage high voltage MIN. TYP. MAX. Unit
COUNT
Self-Programming Characteristics
Parameter Time from RESET Time from RESET Symbol PAFRF RFDF Conditions MIN. TYP. MAX. Unit
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Flash Write Mode Setting Timing
TPAFRF 0.8VDD RESET TRSL 0.2VDD 0.2VDD TRSL 0.2VDD TRFDF
operation program processing
Normal operation mode Reset Mode mode Normal program processing setting
Self-write mode Erase Write Verify Mode setting
Normal operation mode Normal program processing Reset mode
FLPMC During flash memory write ±0.3 FLPMC
Data Sheet U15013EJ2V0DS
µPD78F0833Y
PACKAGE DRAWING
80-PIN PLASTIC (14x14)
detail lead
ITEM MILLIMETERS 17.20±0.20 14.00±0.20 14.00±0.20 17.20±0.20 0.825 0.825 0.32±0.06 0.13 0.65 (T.P.) 1.60±0.20 0.80±0.20 0.17 +0.03 -0.07 0.10 1.40±0.10 0.125±0.075 1.70 MAX. P80GC-65-8BT-1
NOTE Each lead centerline located within 0.13 true position (T.P.) maximum material condition.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
RECOMMENDED SOLDERING CONDITIONS
PD78F0833Y should soldered mounted under following recommended conditions. details recommended soldering conditions, refer document Semiconductor Device Mounting Technology Manual (C10535E). soldering methods conditions other than those recommended below, contact sales representative. Table 10-1. Surface Mounting Type Soldering Conditions
PD78F0833YGC-8BT: 80-pin plastic
Soldering Method Soldering Conditions Recommended Condition Symbol IR35-107-3
Infrared reflow
Package peak temperature: 235°C, Time: seconds max. 210°C higher), Count: Three times less, Exposure limit: days Note (after that, prebake 125°C hours) Package peak temperature: 215°C, Time: seconds max. 200°C higher), Count: Three times less, Exposure limit: daysNote (after that, prebake 125°C hours) Solder bath temperature: 260°C max., Time seconds max., Count: Once, Preheating temperature: 120°C max. (package surface temperature), Exposure limit daysNote (after that, prebake 125°C hours) temperature: 300°C max., Time: seconds max. (per row)
VP15-107-3
Wave soldering
WS60-107-1
Partial heating
Note After opening pack, store 25°C less less allowable storage period. Caution different soldering methods together (except partial heating).
Data Sheet U15013EJ2V0DS
µPD78F0833Y
APPENDIX DEVELOPMENT TOOLS
following development tools available system development using PD78F0833Y. Also refer Cautions using development tools. Language Processing Software
RA78K0 CC78K0 DF780833 CC78K0-L Assembler package common 78K/0 Series compiler package common 78K/0 Series Device file PD780833Y Subseries compiler library source file common 78K/0 Series
Flash Memory Writing Tools
Flashpro (FL-PR2), Flashpro (FL-PR3, PG-FP3) FA-80GC Flash programmer dedicated on-chip flash memory microcontroller
Adapter flash memory writing used with connected Flashpro Flashpro III. 80-pin plastic (GC-8BT type).
Debugging Tools When using in-circuit emulator IE-78K0-NS
IE-78K0-NS IE-70000-MC-PS-B IE-70000-98-IF-C In-circuit emulator common 78K/0 Series Power supply unit IE-78K0-NS Interface adapter when using PC-9800 series host machine (excluding notebook PCs) supported) card interface cable when using notebook host machine (PCMCIA socket supported) Interface adapter when using PC/AT compatible host machine (ISA supported) Adapter necessary when using on-chip host machine Emulation board emulate µPD780833Y Subseries board necessary when using IE-780833-NS-EM4 Emulation probe 80-pin plastic (GC-8BT type) Conversion socket connecting target system board designed mount 80-pin plastic (GC8BT type) NP-80GC Integrated debugger IE-78K0-NS System simulator common 78K/0 Series Device file common µPD780833Y Subseries
IE-70000-CD-IF-A IE-70000-PC-IF-C IE-70000-PCI-IF-A IE-780833-NS-EM4 IE-78K0-NS-P02 NP-80GC EV-9200GC-80
ID78K0-NS SM78K0 DF780833
Data Sheet U15013EJ2V0DS
µPD78F0833Y
When using in-circuit emulator IE-78001-R-A
IE-78001-R-A IE-70000-98-IF-C In-circuit emulator common 78K/0 Series Interface adapter when using PC-9800 series host machine (excluding notebook PCs) supported) Interface adapter when using PC/AT compatible host machine (ISA supported) Adapter necessary when using on-chip host machine Interface adapter cable when using host machine Emulation board emulate µPD780833Y Subseries board necessary IE-780833-NS-EM4 Emulation probe conversion board necessary IE-780833-NS-EM4 IE-78K0-NS-P02 IE78001-R-A Emulation probe 64-pin plastic (GC-AB8 type) Conversion socket connect target system board 64-pin plastic (GC-AB8 type) EP78230GC-R Integrated debugger IE-78001-R-A System simulator common 78K/0 Series Device file common µPD780833Y Subseries
IE-70000-PC-IF-C IE-70000-PCI-IF IE-78000-R-SV3 IE-780833-NS-EM4 IE-78K0-NS-P02 IE-78K0-R-EX1
EP-78230GC-R EV-9200GC-80
ID78K0 SM78K0 DF780833
Real-time
RX78K0 MX78K0 Real-time 78K/0 Series 78K/0 Series
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Cautions using development tools ID78K0-NS, ID78K0, SM78K0 used combination with DF780833. CC78K0 RX78K0 used combination with RA78K0 DF780833. FL-PR2, FL-PR3, FA-80GC, NP-80GC products made Naito Densei Machida Mfg. Co., Ltd. (TEL: +81-44-822-3813). third-party development tools, Single-Chip Microcontroller Development Tool Selection Guide (U11069E). host machines supporting each software follows.
Host Machine [OS] Software RA78K0 CC78K0 ID78K0-NS ID78K0 SM78K0 RX78K0 MX78K0 PC-9800 series [WindowsTM] PC/AT compatible [Japanese/English Windows] Note Note Note Note HP9000 series 700[HP-UX SPARCstation[SunOSTM, Solaris NEWS(RISC) [NEWS-OSTM]
Note DOS-based software
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Conversion Socket (EV-9200GC-80) Package Drawing Recommended Board Mounting Pattern Figure A-1. EV-9200GC-80 Package Drawing (for reference) (unit:
Based EV-9200GC-80 Package drawing
EV-9200GC-80
No.1 index
EV-9200GC-80-G0E ITEM MILLIMETERS 18.0 14.4 14.4 18.0 16.0 18.7 16.0 18.7 0.35 INCHES 0.709 0.567 0.567 0.709 0.079 0.031 0.236 0.63 0.736 0.236 0.63 0.736 0.323 0.315 0.098 0.079 0.014
0.091
0.059
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Figure A-2. EV-9200GC-80 Recommended Board Mounting Pattern (for reference) (unit:
Based EV-9200GC-80 drawing
EV-9200GC-80-P1E ITEM Caution MILLIMETERS 19.7 15.0 0.65±0.02 19=12.35±0.05 INCHES 0.776 0.591 0.026+0.001 -0.002 0.748=0.486 +0.003 -0.002 0.591 0.776 0.236 +0.003 -0.002 0.236 +0.003 -0.002 0.014 +0.001 -0.001
0.65±0.02 19=12.35±0.05 0.026 +0.001 0.748=0.486 +0.003 -0.002 -0.002 15.0 19.7 0.05 0.05 0.35 0.02
2.36 0.03 1.57 0.03
0.093+0.001 -0.002 0.091 0.062+0.001 -0.002
Dimensions mount EV-9200 that target device (QFP) different some parts. recommended mount dimensions QFP, refer "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (C10535E).
Data Sheet U15013EJ2V0DS
µPD78F0833Y
APPENDIX RELATED DOCUMENTS
related documents indicated this publication include preliminary versions. However, preliminary versions marked such. Documents Related Devices
Document Name Document U13892E U15012E This document U12326E U14458E
µPD780833Y Subseries User's Manual µPD780833Y Data Sheet µPD78F0833Y Data Sheet
78K/0 Series User's Manual Instructions 78K/0, 78K/0S Series Application Note Flash Memory Write
Documents Related Development Tools (User's Manuals)
Document Name RA78K0 Assembler Package Operation Language Structured Assembly Language CC78K0 Compiler Operation Language PG-FP3 Flash Memory Programmer IE-78K0-NS IE-78K0-R-EX1 IE-780833-NS-EM4 SM78K0S, SM78K0 System Simulator Windows Based SM78K Series System Simulator Ver. 2.10 Later Operation External Part User Open Interface Specifications Operation Document U11802E U11801E U11789E U11517E U11518E U13502E U13731E prepared prepared U14611E prepared
ID78K0-NS Integrated Debugger Ver. 2.00 Later Windows Based ID78K0 Integrated Debugger Windows Based
U14379E
Guide Reference
U11649E U11539E
Caution above related documents subject change without notice. sure read latest documents before designing.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Documents Related Embedded Software (User's Manuals)
Document Name 78K/0 Series Real-Time Fundamentals Installation 78K/0 Series MX78K0 Fundamental Document U11537E U11536E U12257E
Other Documents
Document Name SEMICONDUCTOR SELECTION GUIDE Products Packages (CD-ROM) Semiconductor Device Mounting Technology Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System Guide Prevent Damage Semiconductor Devices Electrostatic Discharge (ESD) Document X13769X C10535E C11531E C10983E C11892E
Caution above related documents subject change without notice. sure read latest documents before designing.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
[MEMO]
Data Sheet U15013EJ2V0DS
µPD78F0833Y
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
Purchase components conveys license under Philips Patent Rights these components system, provided that system conforms Standard Specification defined Philips.
IEBus trademarks Corporation. Windows either registered trademark trademark Microsoft Corporation United States and/or other countries. PC/AT trademark International Business Machines Corporation. HP9000 series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. Solaris SunOS trademarks Microsystems, Inc. NEWS NEWS-OS trademarks Sony Corporation.
Data Sheet U15013EJ2V0DS
µPD78F0833Y
Regional Information
Some information contained this document vary from country country. Before using product your application, pIease contact office your country obtain list authorized representatives distributors. They will verify:
Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements
addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
Electronics (Germany) GmbH
Benelux Office Eindhoven, Netherlands Tel: 040-2445845 Fax: 040-2444580
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics Hong Kong Ltd. Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-30-67 Fax: 01-30-67 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Electronics (France) S.A. Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290 Madrid Office Madrid, Spain Tel: 91-504-2787 Fax: 91-504-2860
Electronics Singapore Pte. Ltd.
United Square, Singapore Tel: 65-253-8311 Fax: 65-250-3583
Electronics Taiwan Ltd. Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 Fax: 02-66
Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 Fax: 08-63
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
Brasil S.A.
Electron Devices Division Guarulhos-SP Brasil Tel: 55-11-6462-6810 Fax: 55-11-6462-6829
J00.7
Data Sheet U15013EJ2V0DS
µPD78F0833Y
information this document current October, 2000. information subject change without notice. actual design-in, refer latest publications NEC's data sheets data books, etc., most up-to-date specifications semiconductor products. products and/or types available every country. Please check with sales representative availability additional information. part this document copied reproduced form means without prior written consent NEC. assumes responsibility errors that appear this document. does assume liability infringement patents, copyrights other intellectual property rights third parties arising from semiconductor products listed this document other liability arising from such products. license, express, implied otherwise, granted under patents, copyrights other intellectual property rights others. Descriptions circuits, software other related information this document provided illustrative purposes semiconductor product operation application examples. incorporation these circuits, software information design customer's equipment shall done under full responsibility customer. assumes responsibility losses incurred customers third parties arising from these circuits, software information. While endeavours enhance quality, reliability safety semiconductor products, customers agree acknowledge that possibility defects thereof cannot eliminated entirely. minimize risks damage property injury (including death) persons arising from defects semiconductor products, customers must incorporate sufficient safety measures their design, such redundancy, fire-containment, anti-failure features. semiconductor products classified into following three quality grades: "Standard", "Special" "Specific". "Specific" quality grade applies only semiconductor products developed based customer-designated "quality assurance program" specific application. recommended applications semiconductor product depend quality grade, indicated below. Customers must check quality grade each semiconductor product before using particular application. "Standard": Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade semiconductor products "Standard" unless otherwise expressly specified NEC's data sheets data books, etc. customers wish semiconductor products applications intended NEC, they must contact sales representative advance determine NEC's willingness support given application. (Note) "NEC" used this statement means Corporation also includes majority-owned subsidiaries. "NEC semiconductor products" means semiconductor product developed manufactured defined above).

µPD78F0833Y 8-BIT SINGLE-CHIP MICROCONTROLLERS DESCRIPTION

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