µPD78P083(A) 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

µPD78P083(A) 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION

Datasheet Thumbnail

Top Searches for this datasheet

INTEGRATED CIRCUIT
µPD78P083(A)
8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
µPD78P083(A) member PD78083 Subseries 78K/0 Series products. Comparing with
µPD78P083 (standard), more strict quality assurance programs applied this product (called Special quality
grade NEC). PD78P083(A) uses one-time PROM instead internal ROMs PD78081(A)
µPD78082(A).
Because this device programmed users, ideally suited applications involving evaluation systems development stages, small-scale production many different products, rapid development timeto-market product. details functions described user's manuals. sure read following manuals before designing.
µPD78083 Subseries User's Manual
78K/0 Series User's Manual Instructions
U12176E IEU-1372
FEATURES
Pin-compatible with mask version (except pin) Internal PROM: Kbytes
Note
µPD78P083CU(A), µPD78P083GB(A): One-time programmable (ideally suited small-scale production) Internal high-speed RAM: bytes
Note
operated same supply voltage mask version (VDD Corresponding QTOPMicrocontrollers (under planning) Note internal PROM internal high-speed capacities changed setting internal memory size switching register (IMS). Remarks QTOP microcontroller general term microcontrollers which incorporate one-time PROM totally supported NEC's programming service (from programming marking, screening verification). differences between PROM Mask versions, refer Chapter DIFFERENCES BETWEEN PD78P083(A) MASK VERSIONS.
information this document subject change without notice.
Document U12175EJ1V0DS00 (1st edition) Date Published March 1997 Printed Japan
1997 1996
µPD78P083(A)
ORDERING INFORMATION Part Number Package 42-pin plastic shrink (600 mil) 44-pin plastic 44-pin plastic Internal One-Time PROM One-Time PROM One-Time PROM
PD78P083CU(A) PD78P083GB(A)-3B4 PD78P083GB(A)-3BS-MTXNote
Note Under planning Caution
µPD78P083GB(A) types packages. (Refer Chapter PACKAGE DRAWINGS). Consult
NEC's sales representative suppliable packages.
QUALITY GRADE Part Number Package 42-pin plastic shrink (600 mil) 44-pin plastic 44-pin plastic Quality Grades Special Special Special
PD78P083CU(A) PD78P083GB(A)-3B4 PD78P083GB(A)-3BS-MTXNote
Note Under planning
Please refer "Quality grades Semiconductor Devices" (Document number C11531E) published Corporation know specification quality grade devices recommended applications. Deferences between PD78P083(A) µPD78P083
Product Item Quality Grade Package Special 42-pin plastic shrink (600 mil) 44-pin plastic Standard 42-pin plastic shrink (600 mil) 44-pin plastic 42-pin ceramic shrink (with window) (600 mil)
PD78P083(A)
µPD78P083
µPD78P083(A)
78K/0 SERIES DEVELOPMENT following shows 78K/0 Series products development. Subseries names shown inside frames.
Mass-produced products Products under development Subseries supports specifications. Control 100-pin 100-pin 100-pin 100-pin 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 64-pin 64-pin 64-pin 42/44-pin µPD78075B µPD78078 µPD78070A µPD780018Note µPD780058 µPD78058F µPD78054 µPD780034 µPD780024 µPD78014H µPD78018F µPD78014 µPD780001 µPD78002 µPD78083 µPD78075BY µPD78078Y µPD78070AY µPD780018YNote µPD780058YNote µPD78058FY µPD78054Y µPD780034Y µPD780024Y µPD78018FY µPD78014Y µPD78002Y noise version µPD78078 Timer added µPD78054 external interface enhanced. ROM-less versions µPD78078 Serial µPD78078 enhanced only selected functions provided. Serial I/O-enhanced versions µPD78054; noise version noise version µPD78054 UART converter added µPD78014 enhanced. A/D-enhanced version µPD780024 Serial I/O-enhanced versions µPD78018F; noise version noise version µPD78018F Low-voltage (1.8 operation versions µPD78014 with several capacities available. converter 16-bit timer added µPD78002. converter added µPD78002. Basic subseries control applications On-chip UART, operable voltage (1.8
Inverter control 64-pin 64-pin µPD780964 µPD780924 driving 78K/0 series 100-pin 100-pin 80-pin 80-pin µPD780208 µPD780228 µPD78044H µPD78044F µPD78044F enhanced. Total display outputs pins µPD78044H enhanced. Total display outputs pins N-ch open-drain added µPD78044F. Total display outputs pins Basic subseries driving. Total display outputs: pins A/D-enhanced version µPD780924 On-chip inverter control circuit UART incorporated; noise version
driving 100-pin 100-pin 100-pin µPD780308 µPD78064B µPD78064 µPD780308Y µPD78064Y µPD78064 enhanced, expanded. noise version µPD78064 Basic subseries driving LCDs with on-chip UART.
IEBus 80-pin
supported IEBus controller added µPD78054.
µPD78098
64-pin µPD78P0914 output, digital code decoder Hsync counter incorporated.
Note Under planning
µPD78P083(A)
following table shows differences among subseries functions.
Function Subseries name Control capacity Timer 8-bit 10-bit 8-bit Serial interface 8-bit 16-bit Watch (UART: value expansion Available MIN. External
PD78075B PD78078 PD78070A PD780018
(Time division 3-wire:
PD780058
(Time division UART: (UART:
PD78058F PD78054 PD780034 PD780024 PD78014H PD78018F PD78014 PD780001 PD78002 PD78083
Inverter control
(UART: Time division 3-wire:
Note (Time division UART: (UART: (UART: (UART: Available Available
PD780964 PD780924
driving PD780208
PD780228
PD78044H PD78044F
driving
PD780308
PD78064B PD78064
IEBus supported
PD78098
(UART:
Available
PD78P0914
Available
Note bits timer: channel
µPD78P083(A)
FUNCTION DESCRIPTION
Item Internal memory Function PROM: Kbytes Note High-speed RAM: bytes Kbytes bits registers bits registers banks) Instruction execution time variable function integrated. µs/0.8 µs/1.6 µs/3.2 µs/6.4 µs/12.8 (@5.0-MHz operation with main system clock) 16-bit operation Multiply/divide bits bits, bits bits) manipulation (set, reset, test, Boolean operation) adjust, etc. ports Total CMOS input CMOS input/output 8-bit resolution channels 3-wired serial I/O/UART mode selectable: channel 8-bit timer/event counter: channels Watchdog timer: channel Timer output Clock output Buzzer output Vectored-interrupt source Maskable Non-maskable Software Power supply voltage Operating ambient temperature Packages pins (8-bit output enable) 19.5 kHz, 39.1 kHz, 78.1 kHz, kHz, kHz, kHz, 1.25 MHz, MHz, 5.0-MHz operation with main system clock) kHz, kHz, kHz, 5.0-MHz operation with main system clock) Internal Internal Internal external
Note
Memory space General register Instruction cycles
Instruction
converter Serial interface Timer
+85°C 42-pin plastic shrink (600 mil) 44-pin plastic
Note
Internal PROM high-speed capacities changed setting memory size switching register (IMS).
µPD78P083(A)
CONFIGURATIONS (Top View) Normal operating mode 42-pin plastic shrink (600 mil)
PD78P083CU(A)
P35/PCL P36/BUZ P01/INTP1 P02/INTP2 P03/INTP3 RESET AVDD
P100/TI5/TO5 P101/TI6/TO6 P70/RXD/SI2 P71/TXD/SO2 P72/ASCK/SCK2 P17/ANI7 P16/ANI6 P15/ANI5 P14/ANI4 P13/ANI3 P12/ANI2 P11/ANI1 P10/ANI0 AVSS AVREF
Cautions Connect directly Connect AVDD VDD. Connect AVSS
µPD78P083(A)
44-pin plastic
µPD78P083GB(A)-3B4, µPD78P083GB(A)-3BS-MTX Note
Note Under planning
P11/ANI1 P10/ANI0 RESET
AVREF
AVSS
AVDD
P12/ANI2 P13/ANI3 P14/ANI4 P15/ANI5 P16/ANI6 P17/ANI7 P72/ASCK/SCK2 P71/TXD/SO2 P70/RXD/SI2 P101/TI6/TO6 P100/TI5/TO5
P03/INTP3 P02/INTP2 P01/INTP1 P36/BUZ P35/PCL
Cautions Connect directly Connect AVDD VDD. Connect AVSS VSS. Connect noise protection left open).
µPD78P083(A)
ANI0 ANI7 ASCK INTP1 INTP3 P100, P101
Analog Input Asynchronous Serial Clock Analog Power Supply Analog Reference Voltage Analog Ground Buzzer Clock Interrupt from Peripherals Non-connection Port Port Port Port Port Port
RESET SCK2 TI5, TO5,
Programmable Clock Reset Receive Data Serial Clock Serial Input Serial Output Timer Input Timer Output Transmit Data Power Supply Programming Power Supply Ground Crystal (Main System Clock)
µPD78P083(A)
PROM programming mode 42-pin plastic shrink (600 mil)
µPD78P083CU(A)
RESET Open
Cautions (L): VSS: RESET: Open:
Individually connect pull-down resistor. Connect GND. level. Leave open.
µPD78P083(A)
44-pin plastic µPD78P083GB(A)-3B4, µPD78P083GB(A)-3BS-MTXNote Note Under planning
RESET
Open
Cautions (L): RESET: Open:
Individually connect pull-down resistor. Connect GND. level. Leave open. Address Chip Enable Data Output Enable Program RESET Reset Power Supply Programming Power Supply Ground
µPD78P083(A)
BLOCK DIAGRAM
P100/TI5/TO5 8-bit TIMER/ EVENT COUNTER PORT P01-P03
P101/TI6/TO6
8-bit TIMER/ EVENT COUNTER WATCHDOG TIMER 78K/0 CORE
PORT
P10-P17
PROM KBytes)
PORT
P30-P37
SI2/RXD/P70 SO2/TXD/P71 SCK2/ASCK/P72 ANI0/P10ANI7/P17 AVDD AVSS AVREF INTP1/P01INTP3/P03
SERIAL INTERFACE
PORT
P50-P57
CONVERTER DATA MEMORY (512 Bytes)
PORT
P70-P72
INTERRUPT CONTROL BUZZER OUTPUT
PORT
P100, P101
BUZ/P36
RESET SYSTEM CONTROL
PCL/P35
CLOCK OUTPUT CONTROL
µPD78P083(A)
CONTENTS DIFFERENCES BETWEEN µPD78P083(A) MASK VERSIONS FUNCTIONS
Pins Normal Operating Mode Pins PROM Programming Mode Input/Output Circuits Recommended Connection Unused Pins
INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS) PROM PROGRAMMING
Operating Modes PROM Write Procedure PROM Read Procedure
ONE-TIME PROM VERSION SCREENING ELECTRICAL SPECIFICATIONS PACKAGE DRAWINGS RECOMMENDED SOLDERING CONDITIONS DEVELOPMENT TOOLS RELATED DOCUMENTS
APPENDIX APPENDIX
µPD78P083(A)
DIFFERENCES BETWEEN µPD78P083(A) MASK VERSIONS
PD78P083(A) single-chip microcontroller with on-chip one-time PROM. Setting memory size switching register (IMS) makes functions except PROM specification identical mask versions. Table shows differences between PROM version (µPD78P083(A)) mask versions PD78081(A) PD78082(A)). Table 1-1. Differences between µPD78P083(A) Mask Versions
Parameter Internal type Internal capacity Internal high-speed capacity Internal internal high-speed capacity change memory size switching register (IMS) Electrical specifications Refer data sheet each product Kbytes bytes Enable
Note
µPD78P083(A) One-time PROM/EPROM
Mask Versions Mask µPD78081(A) µPD78082(A) µPD78081(A) µPD78082(A) Disable Kbytes Kbytes bytes bytes
Note internal PROM becomes Kbytes internal high-speed becomes bytes RESET input.
µPD78P083(A)
FUNCTIONS
Pins Normal Operating Mode
Port pins
Name Input/Output Input Input/output Port 4-bit input/output port Function Input only Input/output specifiable bit-wise. When used input port, possible connect pull-up resistor software. Input/output Port 8-bit input/output port Input/output specifiable bit-wise. When used input port, possible connect pull-up resistor software. P30-P34 Input/output Input/output Port 8-bit input/output port Input/output specifiable bit-wise. When used input port, possible connect pull-up resistor software. Port 8-bit input/output port drive seven LEDs directly. Input/output specifiable bit-wise. When used input port, possible connect pull-up resistor software. Input/output Port 3-bit input/output port Input/output specifiable bit-wise. When used input port, possible connect pull-up resistor software. P100 P101 Input/output Port 2-bit input/output port Input/output specifiable bit-wise. When used input port, possible connect pull-up resistor software. Input TI5/TO5 TI6/TO6 Input SI2/RxD SO2/TxD SCK2/ASCK Input
Note
After Reset Input Input
Alternate Function INTP1 INTP2 INTP3
Input
ANI0 ANI7
Input
Note When P10/ANI0-P17/ANI7 pins used analog inputs converter, port input mode. on-chip pull-up resistor automatically disabled.
µPD78P083(A)
Non-port pins
Name INTP1 INTP2 INTP3 SCK2 ASCK ANI0 ANI7 AVREF AVDD AVSS RESET Input Input Positive power supply. High-voltage applied during program write/verification. Connected directly normal operating mode. Ground potential. Does internally connected. Connect left open) Output Output Input Input Clock output. (for main system clock trimming) Buzzer output. converter analog input. converter reference voltage input. converter analog power supply. Connected VDD. converter ground potential. Connected System reset input. Main system clock oscillation crystal connection. Input Input Input Output Input Output Input/Output Input Output Input Input Serial interface serial data input. Serial interface serial data output. Serial interface serial clock input/output. Asynchronous serial interface serial data input. Asynchronous serial interface serial data output. Asynchronous serial interface serial clock input. External count clock input 8-bit timer (TM5). External count clock input 8-bit timer (TM6). 8-bit timer output. Input Input Input Input Input Input Input Input Input/Output Input Function External interrupt input which active edge (rising edge, falling edge, both rising falling edges) specified. After Reset Input Alternate Function P70/RxD P71/TxD P72/ASCK P70/SI2 P71/SO2 P72/SCK2 P100/TO5 P101/TO6 P100/TI5 P101/TI6
µPD78P083(A)
Pins PROM Programming Mode
Input/Output Input Function PROM programming mode setting When +12.5 applied low-level signal applied RESET pin, this chip PROM programming mode.
Name RESET
D0-D7
Input Input Input/output Input Input Input
PROM programming mode setting high-voltage applied during program write/verification. Address Data PROM enable input/program pulse input Read strobe input PROM Program/program inhibit input PROM programming mode. Positive power supply Ground potential
Input/Output Circuits Recommended Connection Unused Pins
Types input/output circuits pins recommeded connection unused pins shown Table 2-1. configuration each type input/output circuit, Figure 2-1. Table 2-1. Type Input/Output Circuit Each
Name P01/INTP1 P02/INTP2 P03/INTP3 P10/ANI0 P17/ANI7 P33, P35/PCL P36/BUZ P70/SI2/RxD P71/SO2/TxD P72/SCK2/ASCK P100/TI5/TO5 P101/TI6/TO6 RESET AVREF AVDD AVSS Input Connect Connect VDD. Connect Connect directly Connect (can leave open) Input/Output Independently connect resistor. Input/Output Circuit Type Input Input/Output Connect Independently connect resistor. Input/Output Recommended Connection Unused Pins
µPD78P083(A)
Figure 2-1. Types Input/Output Circuits
Type
Type
pull-up enable data P-ch
P-ch
IN/OUT Schmitt-triggered input with hysteresis characteristics output disable N-ch
Type pull-up enable data
Type pull-up enable
P-ch
P-ch P-ch IN/OUT
data
P-ch IN/OUT output disable P-ch N-ch Comparator N-ch VREF (threshold voltage) input enable N-ch
output disable
input enable
µPD78P083(A)
INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS)
This register disable part internal memories software. setting this memory size switching register (IMS), possible same memory mapping that mask versions with different internal memory (ROM, RAM). with 8-bit memory manipulation instruction. RESET input sets 46H. Figure 3-1. Internal Memory Size Switching Register Format
Symbol RAM2 RAM1 RAM0 ROM3 ROM2 ROM1 ROM0 Address FFF0H After Reset
ROM3 ROM2 ROM1 ROM0
Selection Internal Capacity Kbytes Kbytes Kbytes Setting prohibited
Other than above
RAM2 RAM1 RAM0
Selection Internal High-Speed Capacity bytes bytes bytes Setting prohibited
Other than above
Table shows setting values which make memory mapping same that mask version. Table 3-1. Internal Memory Size Switching Register Setting Values
Target Mask Versions µPD78081(A) µPD78082(A) Setting Value
µPD78P083(A)
PROM PROGRAMMING
µPD78P083(A) internal 24-Kbyte PROM program memory. programming, PROM programming mode with RESET pins. connection unused pins, refer "PIN CONFIGURATIONS (TOP VIEW) PROM programming mode." Caution Programs must written addresses 0000H 5FFFH (The last address 5FFFH must specified). They cannot written PROM programmer which cannot specify write address. Operating Modes
When +12.5 applied low-level signal applied RESET pin, PROM programming mode set. This mode will become operating mode shown Table when pins shown. Further, when read mode set, possible read contents PROM. Table 4-1. Operating Modes PROM Programming
Operating Mode Page data latch Page write Byte write Program verify Program inhibit +12.5 +6.5 Read Output disable Standby Data output High-impedance High-impedance Data input High-impedance Data input Data output High-impedance RESET
µPD78P083(A)
Read mode Read mode set. Output disable mode Data output becomes high-impedance, output disable mode, set. Therefore, allows data read from device controlling pin, multiple µPD78P083(A)s connected data bus. Standby mode Standby mode set. this mode, data outputs become high-impedance irrespective status. Page data latch mode Page data latch mode beginning page write mode. this mode, page 4-byte data latched internal address/data latch circuit. Page write mode After page bytes addresses data latched page data latch mode, page write executed applying 0.1-ms program pulse (active low) with Then, program verification performed, set. programming performed one-time program pulse, times write verification operations should executed repeatedly. Byte write mode Byte write executed when 0.1-ms program pulse (active low) applied with Then, program verification performed set. programming performed one-time program pulse, times write verification operations should executed repeatedly. Program verify mode Program verify mode set. this mode, check write operation performed correctly after write. Program inhibit mode Program inhibit mode used when pin, pin, D0-D7 pins multiple µPD78P083(A)s connected parallel write performed those devices. When write operation performed, page write mode byte write mode described above used. this time, write performed device which driven high.
µPD78P083(A)
PROM Write Procedure Figure 4-1. Page Program Mode Flow Chart
Start Address +6.5 +12.5
Latch Address Address Latch Address Address Latch Address Address Address Address Latch
X=X+1 0.1-ms program pulse
Verify bytes Pass Address
Fail
Pass
Verify bytes Pass Write
Fail
Defective product
Start address Program last address
µPD78P083(A)
Figure 4-2. Page Program Mode Timing
Page Data Latch
Page Program
Program Verify
A2-A14
D0-D7 Data Input Data Output
µPD78P083(A)
Figure 4-3. Byte Program Mode Flow Chart
Start Address +6.5 +12.5
X=X+1 0.1-ms program pulse Address Address Fail Verify Pass Address
Pass
Verify bytes Pass Write
Fail
Defective product
Start address Program last address
µPD78P083(A)
Figure 4-4. Byte Program Mode Timing
Program
Program Verify
A0-A14
D0-D7
Data Input
Data Output
Cautions should applied before removed after VPP. must exceed +13.5 including overshoot. Reliability adversely affected removal/reinsertion performed while +12.5 being applied VPP.
µPD78P083(A)
PROM Read Procedure
contents PROM readable external data (D0-D7) according read procedure shown below. RESET level, supply pin, connect other unused pins shown "PIN CONFIGURATIONS (TOP VIEW) PROM programming mode". Supply pins. Input address read data into pins. Read mode Output data pins. timings above steps shown Figure 4-5. Figure 4-5. PROM Read Timings
A0-A14
Address Input
(Input)
(Input)
D0-D7
Hi-Z
Data Output
Hi-Z
µPD78P083(A)
ONE-TIME PROM VERSION SCREENING
one-time PROM version µPD78P083CU(A), 78P083GB(A)-3B4, 78P083GB(A)-3BS-MTXNote) cannot tested completely before shipped, because structure. recommended perform screening verify PROM after writing necessary data performing high-temperature storage under condition below. Note Under planning
Storage Temperature 125°C Storage Time hours
offers additional one-time PROM writing marking, screening, verify products designated QTOP Microcontroller. fee-charged service PD78P083(A) under planning. Consult sales representative details.
µPD78P083(A)
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings 25°C)
Parameter Supply voltage Symbol AVDD AVREF AVSS Input voltage Output voltage Analog input voltage Output current, high Analog input pins Total P17, P54, P72, P100, P101 Total P03, P37, Output current, Note Peak value r.m.s. value Total Peak value r.m.s. value Total Peak value r.m.s. value Total P17, P72, P100, P101 Total P03, Operating ambient temperature Storage temperature Tstg Peak value r.m.s. value Peak value r.m.s. value +150 PROM programming mode Test Conditions Ratings -0.3 +7.0 -0.3 +13.5 -0.3 -0.3 -0.3 +0.3 -0.3 -0.3 +13.5 -0.3 AVSS AVREF Unit
Note r.m.s. value should calculated follows: [r.m.s. value] [Peak value] Duty Caution absolute maximum rating even above parameters exceeded, quality product degraded. absolute maximum ratings therefore rated values that may, exceeded, physically damage product. sure product with absolute maximum ratings observed. Remark Unless otherwise specified, dual-function characteristics same port characteristics.
µPD78P083(A)
Capacitance 25°C,
Parameter Input capacitance capacitance Symbol Test Conditions MHz, Unmeasured pins returned MHz, Unmeasured pins returned P03, P17, P37, P57, P72, P100, P101 MIN. TYP. MAX. Unit
Remark Unless otherwise specified, dual-function characteristics same port characteristics. Main System Clock Oscillator Characteristics +85°C,
Resonator Ceramic resonator Recommended Circuit
Parameter Oscillation frequency (fX) Note
Test Conditions
MIN.
TYP.
MAX. Unit
Oscillation voltage range
Oscillation stabilization time
Note
After came MIN. oscillation voltage range
Crystal resonator
Oscillation frequency (fX)
Note
Oscillation stabilization time Note
External clock
input frequency (fX)
Note
PD74HCU04
input high- low-level widths (tXH
Notes Only oscillator characteristics shown. instruction execution time, refer Characteristics. Time required oscillation stabilize after reset STOP mode been released. Caution When using oscillation circuit main system clock, wire portion enclosed broken lines figures follows avoid adverse influences wiring capacitance: Keep wiring length short possible. cross wiring over other signal lines. route wiring vicinity lines through which high fluctuating current flows. Always keep ground point capacitor oscillation circuit same potential connect power source pattern through which high current flows. extract signals from oscillation circuit.
µPD78P083(A)
Characteristics +85°C,
Parameter Input voltage, high Symbol VIH1 Test Conditions P17, P32, P37, P57, P03, P33, P34, P70, P72, P100, P101, RESET MIN. 0.7VDD 0.8VDD 0.8VDD 0.85VDD Input voltage, VIL1 P17, P32, P37, P57, P03, P33, P34, P70, P72, P100, P101, RESET VIL3 Output voltage, high -100 Output voltage, P03, P17, P37, P72, P100, P101 Input-leak current, high ILIH1 P03, P17, P37, P57, P72, P100, P101, RESET ILIH2 Input-leak current, ILIL1 P03, P17, P37, P57, P72, P100, P101, RESET ILIL2 Output leak current, high ILOH Output leak current, Software pull-up resistor ILOL VOUT VOUT P03, P17, P37, P57, P72, P100, P101 TYP. MAX. 0.3VDD 0.2VDD 0.2VDD 0.15VDD Unit
VIH2
VIH3
VIL2
Remark Unless otherwise specified, dual-function characteristics same port characteristics.
µPD78P083(A)
Characteristics +85°C,
Parameter Supply current
Note
Symbol 5.0-MHz crystal
Test Conditions
Note Note Note Note Note Note
MIN.
TYP. 0.45
MAX. 16.2 1.35 28.5
Unit
oscillation operating mode (fXX MHz)
5.0-MHz crystal oscillation operating mode (fXX MHz)
Note
5.0-MHz crystal oscillation HALT mode (fXX MHz)
Note
0.65
1.95
Note
5.0-MHz crystal oscillation HALT mode (fXX MHz) STOP mode
0.05 0.05
Notes including AVREF AVDD currents port currents (including current flowing into internal pull-up resistors). fX/2 operation (when oscillation mode selection register (OSMS) 00H). operation (when oscillation mode selection register (OSMS) 01H). High-speed mode operation (when processor clock control register (PCC) 00H). Low-speed mode operation (when processor clock control register (PCC) 04H). Remark fXX: Main system clock frequency fX/2) Main system clock oscillation frequency
µPD78P083(A)
Characteristics Basic Operation +85°C,
Parameter Cycle time (minimum instruction execution time)
Note2
Symbol fX/2
Note1
Test Conditions
MIN.
TYP.
MAX.
Unit
TI5, input frequency TI5, input high-/ low-level widths Interrupt input high-/ low-level widths RESET low-level width
tTIH tTIL tINTH, tINTL tRSL
Notes When oscillation mode selection register (OSMS) 00H. When OSMS 01H. Remark fXX: Main system clock frequency fX/2) Main system clock oscillation frequency
(Main System Clock Operation)
(Main System Clock Operation)
Cycle Time
Operation Guaranteed Range
Cycle Time
Operation Guaranteed Range
Power Supply Voltage
Power Supply Voltage
µPD78P083(A)
Serial Interface +85°C, 3-wired serial mode (SCK2 internal clock output)
Parameter SCK2 cycle time Symbol KCY1 Test Conditions MIN. 1600 3200 4800 SCK2 high-/low-level width setup time SCK2 KH1, SIK1 hold time (from SCK2 KSI1 SCK2 output delay time KSO1 pFNote tKCY1/2-50 KCY1/2-100 TYP. MAX. Unit
Note SCK2, output line load capacitance. 3-wired serial mode (SCK2 external clock input)
Parameter SCK2 cycle time Symbol KCY2 Test Conditions setup time SCK2 MIN. 1600 3200 4800 SCK2 high-/low-level width KH2, 1600 2400 SIK2 hold time (from SCK2 KSI2 SCK2 output delay time SCK2 rise, fall time KSO2 pFNote 1000 TYP. MAX. Unit
Note output line load capacitance.
µPD78P083(A)
UART mode (Dedicated baud rate generator output)
Parameter Transfer rate Symbol Test Conditions MIN. TYP. MAX. 78125 39063 19531 9766 Unit
UART mode (External clock input)
Parameter ASCK cycle time Symbol KCY3 Test Conditions MIN. 1600 3200 4800 ASCK high-/low-level width KH3, 1600 2400 Transfer rate 39063 19531 9766 6510 ASCK rise, fall time 1000 TYP. MAX. Unit
µPD78P083(A)
Timing Test Point (Excluding Input)
Test Points
Clock Timing
1/fx VIH3 (MIN.) VIL3 (MAX.)
Input
Timing
1/fTI tTIL tTIH
TI5,
µPD78P083(A)
Serial Transfer Timing 3-wired serial mode:
tKCY1, tKL1, SCK2 tKH1,
tSIK1,
tKSI1,
tKSO1,
Input Data
Output Data
UART mode (external clock input):
tKCY3 tKL3 ASCK tKH3
µPD78P083(A)
Converter Characteristics +85°C, AVDD AVSS
Parameter Resolution Total error
Note
Symbol
Test Conditions AVREF AVDD
MIN.
TYP.
MAX.
Unit
Conversion time Sampling time Analog input voltage Reference voltage AVREF-AV resistance
CONV SAMP VIAN AVREF RAIREF
19.1 12/f AVSS
AVREF AVDD
Note Excluding quantization error (±1/2 LSB). Shown percentage full scale value. Remark Main system clock frequency Main system clock oscillation frequency
µPD78P083(A)
Data Memory STOP Mode Supply Voltage Data Retention Characteristics +85°C)
Parameter Symbol Test Conditions MIN. VDDDR Release RESET Release interrupt Note
TYP.
MAX.
Unit
Data retention supply voltage VDDDR Data retention supply current Release signal time Oscillation stabilization wait time IDDDR SREL tWAIT
Note 12/fXX 14/fXX 217/f selected (OSTS0 OSTS2) oscillation stabilization time selection register (OSTS). Remark Main system clock frequency X/2) Main system clock oscillation frequency Data Retention Timing (STOP mode released RESET)
Internal reset operation HALT mode STOP mode Data retention mode VDDDR STOP instruction execution RESET tSREL Operating mode
tWAIT
Data Retention Timing (Standby release signal: STOP mode released interrupt request signal)
HALT mode STOP mode Data retention mode VDDDR STOP instruction execution Standby release signal (interrupt request) tWAIT tSREL Operating mode
µPD78P083(A)
Interrupt Input Timing
tINTL INTP1-INTP3 tINTH
RESET Input Timing
tRSL
RESET
µPD78P083(A)
PROM Programming Characteristics Characteristics PROM Write Mode ±5°C, ±0.25 12.5 ±0.3
Parameter Input voltage, high Input voltage, Output voltage, high Output voltage, Input leakage current supply voltage supply voltage supply current supply current Symbol Symbol Note 12.2 6.25 12.5 Test Conditions MIN. 0.7VDD 12.8 6.75 TYP. MAX. 0.3VDD Unit
PROM Read Mode ±5°C, ±0.5 ±0.6
Parameter Input voltage, high Input voltage, Output voltage, high Symbol SymbolNote VOH1 VOH2 Output voltage, Input leakage current Output leakage current supply voltage supply voltage supply current supply current VOH1 VOH2 CCA1 -100 VOUT VDD, Test Conditions MIN. 0.7VDD TYP. MAX. 0.3VDD Unit
Note Corresponding µPD27C1001A symbol.
µPD78P083(A)
Characteristics PROM Write Mode Page program mode ±5°C, ±0.25 12.5 ±0.3
Parameter Address setup time setup time setup time Input data setup time Address hold time (from Symbol Symbol Note Input data hold time (from Data output float delay time setup time setup time Program pulse width Valid data delay time pulse width during data latching setup time hold time hold time PGMS tVPS PGMS tCEH 0.095 0.105 tOES Test Conditions MIN. TYP. MAX. Unit
Byte program mode ±5°C, ±0.25 12.5 ±0.3
Parameter Address setup time setup time setup time Address hold time (from Input data hold time (from Data output float delay time setup time setup time Program pulse width Valid data delay time hold time tVPS tVDS tOEH 0.095 0.105 Symbol Symbol Note tOES tCES Test Conditions MIN. TYP. MAX. Unit
Input data setup time
Note Corresponding PD27C1001A symbol.
µPD78P083(A)
PROM Read Mode ±5°C, ±0.5 ±0.6
Parameter Address Data output float delay time Valid output delay time Valid output delay time Data output float delay time Address Data hold time Symbol Symbol Note tACC Test Conditions MIN. TYP. MAX. Unit
Note Corresponding PD27C1001A symbol. PROM Programming Mode 25°C,
Parameter PROM programming mode setup time Symbol tSMA Test Conditions MIN. TYP. MAX. Unit
µPD78P083(A)
PROM Write Mode Timing (page program mode)
Page Data Latch A2-A14 D0-D7 Hi-Z tVPS tVDS VDD+1.5 tCES tOES tCEH tOEH Data Input Hi-Z tPGMS Output
Data
Page Program
Program Verify
tAHL
tAHV
Hi-Z
µPD78P083(A)
PROM Write Mode Timing (byte program mode)
Program A0-A14 D0-D7 VDD+1.5 tOES tCES tVPS Hi-Z Data Input Hi-Z Data Output Hi-Z Program Verify
tVDS
tOEH
Cautions should applied before VPP, removed after must exceed +13.5 including overshoot. Reliability adversely affected removal/reinsertion performed while 12.5 being applied VPP. PROM Read Mode Timing
A0-A14
Effective Address
tACCNote D0-D7 Hi-Z tOENote Data Output Hi-Z tDFNote
Notes want read within range tACC, make input delay time from fall maximum tOE. time from when either first reaches VIH.
µPD78P083(A)
PROM Programming Mode Setting Timing
RESET
tSMA Effective Address
A0-A14
µPD78P083(A)
PACKAGE DRAWINGS
42PIN PLASTIC SHRINK (600 mil)
NOTES Each lead centerline located within 0.17 (0.007 inch) true position (T.P.) maximum material condition. Item center leads when formed parallel.
ITEM
MILLIMETERS 39.13 MAX. 1.78 MAX. 1.778 (T.P.) 0.50±0.10 MIN. 3.2±0.3 0.51 MIN. 4.31 MAX. 5.08 MAX. 15.24 (T.P.) 13.2 0.25 +0.10 -0.05 0.17 0~15°
INCHES 1.541 MAX. 0.070 MAX. 0.070 (T.P.) 0.020 +0.004 -0.005 0.035 MIN. 0.126±0.012 0.020 MIN. 0.170 MAX. 0.200 MAX. 0.600 (T.P.) 0.520 0.010 +0.004 -0.003 0.007 0~15° P42C-70-600A-1
Remark shape material versions same those mass-produced versions.
µPD78P083(A)
PD78P083GB(A)-3B4
PLASTIC
detail lead
NOTE Each lead centerline located within 0.15 (0.006 inch) true position (T.P.) maximum material condition.
ITEM MILLIMETERS 13.6±0.4 10.0±0.2 10.0±0.2 13.6±0.4 0.35±0.10 0.15 (T.P.) 1.8±0.2 0.8±0.2 0.15 +0.10 -0.05 0.10 0.1±0.1 5°±5° MAX. INCHES 0.535 +0.017 -0.016 0.394 +0.008 -0.009 0.394 +0.008 -0.009 0.535 +0.017 -0.016 0.039 0.039 0.014 +0.004 -0.005 0.006 0.031 (T.P) 0.071 +0.008 -0.009 0.031 +0.009 -0.008 0.006 +0.004 -0.003 0.004 0.106 0.004±0.004 5°±5° 0.119 MAX. P44GB-80-3B4-3
Remark shape material versions same those mass-produced versions.
µPD78P083(A)
µPD78P083GB(A)-3BS-MTX (Under planning)
PLASTIC
detail lead
NOTE Each lead centerline located within 0.16 (0.007 inch) true position (T.P.) maximum material condition.
ITEM MILLIMETERS 13.2±0.2 10.0±0.2 10.0±0.2 13.2±0.2 0.37 +0.08 -0.07 0.16 (T.P.) 1.6±0.2 0.8±0.2 0.17 +0.06 -0.05 0.10 0.125±0.075 MAX. INCHES 0.520 +0.008 -0.009 0.394 +0.008 -0.009 0.394 +0.008 -0.009 0.520 +0.008 -0.009 0.039 0.039 0.015 +0.003 -0.004 0.007 0.031 (T.P.) 0.063±0.008 0.031 +0.009 -0.008 0.007 +0.002 -0.003 0.004 0.106 0.005±0.003 0.119 MAX. S44GB-80-3BS
Remark shape material versions same those mass-produced versions.
µPD78P083(A)
RECOMMENDED SOLDERING CONDITIONS recommended that PD78P083(A) soldered under following conditions.
details recommended soldering conditions, refer information document "Semiconductor Device Mounting Technology Manual" (C10535E). soldering methods conditions other than those recommended, please contact your sales representative. Table 8-1. Soldering Conditions Surface Mount Types
PD78P083GB(A)-3B4 44-pin plastic
Soldering Method Infrared reflow Wave soldering Soldering Conditions Package peak temperature: 235°C, Reflow time: seconds less 210°C higher), Number reflow processes: less Package peak temperature: 215°C, Reflow time: seconds less 200°C higher), Number reflow processes: less Solder temperature: 260°C below, Flow time: seconds less, Number flow processes: Preheating temperature: 120°C max. (package surface temperature) temperature: 300°C below, Flow time: seconds less (per row) Symbol IR35-00-3 VP15-00-3 WS60-00-1
Partial heating
Cautions different soldering methods together (except partial heating method). Soldering conditions PD78P083GB(A)-3BS-MTX fixed because this product under planning. Table 8-2. Soldering Condition Hole-Through Types
PD78P083CU(A) 42-pin plastic shrink (600 mil)
Soldering Method Wave Soldering (only pins) Partial heating Soldering Conditions Solder temperature: 260°C below, Flow time: seconds less temperature: 300°C below, Flow time: seconds less (per pin)
Caution
Apply wave soldering only pins careful bring solder into direct contact with package.
µPD78P083(A)
APPENDIX DEVELOPMENT TOOLS
following development tools available support development systems using PD78P083(A). Language Processing Software
RA78K/0 Notes CC78K/0 Notes DF78083
Notes Notes
Assembler package common 78K/0 Series compiler package common 78K/0 Series Device file used µPD78083 Subseries compiler library source file common 78K/0 Series
CC78K/0-L
PROM Writing Tools
PG-1500 PA-78P083CU PA-78P083GB PG-1500 Controller
Notes
PROM programmer Programmer adapter connected PG-1500 Control program PG-1500
Debugging Tools
IE-78000-R IE-78000-R-A IE-78000-R-BK IE-78078-R-EM EP-78083CU-R EP-78083GB-R EV-9200G-44 SM78K0 ID78K0
Notes
In-circuit emulator common 78K/0 Series In-circuit emulator common 78K/0 Series (for integrated debugger) Break board common 78K/0 Series Emulation board common µPD78078 Subseries Emulation probe µPD78083 Subseries Socket mounted target system board prepared 44-pin plastic (GB-3B4, GB-3BS-MTX type) System simulator common 78K/0 Series Integrated debugger IE-78000-R-A Screen debugger IE-78000-R Device file used µPD78083 Subseries
Notes
SD78K/0 Notes DF78083
Notes
Notes Based PC-9800 series (MS-DOS) Based PC/AT compatibles DOS/IBM DOS/MS-DOS) Based HP9000 series (HP-UX Based HP9000 series (HP-UX), SPARCstation(SunOSTM), EWS4800 series (EWS-UX/ Based PC-9800 series (MS-DOS Windows) PC/AT compatibles DOS/IBM DOS/MS-DOS Windows) Based NEWS (NEWS-OSTM) Remarks Please refer 78K/0 Series Selection Guide (U11126E) information third party development tools. RA78K/0, CC78K/0, SM78K0, ID78K0, SD78K/0 combination with DF78083.
µPD78P083(A)
MX78K/0
Notes
78K/0 Series common embedded
Fuzzy Inference Development Support System
FE9000 FT9080 FI78K0
Note Note
/FE9200 /FT9085
Note Note
Fuzzy knowledge data creation tool Translator Fuzzy inference module Fuzzy inference debugger
Notes Notes
FD78K0
Notes Based PC-9800 series (MS-DOS) Based PC/AT compatibles DOS/IBM DOS/MS-DOS+Windows) Based PC/AT compatibles DOS/IBM DOS/MS-DOS) Based HP9000 series series (HP-UX), SPARCstation (SunOS), EWS4800 series (EWS-UX/V) Remark Please refer 78K/0 Series Selection Guide (U11126E) information third party development tools.
µPD78P083(A)
APPENDIX RELATED DOCUMENTS
Documents Related Devices
Document Name Document Japanese English U12176J IEU-849 U10903J U10904J IEM-5599 Basic (III) IEA-767 U12176E IEU-1372 U10182E
µPD78083 Subseries User's Manual
78K/0 Series User's Manual-Instructions 78K/0 Series Instruction Table 78K/0 Series Instruction µPD78083 Subseries Special Function Register Table 78K/0 Series Application Note
Caution
contents documents listed above subject change without prior notice. Make sure latest edition when starting design.
µPD78P083(A)
Documents Related Development Tools (User's Manual)
Document Name RA78K Series Assembler Package Operation Language RA78K0 Assembler Package Operation Assembly language Structured assembly language RA78K Series Structured Assembler Preprocessor CC78K Series Compiler Operation Language CC78K/0 Compiler Operation Language CC78K/0 Compiler Application Note CC78K Series Library Source File PG-1500 PROM Programmer PG-1500 Controller PC-9800 Series (MS-DOS) Based PG-1500 Controller Series DOS) Based IE-78000-R IE-78000-R-BK IE-78000-R-A IE-78078-R-EM EP-78083 SM78K0 System Simulator Windows Based SM78K Series System Simulator Reference External parts user open interface specification Reference Reference Guides Introduction Reference Introduction Reference Programming know-how Document Japanese English EEU-809 EEU-815 U11802J U11801J U11789J EEU-817 EEU-656 EEU-655 U11517J U11518J EEA-618 EEU-777 EEU-651 EEU-704 EEU-5008 EEU-810 EEU-867 U10057J U10775J EEU-5003 U10181J U10092J EEU-1399 EEU-1404 U11802E U11801E U11789E EEU-1402 EEU-1280 EEU-1284 U11517E U11518E EEA-1208 EEU-1335 EEU-1291 U10540E U11376E EEU-1427 U10057E EEU-1504 EEU-1529 U10181E U10092E
ID78K0 Integrated Debugger Based ID78K0 Integrated Debugger Based ID78K0 Integrated Debugger SD78K/0 Screen Debugger PC-9800 Series (MS-DOS) Based SD78K/0 Screen Debugger PC/AT DOS) Based
U11151J U11539J U11649J EEU-852 U10952J EEU-5024 U11279J
U11539E U11649E U10539E EEU-1414 U11279E
Caution
contents documents listed above subject change without prior notice. Make sure latest edition when starting design.
µPD78P083(A)
Documents Related Embedded Software (User's Manual)
Document Name 78K/0 Series MX78K0 Fuzzy Knowledge Data Creation Tool 78K/0, 78K/II, 87AD Series Fuzzy Inference Development Support System Translator 78K/0 Series Fuzzy Inference Development Support System Fuzzy Inference Module 78K/0 Series Fuzzy Inference Development Support System Fuzzy Inference Debugger Basic Document Japanese English EEU-5010 EEU-829 EEU-862 EEU-858 EEU-921 EEU-1438 EEU-1444 EEU-1441 EEU-1458
Other Documents
Document Name Package Manual Semiconductor Device Mounting Technology Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System Electrostatic Discharge (ESD) Test Guide Quality Assurance Semicoductor Devices Microcontroller-Related Product Guide Third Party Products Document Japanese English C10943X C10535J C11531J C10983J MEM-539 C11893J U11416J C10535E C11531E C10983E MEI-1202
Caution
contents documents listed above subject change without prior notice. sure latest edition when starting design.
µPD78P083(A)
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS
Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices
HANDLING UNUSED INPUT PINS CMOS
Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices.
STATUS BEFORE INITIALIZATION DEVICES
Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
µPD78P083(A)
Regional Information
Some information contained this document vary from country country. Before using product your application, please contact office your country obtain list authorized representatives distributors. They will verify: Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 800-366-9782 Fax: 800-729-9288
Electronics (Germany) GmbH
Benelux Office Eindhoven, Netherlands Tel: 040-2445845 Fax: 040-2444580
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Electronics Hong Kong Ltd. Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-30-67 Fax: 01-30-67 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290
Electronics (France) S.A.
Spain Office Madrid, Spain Tel: 01-504-2787 Fax: 01-504-2860
Electronics Singapore Pte. Ltd.
United Square, Singapore 1130 Tel: 253-8311 Fax: 250-3583
Electronics Italiana s.r.1.
Milano, Italy Tel: 02-66 Fax: 02-66
Electronics Taiwan Ltd. Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 Fax: 08-63 Taipei, Taiwan Tel: 02-719-2377 Fax: 02-719-5951
Brasil S.A.
Paulo-SP, Brasil Tel: 011-889-1680 Fax: 011-889-1689
J96.
µPD78P083(A)
FIP, IEBus, QTOP trademarks Corporation. MS-DOS Windows trademarks Microsoft Corporation. DOS, PC/AT trademarks International Business Machines Corporation. HP9000 series 300, HP9000 series 700, HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. SunOS trademark Microsystems, Inc. NEWS NEWS-OS trademarks Sony Corporation. related documents indicated this publication include preliminary versions. However, preliminary versions marked such. export these products from Japan regulated Japanese government. export some these products prohibited without governmental license. export re-export some these products from country other than Japan also prohibited without license from that country. Please call sales representive.
part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customers must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard: Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact sales representative advance. Anti-radioactive design implemented this product.
96.5

µPD78P083(A) 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION

Top Searches for this datasheet

Other recent searches